CN1441492A - 电子元件及其它的制造方法 - Google Patents
电子元件及其它的制造方法 Download PDFInfo
- Publication number
- CN1441492A CN1441492A CN03106470A CN03106470A CN1441492A CN 1441492 A CN1441492 A CN 1441492A CN 03106470 A CN03106470 A CN 03106470A CN 03106470 A CN03106470 A CN 03106470A CN 1441492 A CN1441492 A CN 1441492A
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- Prior art keywords
- conductive
- electronic component
- conductive film
- film
- group
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- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
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- 229910052802 copper Inorganic materials 0.000 description 1
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- 239000010931 gold Substances 0.000 description 1
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- 238000002347 injection Methods 0.000 description 1
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Abstract
一种电子元件,其中固定在第一导电薄膜7上的电子元件被电性连接到第二导电薄膜8,该第二导电薄膜8被安排在与第一导电薄膜7基本相同的平面中,并且由封装部分11覆盖的包括第一和第二导电薄膜7和8的外围的电子元件9具有从封装树脂部分11中暴露出来的在第一和第二导电薄膜的一个暴露的表面上形成的导电突起部分13。
Description
技术领域
本发明涉及一个表面安装类型的电子元件和它的制造方法,特别涉及一种树脂铸模的电子元件的结构以及具有相同的结构的电子元件的制造方法,其中容易实现具有外径不大于1mm的每个电子元件。
背景技术
通常一个表面安装类型的树脂铸模电子元件通过使用一个引线框来制造。也就是,准备具有整体形成绝缘部分的引线框和引线部分,一个半导体芯片例如IC或LST安装在每个绝缘部分,然后半导体芯片电极通过焊接线被电连接到引线部分。因此,其上包括半导体芯片的引线框的主要部分由封装的树脂所密封,并且从封装树脂暴露的引线框的不必要部分被切掉。在JUS62-122349A中公开了这种电子元件的一个例子。该例子显示在图1中。在图1中,一个半导体芯片3安装在引线框的每个绝缘部分1。半导体芯片3的电极板(未显示)通过焊接线4被电性连接到引线2。电子元件6包括半导体芯片3和用密封树脂5被涂层的引线部分2。电子元件6能安装在支撑部件(未显示)的上表面,由于绝缘部分1和引线部分2被暴露在一个平面上,该平面与封装树脂部分5的一个下表面是共平面的,以便有助于电子电路器件的小型化。在电子元件6的这种结构中,可能有这种情况,其中,在树脂铸模阶段,在熔融状态的封装树脂部分5进入绝缘部分1和引线部分2的一个安装表面,在安装表面侧导致一个薄的树脂毛边(flash)。在这种情况下,当进行电子元件的表面安装时,在电子元件6的安装表面侧上的薄的树脂毛边变成一个障碍。为了去除薄的树脂毛边,一个柔韧的树脂薄膜(未显示)被粘附到引线框,并且,在进行树脂封装后,从引线框剥去树脂薄膜,以防止树脂在绝缘部分和引线部分的安装表面形成毛边。
另一方面,一个小的电子电路设器件的尺寸和重量被要求进一步减少,例如携带式电话机。为了实现小的电子电路器件的尺寸和重量的进一步减少,有必需进一步减小电子元件的尺寸和重量。为了满足这种电子元件尺寸和重量减小的请求,必需小型化半导体芯片3本身并且同时缩小引线框,以便因此减小绝缘部分1的外围尺寸,引线部分2的宽度和在邻近的引线部分2之间的距离。然而,当引线框被制得较薄时,它的机械强度被降低,并且在它运输期间引线框通过振动和/或震动趋向于变形,因此,使用引线框用于减少电子元件尺寸具有一定的限制。
鉴于这些,JPH10-98133A公开了一个电子元件,该元件具有这样的结构,其中连接到一个半导体芯片用于连接后者到外围终端的电极被直接地被暴露在覆盖半导体芯片的封装树脂部分的一个外表面上。在这种电子元件中,半导体芯片和用于连接外围终端的电极被安排在一个支撑衬底,且半导体芯片的电极板通过焊接线被电性连接到电极。据此,一个支撑衬底的上表面侧由封装树脂部分覆盖,以及半导体芯片的背面以及电极通过从硬化的封装树脂部分剥去支撑衬底而被暴露在封装树脂部分的下表面上。
此外,JP2002-16181A公开了另一个电子元件,其中第一金属层和第二金属层在一个柔韧的金属衬底表面上形成,半导体芯片被安装在第一金属层上,并且半导体芯片的电极板通过焊接线被电性连接到第二金属层。据此,由封装树脂覆盖金属衬底,并且第一和第二金属层从封装树脂部分通过剥去金属衬底被暴露。因此,通过适宜地切割封装树脂部分获得个别的电子元件。
公开在JPH10-98133A或JP2002-16181A中的电子元件不需要一个引线框,因此该电子元件与公开在JUS62-122349A中的电子元件比较,进一步地小型化是可能的。
通常通过在带有焊锡膏的一个印刷电路平面上涂漆导电焊盘部分来安装这种表面安装类型电子元件,并且这种电子元件被暂时地安装在它的上面。然后,印刷电路平面被放置在高温度环境中,以便去熔化焊锡膏,借此去焊接电子元件到导电焊盘部分。在这种焊接步骤中,电子元件在熔化的焊料上处在一个浮动的状态。因此,如果焊料的数量过多,电子元件在焊料凝固前可能会横向移动,导致电子元件的位置偏移。另一方面,如果焊料的数量不足,由于在焊料接口的热膨胀系数的差别造成的应力通过重复的热膨胀和热收缩被反复应用到该接口,导致焊料接口破裂,并且当裂口产生时,电子元件可能脱落。此时,必需去适当地调整焊锡膏的数量,并且以在熔化的状态中焊料的结构不被改变的方式在焊料上提供电子元件。
由于扁平电极例如公开在JPH10-98133A或JP2002-16181A的背面电极和电子元件的电极板,或公开在JP2002-16181A中的第一和第二金属层是彼此接近的,并且作为封装树脂部分被暴露在相同的平面中,例如封装树脂部分表面,通过熔化的焊料会引起扁平电极之间的短路,或者即使没有短路,电连接也会下降。
发明概述
本发明的目的是提供一个电子元件,该电子元件包括固定在第一导电薄膜的电子元件,该电子元件被电气连接到至少一个第二导电薄膜,该导电薄膜被提供在与第一导电薄膜基本相同的平面中,一个封装树脂部分,其覆盖电子元件的固定表面,包括第一和第二导电薄膜的外围部分,并且在第一和第二导电薄膜部分中形成导电突起部分,其被暴露在封装树脂部分的下表面。
本发明的另一个目的是提供一个制造方法,用于制造电子元件,其包括步骤:在树脂薄膜的主表面之一中的预定位置形成细孔,在多个区域中形成第一导电薄膜和第二导电薄膜,该区域包括其中形成细孔的树脂薄膜的预定位置,在第一导电薄膜上固定电子元件,分别地电连接电子元件上的电极到第二导电薄膜,分别的通过一个封装树脂部分覆盖包括在树脂薄膜上的电子元件的区域,通过剥去树脂薄膜外表上暴露第一和第二导电薄膜,同时第一和第二导电薄膜被留在封装树脂部分中,并且通过切割封装树脂部分分离电子元件为各个电子元件。
按照本发明的电子元件具有与公开在JP2002-16181A中的元件类似的结构。然而,本发明的电子元件不同于公开在JP2002-16181A中的电子元件,其中导电突起部分形成在导电薄膜部分上,被暴露于封装树脂部分的外表上。电子元件的导电突起部分可能在导电薄膜的暴露表面上被形成而作为绝缘部分。在这种情况下,导电突起部分通过外表暴露的导电薄膜的外侧表面局部突起部分来形成,或通过从封装树脂部分局部突出导电薄膜能来形成。导电突起部分可能被分散在导电薄膜上。可替换的,该突起部分可以采取线段或环的形式。
按照本发明的电子元件能通过在树脂薄膜的主表面之一中的预定位置中形成细孔的步骤来制造,在多个区域中的每个区域中形成第一导电薄膜和至少一个第二导电薄膜,该区域包括其中形成细孔的树脂薄膜的预定位置,固定电子元件在第一导电薄膜中每个上,电性连接电子元件上的电极到第二导电薄膜,通过封装树脂部分覆盖包括在树脂薄膜上的电子元件的树脂薄膜的区域,通过从封装树脂部分剥去树脂薄膜向外暴露第一和第二有导电突起部分的导电薄膜,同时第一和第二导电薄膜在封装树脂部分被分离,通过切割封装树脂部分把电子元件分离成单独的元件。在这种情况下,绝缘薄膜的细孔通过激光照射或蚀刻,或通过挤压,使用具有硬的突起部分的一种工具来形成。
可替换的,按照本发明的电子元件通过在一个树脂薄膜的主表面之一上的至少两个导电薄膜形成的步骤来制造,固定电子元件在导电薄膜之一上,电性连接电子元件上的电极到其它的导电薄膜,通过局部挤压导电薄膜到树脂薄膜内,突起导电薄膜部分在树脂薄膜上形成到树脂薄膜内,通过封装树脂部分覆盖包括在树脂薄膜上的电子元件的树脂薄膜的区域,通过从封装树脂部分剥去树脂薄膜外向地暴露相应的导电薄膜,同时在封装树脂部分导电薄膜被剩下,并且通过切割封装树脂部分把电子单元分离成电子元件。在这种情况下,通过由一个有多个突起部分的硬的部件挤压导电薄膜来形成导电突起部分,以至在树脂薄膜中导电薄膜被局部地凸出。因此,当电子元件通过焊线被连接到电子导电薄膜时,通过部分挤压在导电薄膜上的布线的一个末端,能形成导电突起部分。
简述附图
图1是一个常规的电子元件剖面图;
图2A按照本发明的一个实施例的电子元件的一个局部剖面的平面图;
图2B是图2A中沿着线I-I所取的一个剖面图;
图3是本发明的电子元件制造中使用的一个布线衬底的平面图;
图4是图3中沿着排I-I所取的一个剖面图;
图5是在本发明的电子元件的安装步骤中显示布线衬底的剖面图;
图6按照本发明的在布线焊接步骤中显示布线衬底的剖面图;
图7按照本发明的在树脂铸模步骤中显示布线衬底的剖面图;
图8按照本发明的从布线衬底剥去一个绝缘衬底的显示剥落步骤的剖面图;
图9按照本发明的通过切割封装树脂部分成小方块显示分离单个的电子元件步骤的剖面图;
图10按照本发明的一个电子元件的一个透视图,显示电子元件的导电薄膜的一个表面;
图11示例了按照本发明的电子导电突起部分构造的另一个例子;
图12是按照本发明的电子元件另一个例子的透视图;
图13是按照本发明的电子元件另一个例子的透视图;和
图14是按照本发明的电子元件另一个例子的透视图。
具体实施方式
参照图2A和2B,电子元件12包括:第一导电薄膜7,在其上安装有一个半导体芯片9例如一个IC或一个LST当作一个电子元件,以及包括第二电子导电薄膜8a和8b,其被排列在与第一导电薄膜7相同的平面中。在下面的描述中,半导体芯片9作为一个树脂密封的电子元件的典型例子被描述。在所示例子中,具有相同尺寸和相同构造的第二导电薄膜8a与8b被排列在第一导电薄膜7的一侧上。第一导电薄膜7和第二导电薄膜8a与8b通过一个单一的导电层或多个导电层来形成,该多个导电层由金属材料例如黄金,铜或镍或一个合金来形成,该合金包括通过电镀作为主要构成的金属材料并且分别具有0.5到50μm厚。在半导体芯片上的电极板91通过焊接线10a和10b分别地被电连接到第二导电薄膜8a和8b。在电子元件12的区域上的半导体芯片9被固定到第一导电薄膜7的外围区域,并且第二导电薄膜8a和8b通过一个封装树脂部分11被密封。封装树脂11的一个区域是,例如,0.8mm×0.6mm。对于封装树脂11的这种区域尺寸,第一导电薄膜7的一个区域是(例如)0.4mm×0.4mm,并且第二导电薄膜8a和8b的每个区域是(例如)0.2mm×0.2mm。
按照本发明,电子元件12特征在于通过第一和第二导电薄膜7,8a和8b,它们被暴露在封装树脂部分11的主表面之一,这就是,它的一个背面,在其上形成带有细导电突起部分13a和13b。细导电突起部分13a和13b的每个有一个根段部分,该根段部分有40到100μm的直径并且具有20到100μm高。在所示例子中,在第一导电薄膜7形成两个突起部分,并且在第二导电薄膜的每一个中形成它们中的一个。
参照图3到图9,将描述电子元件12的一个制造方法。图3中,显示了具有一个平面图的一个布线衬底14和在图4中首先准备好的沿着行II-II所取的剖面图。布线衬底14包括在它的表面上在预定的位置上以预定的间隔形成的具有多个细孔16a和16b的柔韧的绝缘衬底15。包括细孔16a和16b的绝缘衬底15的整个表面通过一个导电薄膜(未显示)覆盖,并且第一导电薄膜7和第二导电薄膜8在绝缘衬底的区域中形成,该绝缘衬底包括通过蚀刻导电薄膜形成的细孔16a和16b。绝缘衬底15的表面粗糙度根据其使用的材料是0.1到5μm,以致在导电薄膜7和8以及绝缘衬底之间的强度焊接不太高。细孔16a和16b的每个有一个圆形或圆锥形,具有20到100μm深,并且它的根部部分具有40到100μm直径。通过用激光照射绝缘衬底、局部蚀刻绝缘衬底或通过在它的预定位置安装具有硬的突起部分的一个平的平面挤压绝缘衬底来形成细孔。导电薄膜可能是一个没有电镀层的单层薄膜,包括无电镀层的多层薄膜和一个无电镀的或在无电镀层上形成的电解层,或是一个被附属到绝缘衬底15的导电箔片。
由于通过电镀第一导电薄膜7和第二导电薄膜8同时形成,导电薄膜7和8互相电连接。也就是,如图3中所示,绝缘衬底15由一个导电矩形框A围绕。垂直地排列的第一导电薄膜7通过导电件B电性的互相连接,并且最上的第一导电薄膜和最低的第一导电薄膜通过导电件B连接到矩形框A。第二导电薄膜8通过连接件C被电连接到它相邻的第一导电薄膜7。细孔16a被导电薄膜7的材料填满,并且细孔16b被导电薄膜8的材料填满,以致导电突起部分在各自的导电薄膜7和8上整体地形成。相对于绝缘衬底15的导电薄膜7和8的焊接强度(剥离强度)被设置到比500g/cm更小的一个值,例如,200g/cm,由于磨毛绝缘衬底15的表面,该值不适合于一个通常的用于电子电路设备印刷的布线衬底。
接下来,半导体芯片9被安装在第一导电薄膜7的每个上,如图5中所示。半导体芯片的安装通常通过导电粘合剂例如银粘贴来进行。在这种情况下,绝缘衬底15由热耐久材料形成,通过热压焊或超声波焊接安装半导体芯片是可能的。
据此,如图6中所示,半导体芯片9的电极(未显示)通过焊接线10被电连接到第二导电薄膜8。线焊接工作完成后,线衬底14被传送到一个树脂铸模步骤,并且绝缘衬底15的上面部分通过如图7中所示的封装树脂部分11来浇铸。这样,导电薄膜7和8在具有导电薄膜7和8的外围表面的封装树脂部分被浇铸,该导电薄膜和封装树脂部分11接触。
在树脂铸模步骤完成后,布线衬底14被传送到用于从导电薄膜剥去绝缘衬底15的剥去步骤,如图8所示。在从导电薄膜剥去绝缘衬底中,根据需求通过粘附一个固定的片(未显示)到封装树脂部分11,可能进行剥离工作而不会造成封装树脂部分的损坏。由于在导电薄膜7和8以及绝缘衬底15之间的焊接强度被预先放置到小的值,在封装树脂部分11的侧面上导电薄膜7和8被剩余,并且当绝缘衬底15被剥去时外表上被暴露。
在这种方式下,当绝缘衬底15被剥去后,沿着如图9所示的虚线使用旋转刀片或喷射水流的切块机(未显示)来切割封装树脂部分11。这样,在绝缘衬底15上形成的导电薄膜的不必要部分如矩形框A被移去。这就是,通过沿着在片B和C间连接的中心线切割封装树脂部分11,第一导电薄膜7与第二导电薄膜8分离,形成如图2A,图2B和图10中所示的电子元件。
电子元件12的导电突起部分13由导电材料构成,该导电材料填满如先前被提及的在绝缘衬底15上形成的细孔16a和16b。导电突起部分13a和13b的每个具有一个根部,该根部具有40-100μm的直径和20-100μm的高,其功能作为在一个外围的印刷线衬底上在电子元件安装表面通过电子元件粘合剂的衬垫,因此,即使电子元件12被压到安装衬底上,在导电薄膜7和8下面可能具有一个足够厚的导电粘合剂层,以致于能实现可靠的安装。
在描述的实施例中,导电突起部分13通过使用其中预先形成的有细孔16的绝缘衬底15形成。然而,导电突起部分可通过图11中所示的方法来形成。如图11所示,在绝缘衬底15上形成导电薄膜7和8后,使用加压部件160的平面通过将导电薄膜压入到绝缘薄膜,来局部地将导电薄膜7和8挤进绝缘衬底15,从而具有细多个小的突起部分161。在绝缘衬底15被剥去后,导电薄膜7和8的被挤压的部分变成导电突起部分131。
可选择的,当在第一导电薄膜7上的半导体芯片9通过焊接线10连接到第二导电薄膜8上时,在通过焊接线10电连接半导体芯片9到第二导电薄膜的过程中,使用具有锐利末端的一个焊接工具通过局部挤压第二导电薄膜8进入绝缘衬底15内来形成导电突起部分,以至焊接工具的一部分突出到绝缘衬底15内。也就是说,部分导电薄膜通过焊接工具的锐利末端挤压,变成导电突起部分。在这种情况下,特定的布线衬底和特定挤压部件就变成多余。
在如上所述的电子元件中,具有绝缘形状的导电突起部分13被排列在导电薄膜7和8上。然而,导电突起部分的形状不受限于该绝缘区。例如,导电突起部分可能具有如图12中所示的线段形状或如图13中所示的环形形状。通过在绝缘衬底中形成连续的槽,是可以很容易形成连续的导电突起部分的,例如,用激光照射绝缘衬底15,通过一个划线器或沿着直线蚀刻它,然后在槽上形成导电薄膜。此外,在如图14中所示的第一和第二导电薄膜7和8的附近,通过形成沿着连接在第一和第二导电薄膜7和8之间的连接片B和C连接的中心轴延伸的连续槽,是可能形成导电突起部分13的。这样,通过导电突起部分13围绕各自的导电薄膜7和8是可能的。
值得注意的是,本发明并不限定于前述的实施例,并且不仅仅能适用于外径不大于1mm的电子元件,而且也适用于外径大于1mm的电子元件。用于电连接半导体芯片9到导电薄膜8的连接装置不限定于焊接线。可以使用一个导电带而不是焊接线。此外,通过在半导体芯片的背面上而不是在它的上表面的电极板上形成突起部分,可以在导电薄膜7和导电薄膜8之间安装控制一个跨越边界的半导体芯片9,从而直接地连接半导体芯片到各个导电薄膜7和8。
电子元件的导电薄膜7的数目和导电薄膜8的数目可以通过用于外部连接半导体芯片9的电极数目来确定。
值得注意的是,本发明不限定于上述的实施例,通过树脂被封装的元件不仅可是有源元件,例如半导体芯片或半导体片状器件,而且可以是一个无源元件例如电阻,电容器或电感器。
按照本发明,如上文所述,在由导电带所定义的空间中,可以保持具有一个预定厚度的导电粘合剂,并且安装电子元件中的导电薄膜在印刷线衬底上甚至具有比1mm更小的外围尺寸,因此当装配电子元件时,以便因此限制了导电粘合剂的鼓起和/或导电粘合剂的形状变化。因此,甚至当第一导电薄膜7和第二导电薄膜8彼此互相接近时,可以防止由于电极间的电桥造成的短路。因此,可以实现一个紧凑并且容易安装的电子元件。
Claims (6)
1.一个电子元件,包括:
第一导电薄膜,具有安装电子元件的一个表面以及具有第一导电突起部分的另一表面;
在与所述第一导电薄膜基本相同的平面中提供第二导电薄膜,所述第二导电薄膜具有电连接到所述电子元件的电极的一个表面和具有第二导电突起部分的另一表面;和
一个用于覆盖所述电子元件的封装树脂部分,所述封装树脂部分形成在所述第一导电薄膜的所述一个表面上和所述第二导电薄膜的所述一个表面上。
2.如权利要求1所述的电子元件,其中所述导电突起部分分别采用绝缘区的形式。
3.如权利要求1所述的电子元件,其中所述导电突起部分分别采取连续突起部分的形式。
4.一种电子元件的制造方法,包括步骤:
在树脂薄膜的主表面的其中之一上形成至少一组第一导电区域和一组第二导电区域,所述第一和第二导电区域分别具有在所述树脂薄膜的侧面上突起的导电突起部分;
在所述第一导电区域的组上固定电子元件;
电性连接所述电子元件的电极到所述第二导电区域的所述组;
通过一个封装树脂部分在所述树脂薄膜上覆盖所述电子元件;
通过从所述第一和第二导电区域的组中剥去所述树脂薄膜,同时在所述封装树脂部分中剩下所述第一和第二导电区域,在所述封装树脂部分的一个表面中,暴露具有所述导电突起部分的所述导电区域的组和具有所述导电突起部分的所述第二导电区域的组;以及
切去所述封装树脂部分以至于分离各个电子元件。
5.如权利要求4所述的电子元件的制造方法,其中通过形成所述第一导电区域的组和所述第二导电区域的组来形成所述导电的突起部分,以便在所述树脂薄膜的所述一个主表面的预定位置中预先形成的细孔被所述第一和第二导电区域的材料所填充。
6.如权利要求4所述的电子元件的制造方法,其中所述导电突起部分通过如下步骤来形成,在覆盖步骤之前,通过局部的挤压在所述树脂薄膜上形成的所述第一和第二导电薄膜,以使所述导电薄膜的局部挤压的部分伸出进入到所述树脂薄膜中。
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JP4611569B2 (ja) * | 2001-05-30 | 2011-01-12 | ルネサスエレクトロニクス株式会社 | リードフレーム及び半導体装置の製造方法 |
US7177143B1 (en) | 2002-08-05 | 2007-02-13 | Communication Associates, Inc. | Molded electronic components |
US20050005436A1 (en) * | 2003-07-09 | 2005-01-13 | Jung-Chien Chang | Method for preparing thin integrated circuits with multiple circuit layers |
US20050009242A1 (en) * | 2003-07-09 | 2005-01-13 | Jung-Chien Chang | Packaging method for thin integrated circuits |
JP2006093575A (ja) * | 2004-09-27 | 2006-04-06 | Hitachi Cable Ltd | 半導体装置およびその製造方法 |
US20060131708A1 (en) * | 2004-12-16 | 2006-06-22 | Ng Kee Y | Packaged electronic devices, and method for making same |
JP2008130812A (ja) * | 2006-11-21 | 2008-06-05 | Mitsubishi Electric Corp | 表面実装型電子部品及びその実装構造 |
WO2009118916A1 (en) * | 2008-03-27 | 2009-10-01 | Nec Corporation | Multi-chip hybrid-mounted device and method of manufacturing the same |
DE202008005708U1 (de) * | 2008-04-24 | 2008-07-10 | Vishay Semiconductor Gmbh | Oberflächenmontierbares elektronisches Bauelement |
US8240036B2 (en) | 2008-04-30 | 2012-08-14 | Panasonic Corporation | Method of producing a circuit board |
JP5543489B2 (ja) * | 2008-12-23 | 2014-07-09 | ノベリス・インコーポレイテッド | 多層金属シート |
EP2496061A4 (en) | 2009-10-30 | 2014-01-08 | Panasonic Corp | PRINTED CIRCUIT BOARD AND SEMICONDUCTOR DEVICE COMPRISING A COMPONENT MOUNTED ON A PRINTED CIRCUIT BOARD |
US9332642B2 (en) * | 2009-10-30 | 2016-05-03 | Panasonic Corporation | Circuit board |
WO2011087168A1 (ko) * | 2010-01-15 | 2011-07-21 | 삼성엘이디 주식회사 | 인쇄회로기판 |
US9418919B2 (en) * | 2010-07-29 | 2016-08-16 | Nxp B.V. | Leadless chip carrier having improved mountability |
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JP6984183B2 (ja) * | 2017-06-05 | 2021-12-17 | 富士電機株式会社 | 半導体パッケージ、半導体装置および半導体装置の製造方法 |
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US5200362A (en) * | 1989-09-06 | 1993-04-06 | Motorola, Inc. | Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film |
FR2734983B1 (fr) * | 1995-05-29 | 1997-07-04 | Sgs Thomson Microelectronics | Utilisation d'un micromodule comme boitier de montage en surface et procede correspondant |
US5977613A (en) * | 1996-03-07 | 1999-11-02 | Matsushita Electronics Corporation | Electronic component, method for making the same, and lead frame and mold assembly for use therein |
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JP2002016181A (ja) | 2000-04-25 | 2002-01-18 | Torex Semiconductor Ltd | 半導体装置、その製造方法、及び電着フレーム |
JP4731021B2 (ja) * | 2001-01-25 | 2011-07-20 | ローム株式会社 | 半導体装置の製造方法および半導体装置 |
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JP3942457B2 (ja) | 2007-07-11 |
JP2003258007A (ja) | 2003-09-12 |
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