CN1292627C - 电路基板 - Google Patents
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Abstract
在液晶显示器的玻璃基板上形成电极部分,IC电路的金属电极(块体)从上部与之连接。通过在层间介电薄膜中与金属布线相对应的部分形成开口、并且在开口部分形成平台形状的电极焊盘来形成电极部分。在本发明中,电极焊盘的平面形状比层间介电薄膜的开口部分小。因此,能够改善围绕电极部分的外围表面的平坦特性。由此,能够高可靠性地连接集成电路器件(IC)或半导体芯片。
Description
技术领域
本发明涉及一种具有与集成电路器件(IC)或半导体裸片(bare chip)相连接的电极部分的电路基板。
本申请要求2003年8月22日提出的日本专利申请的优先权,其全部内容在此引用作为参考。
背景技术
近年来为了实现液晶显示器的小型化,将用作驱动电路、外围电路等的集成电路器件(IC)或半导体裸片直接附着(attach)到在其上形成液晶显示部分的玻璃基板的外边缘部分。
例如,如图1A所示,当IC 101直接附着到围绕液晶显示部分201的玻璃基板202的外边缘部分时,在IC 101的底面部分103上设置用作连接端子的突出型块体102。此外,如图1B所示,在围绕液晶显示部分201的玻璃基板202的外边缘部分,形成向上暴露的电极部分203。另外,如图1C所示,尽管块体102设置在与电极部分203相对应的位置,但IC 101是在压力下通过各向异性导电薄膜301从较高部分朝向较低部分附着到液晶显示部分201上。因此,IC 101固定到围绕液晶显示部分201的外边缘部分,并且IC 101的内部布线与液晶显示部分201的内部布线相连接。
下面将详细说明在围绕液晶显示部分的外边缘部分上形成电极部分203的过程。
如图2A所示,在其上形成有液晶显示部分的玻璃基板202上,形成层间介电薄膜204。此外,在玻璃基板202和层间介电薄膜204之间形成金属布线205。当形成电极部分203时,首先将层间介电薄膜204部分打开形成开口部分206,金属布线205从开口部分206向上暴露。然后,如图2B所示,在开口部分206形成用金属材料制成的电极焊盘207。此时,在比开口部分206大的面积中形成电极焊盘207,以便确保与金属布线205接触。也就是说,在包括围绕开口部分206的外边缘部分的层间介电薄膜204在内的位置处形成电极焊盘207。
接着,如图2C所示,形成具有绝缘特性的平面(planarizing)薄膜208,然后打开其上形成有电极焊盘207的部分以完成电极部分203。
在如上所述的普通电极部分203中,在电极焊盘207的外边缘部分和电极焊盘207的中心部分产生台阶(在薄膜厚度的方向上位置不同,例如,图3中的A1部分)。在层间介电薄膜204中产生与电极焊盘207的厚度相应的台阶(例如,图3中的A2部分)。通常,为了消除这些台阶,所述具有绝缘特性的平面薄膜208用于涂覆。但是,使其完全地变平非常困难(例如,图3中的A3部分)。
由于不能完全执行平面化的处理,当在压力下附着IC 101的块体102并将其连接到电极焊盘207时,则在块体102和电极焊盘207的连接部分中在薄膜的厚度方向上产生位移(例如,图3中的A4部分),导致有缺陷的电连接。
在普通的电极部分203中,形成电极焊盘207突出到层间介电薄膜204。由此,邻近电极部分203的电极焊盘207可能彼此接触(例如,图3中的A5部分)。另外,由于在平面方向上的微小位移可能导致产生诸如层间介电薄膜204或电极焊盘207折断,这也是导致产品成品率或可靠性下降的一个因素。此外,形成电极焊盘207突出到层间介电薄膜204中,使得邻近电极部分203之间的间距受到限制,而使间距变窄又很困难。
另外,近年来为了减小布线阻抗,布线图案的厚度和电极焊盘的厚度增大。因此,在层间介电薄膜204中,形成相应于电极焊盘207的台阶。该台阶不期望地增加很大。结果,增加了平面薄膜208上不规则部分中的台阶(例如,图3中的A3部分)。因此,产生不期望的平面薄膜208的图案被剥离的缺陷(参见日本专利申请第hei10-161140号)。
发明内容
本发明的目的是提供一种具有与集成电路器件(IC)或半导体裸片能够可靠连接的电极的电路基板。
根据本发明的电路基板包括:具有绝缘特性的基板;在基板上形成的绝缘薄膜;在基板上形成的布线;以及用导电材料制成的电极焊盘,与所述布线相连接,并且外部设备的连接端子从上部与其连接。绝缘薄膜形成开口,以便使电极焊盘朝上暴露,并且电极焊盘比在相应位置上形成的开口小。
另外,根据本发明的电路基板还包括在绝缘薄膜上形成的保护薄膜。保护薄膜上形成开口,以便使电极焊盘朝上暴露,并且保护薄膜的开口比电极焊盘小。
在根据本发明的如上所述的电路基板,电极焊盘的尺寸在平面方向上比在绝缘薄膜上形成的开口小。
因此,在根据本发明的电路基板中,可以改善绝缘薄膜的平面化。结果,例如当通过从上部附着集成电路器件或半导体裸片而将IC电连接到电路时,能够减少附着的不足,并且能够高可靠性地执行附着操作。
附图说明
图1是用于说明在压力下将IC的块体附着到电极部分的传统方法的图。
图2是用于说明形成电极部分的传统方法的图。
图3是用于说明传统的电极部分存在的问题的图。
图4是应用本发明的系统显示器的示意平面图。
图5是IC或类似器件从系统显示器中移除以暴露电极的示意平面图。
图6示出在层间介电薄膜上形成开口部分后电极部分的图。
图7示出在第二电极焊盘形成之后电极部分的图。
图8示出完整的电极部分。
图9示出各向异性导电薄膜迁移到电极部分的截面图。
图10是用于说明在压力下将IC附着到电极部分的方法的截面图。
图11示出附着有IC的电极部分的截面图。
图12是带有ITO的电极部分的截面图。
图13是形成有一个电极焊盘的电极部分的截面图。
图14形成有一个电极焊盘并带有ITO的电极部分的截面图。
具体实施方式
下面作为实施本发明的最佳模式将描述应用本发明的系统显示器。
图4是应用本发明的系统显示器10的平面示意图。
系统显示器10包括作为透明绝缘基板的平板型玻璃基板11、以及在玻璃基板11的中心部分形成的矩形液晶显示部分12。此外,在系统显示器10中,在没有形成液晶显示部分12的玻璃基板11的外边缘部分连接供应电源的电源电缆13和用于在外部设备和系统显示器之间发送及接收诸如视频信号的数据信号的柔性电缆14。另外,在系统显示器10中,在没有形成液晶显示部分12的玻璃基板11的外边缘部分附着用于控制功率的功率系统控制IC 16、用于根据用来显示图像的视频信号驱动液晶显示部分12的驱动IC 15a、15b和15c、以及用于存储数据的存储IC 17。此外,在柔性电缆14上附着用于控制数据信号的输入和输出的I/O控制IC 18。
这里,通过称作面朝下的方法各种类型的电缆13和14以及不同类型的IC 15至18机械地附着到玻璃基板11上,并且内部布线内部电连接到在玻璃基板11中形成的布线。电连接以如下方式实现,即,允许在各种类型的电缆13和14以及不同类型的IC 15至18的背面上设置的称作突出块体的连接终端从上部紧靠分别在玻璃基板11或柔性电缆14上IC的附着位置处形成的电极部分20,如图5所示。
下面将参照图6、7和8详细描述在玻璃基板11上形成电极部分20的处理过程。图6A至8A是电极部分20的平面图。图6B至8B示出沿着图6A至8A中的线B-B’的截面图。图6C至8C示出沿着图6A至8A中的线C-C’的截面图。
首先,如图6所示,在玻璃基板11上淀积电极部分20的预定位置处形成第一电极焊盘21。第一电极焊盘21连接到系统显示器10的内部布线22。第一电极焊盘21用热膨胀系数与玻璃基板11的热膨胀系数相匹配且具有导电特性的材料例如Mo制成。通过淀积方法或电子束方法形成厚度为30nm至500nm的第一电极焊盘21,然后通过微机械加工技术将其处理为30μm至40μm的宽度,从而在预定位置形成。
接着,在形成第一电极焊盘21之后,在玻璃基板11上形成作为绝缘薄膜的层间介电薄膜23。层间介电薄膜23是以例如SiOx、SiNx等作为主要成分构成的薄膜,并且通过例如CVD方法形成大约300nm至1μm的厚度。
然后,通过例如蚀刻技术在形成第一电极焊盘21的层间介电薄膜23的位置(安排电极部分20的预定位置)被打开以形成开口部分24,并将用作基底(bed)的第一电极焊盘21从开口部分24向上暴露。仅将第一电极焊盘21从开口部分24暴露,而并不希望暴露玻璃基板11。
接着,如图7所示,在从开口部分24暴露出的第一电极焊盘21上形成第二电极焊盘25。第二电极焊盘25以至少在平面方向上比开口部分24的开放部分要小的平台形状形成。也就是说,在第二电极焊盘25的侧壁部分和围绕开口部分24的外边缘的侧壁之间为暴露第一焊盘21的空间区域26。换句话说,如此形成第二电极焊盘25以便不被层间介电薄膜23覆盖。第二电极焊盘25用例如Al的导电材料形成。第二电极焊盘25通过例如淀积方法、电子束方法等形成为200nm至1000nm,然后通过例如蚀刻技术形成为平台形状。
第二电极焊盘25的高度在厚度方向上最好基本上与层间介电薄膜23的高度相同。第一电极焊盘21和第二电极焊盘25的材料不仅限于Mo和Al的组合。作为第一电极焊盘21的材料,可以适用几乎不影响蚀刻第二电极焊盘25的材料。此外,当将Al用作第二电极焊盘25的材料时,根据处理条件可以使用高纯度的Al以及包括百分之几的Si、Cu、Nd、Ti等。
接着,在形成第二电极焊盘25之后,在玻璃基板11上形成具有绝缘特性的平面薄膜27。平面薄膜27是包括例如SiOx、SiNx、或有机绝缘薄膜作为主要成分的薄膜。通过例如CVD方法或旋转涂覆(spin coat)方法形成大约300nm至1μm厚的平面薄膜。在形成薄膜之后,使表面平坦。
然后,如图8所示,通过例如蚀刻技术在形成第二电极焊盘25的平面薄膜27的位置(也就是布置电极部分20的预定位置)被打开以形成开口部分28,并将用作基底的第二电极焊盘25从开口部分28向上暴露。仅将以平台形状形成的第二电极焊盘25的上表面部分从开口部分28暴露。也就是说,如此形成开口部分28使得第二电极焊盘25的侧壁部分或外边缘被平面薄膜27覆盖。当如上所述形成开口部分28时,由于第二电极焊盘25的高度基本上与层间介电薄膜23的高度相对应,因此不会在平面薄膜27的表面上形成台阶。
当完成上述开口部分28的形成时,在系统显示器10的玻璃基板11上形成电极部分20。
下面将描述直接将IC附着到没有形成液晶显示部分12的一部分玻璃基板11上的方法。
首先,如图9所示,将在厚度方向上具有导电特性的粘性各向异性导电薄膜(ACF)31迁移到玻璃基板11上IC或电缆连接器的附着位置。
接着,如图10所示,将在其底部表面部分32上设置有突出块体33的IC 34布置在玻璃基板11的预定位置上。块体33是用金属材料制成的连接到IC 34中的布线的外部连接端子。然后,在调整玻璃基板11和IC 34的相对位置以便块体33与相应的电极部分20相对应的同时,在压力下将IC 34从上部附着到玻璃基板11上。
结果,如图11所示,块体33的末端部分紧靠暴露在电极部分20的底部表面部分上的第二电极焊盘25的上表面部分。由此,第二电极焊盘25电气和机械连接到块体33。相应地,IC 34中的电路布线连接到系统显示器10中的电路布线。
各向异性导电薄膜31用于将IC 34机械固定到玻璃基板11上,并且在厚度方向上具有高阻抗特性以便去除高频噪声。
如上所述,在系统显示器10中,第二电极焊盘25的尺寸在平面方向上比在层间介电薄膜23中形成的开口部分的尺寸小。
因此,在系统显示器10中,可以改善在层间介电薄膜23上形成的平面薄膜27的表面的平坦特性。结果,当从上部附着集成电路器件或半导体裸片以便将IC电气连接到电路上时,能够减少附着的不足,并且能够高可靠性地执行附着操作。
在上面描述的系统显示器10中,将块体直接连接到第二电极焊盘25,但是,例如如图12所示,可以在第二电极焊盘25上进一步形成诸如ITO的透明电极41。此外,如图13所示,可以采用将第一电极焊盘21排除在外的电极结构。另外,如图14所示,诸如ITO的透明电极41可以在将第一电极焊盘21排除在外的该结构中提供。
在系统显示器10中,玻璃基板10用作基板。但是,可以使用任何具有绝缘特性的基板,而不仅限于玻璃基板11。本发明可以应用到柔性基板中。此外,不仅可以将集成电路器件(IC)连接到绝缘基板,而且可以将块体提供到半导体裸片或柔性基板例如TCP(Tape-CarrierPackage,磁带载体封装)的底部表面上并连接到绝缘基板上。
虽然在上面的描述中参照附图详细描述了本发明的优选实施例,但是对于本领域的技术人员应该理解本发明不仅限于上述这些实施例,而是在不脱离所附权利要求所限定的本发明的精神和范围的情况下,可以进行各种其他变更、修改、或者等价替换。
Claims (2)
1.一种电路基板,包括:
具有绝缘特性的基板;
在所述具有绝缘特性的基板上形成的绝缘薄膜;
在所述具有绝缘特性的基板上形成的布线;以及
用导电材料制成的电极焊盘,与所述布线相连接,并且外部设备的连接端子从上部与所述电极焊盘连接;其中,绝缘薄膜形成开口,以便使电极焊盘朝上暴露,并且电极焊盘比在相应位置上形成的开口小,
所述电路基板还包括:
在绝缘薄膜上形成的保护薄膜,其中在保护薄膜上形成开口,以便使电极焊盘朝上暴露,并且保护薄膜的开口比电极焊盘小。
2.根据权利要求1所述的电路基板,其中绝缘薄膜的厚度与电极焊盘的厚度相同。
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CN100355327C (zh) * | 2005-03-25 | 2007-12-12 | 华为技术有限公司 | 一种印制电路板及其制造方法 |
US7312142B2 (en) * | 2005-04-13 | 2007-12-25 | Mutual Pak Technology Co., Ltd. | Method for making cable with a conductive bump array, and method for connecting the cable to a task object |
TWI457671B (zh) | 2008-11-10 | 2014-10-21 | Au Optronics Corp | 平面顯示器之玻璃基板及顯示用之積體電路晶片 |
JP4303282B2 (ja) * | 2006-12-22 | 2009-07-29 | Tdk株式会社 | プリント配線板の配線構造及びその形成方法 |
JP4331769B2 (ja) * | 2007-02-28 | 2009-09-16 | Tdk株式会社 | 配線構造及びその形成方法並びにプリント配線板 |
JP4800253B2 (ja) * | 2007-04-04 | 2011-10-26 | 新光電気工業株式会社 | 配線基板の製造方法 |
TWI376020B (en) * | 2007-12-12 | 2012-11-01 | Au Optronics Corp | Chip on film structure |
KR101593538B1 (ko) | 2009-04-09 | 2016-02-29 | 삼성디스플레이 주식회사 | 박막트랜지스터 기판의 제조 방법과 이에 의한 박막트랜지스터 기판 |
US10510821B2 (en) | 2016-06-10 | 2019-12-17 | Innovation Counsel Llp | Display device |
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CN109065507B (zh) * | 2018-08-09 | 2020-08-04 | 武汉华星光电半导体显示技术有限公司 | 显示面板 |
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DE69133359T2 (de) * | 1990-08-03 | 2004-12-16 | Canon K.K. | Verfahren zur Herstellung eines SOI-Substrats |
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US6245594B1 (en) * | 1997-08-05 | 2001-06-12 | Micron Technology, Inc. | Methods for forming conductive micro-bumps and recessed contacts for flip-chip technology and method of flip-chip assembly |
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US6642136B1 (en) * | 2001-09-17 | 2003-11-04 | Megic Corporation | Method of making a low fabrication cost, high performance, high reliability chip scale package |
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US6911386B1 (en) * | 2002-06-21 | 2005-06-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated process for fuse opening and passivation process for CU/LOW-K IMD |
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