CN1262873C - 一种液晶显示器阵列衬底的制造方法 - Google Patents
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Abstract
一种液晶显示器阵列衬底的制造方法包括以下步骤:通过在一衬底上形成一金属材料,在该衬底上形成一选通线和一栅极;在该衬底上形成一选通绝缘层;在该选通绝缘层上形成一有源层和一欧姆接触层;在该衬底上形成一数据线、一源极和一漏极;通过在该衬底上淀积一绝缘材料形成一钝化层;通过对该钝化层制作图案形成一漏极接触孔,该漏极接触孔露出漏极的一部分;在该钝化层上形成一透明金属层;在该透明金属层上形成一阻光层;通过将一掩模设置在阻光层之上来执行一曝光过程,该掩模包括一阻光部分、一缝部分和一透光部分;通过对曝光的阻光层进行显影和对所曝光的透明金属层进行蚀刻,形成一象素电极。
Description
发明背景
本申请要求享有在韩国2001年3月29日提出的第2001-0016628号韩国申请的利益,它在此引入以做参考。
技术领域
本发明涉及一种液晶显示器,尤其涉及一种液晶显示器阵列衬底的制造方法。
背景技术
随着信息时代的迅速发展,需要特点为薄、重量轻且功耗低的平板显示器。这种液晶显示器广泛用于笔记本计算机和台式监视器等,因为其分辨率高、彩色图像显示好且显示的图像品质高。这种液晶显示器利用液晶的光学各向异性显示图像,它由上衬底、下衬底和设置在上、下衬底之间的液晶组成。
图1是一分解透视图,它示出一传统的彩色液晶显示器11。如图所示,上衬底5包括一滤色镜7和一透明公共电极18。滤色镜7包括一黑色矩阵6和副滤色镜R、G和B 8。下衬底22包括一象素区“P”、该象素区中的象素电极17和包括一开关元件“T”的阵列线。液晶14夹在上衬底5与下衬底22之间。下衬底22称为阵列产地。多条选通线13和多条数据线15相互交叉限定象素区“P”,而多个薄膜晶体管“T”即使开关元件形成于选通线13与数据线15的交叉点处。象素区“P”中的象素电极17由透明导电材料如具有高透射率的铟锡氧化物(ITO)制成。
液晶14由一信号排列,该信号来自薄膜晶体管“T”,而根据液晶的排列控制透过液晶14的光量,以显示图像。一个在传统液晶显示器中必需克服的重要问题是,为了更清晰和明亮地显示图像,要获得很高的孔径比。影响孔径比的主要因素是具有如上所述阵列结构的液晶显示器中的数据线。
以下参照图2描述数据线与象素区之间的关系。图2是一平面图,它示出一传统液晶显示器的部分阵列衬底。如图所示,多条选通线13和多条数据线15相互交叉,在阵列衬底上限定象素区“P”,而多个包括栅极30、源极32、漏极34和有源层36的薄膜晶体管“T”形成于选通线13与数据线15的交叉点处。接触漏极30的象素电极17形成于象素区“P”之上,而形成带有象素电极17的并联电路(parallel circuit)的存储电容器“C”形成于选通线13之上。存储电容器“C”由第一存储电极13a和第二存储电极39组成,第一存储电极13a是选通线13的一部分,第二存储电极39由与源极32和漏极34相同的材料以一岛形制成。第二存储电极39通过存储接触孔40接触象素电极17。
在上述阵列衬底22结构中的液晶板孔径比随象素区“P”增加而增大。可以把减小数据线15的宽度作为一种用来放大象素区“P”的方法,象素电极与相邻的象素电极之间的距离必须减小到使数据线15的宽度变窄。但是,当采用一用于曝光过程的传统掩模时,在4微米下减小象素电极17与相邻限定电极17之间的距离是有限制的。
下文将参照图3A至3F描述一传统液晶显示器的阵列衬底的制造方法。图3A至3F是沿图2线III-III所取的剖视图,它们示出一种根据已有技术的液晶显示器陈列衬底的制造方法。这里,将关于一选通型存储的存储电容器作为一个例子。反向交错型薄膜晶体管通常用于一种通用液晶显示器,因为其结构简单、性能良好。根据沟道形成方法,这种反向交错型薄膜晶体管可以分成后沟道蚀刻(back channel etch)(BCE)型和蚀刻阻挡(etch stopper)(ES)型。这里将参照后沟道蚀刻型薄膜晶体管进行描述。
首先,一玻璃衬底经受一清洗处理过程,以从该衬底上去除污物或有机材料,并且增大用于栅极材料的金属薄膜与玻璃衬底之间的粘性。
图3A中,通过用第一掩模淀积金属材料并且对其制作图案,在衬底22上形成图2中的栅极30和选通线13。图2中选通线13的一部分用作图2中的第一存储电极13a。具有低电阻的铝(Al)通常选为栅极材料以降低RC延迟。但是,由于纯铝(Al)对化学物质的耐腐蚀性差,并且因后而的高温处理过程中小丘形成而导致产生不完整的线,所以用铝合金代替纯铝或其他材料如铝钕(AlNd)、钼(Mo),例如,它们可以形成于纯铝(Al)上以防小丘形成。栅极30和第一存储电极13a从选通线延伸出去,考虑到它们的功能,它们分别称为栅极30和第一存储电极13a。通过在衬底22上淀积或涂敷无机绝缘材料如二氧化硅(SiO2)和氮化硅(SiNx)或者有机绝缘材料如苯并环丁烯(benzocyclobutene)(BCB)和丙烯酸树脂,从而在衬底22上形成选通绝缘层50。
图3B中,在选通绝缘层50上淀积非晶硅(a-Si:H)和掺杂的非晶硅,以形成一半导体层。通过用第二掩模对该半导体层制作图案而形成一有源层36和一欧姆接触层38。该欧姆接触层38用来减小有源层36与一要在以下处理过程中形成的金属层之间的接触电阻。
图3C中,通过用第三掩模将金属导电材料如铬(Cr)、钼(Mo)、钨(W)、锑(Sb)和钽(Ta)淀积在整个衬底上并且对其制作图案,形成图2中的数据线15、源极32、漏极34和第二存储电极39。漏极34与源极32间隔开。数据线15如图所示制作成最小宽度为8微米。由于将在后面的处理过程中形成于数据线15之上的该象素电极与相邻象素电极之间的最短距离为4微米,并且数据线15的两侧至少应与这些象素电极交叠2微米,所以根据已有技术,数据线15的最小宽度为8微米。
图3D中,接着通过将一种透明有机绝缘材料如苯并环丁烯(BCB)或丙烯酸树脂淀积或涂敷在整个衬底上,形成钝化层52。通过用第四掩模对该钝化层52制作图案,形成暴露漏极34一部分的漏极接触孔54和图2中暴露第二存储电极39一部分的存储接触孔40。
图3E中,通过将一种透明导电材料如铟锡氧化物(ITO)或铟锌氧化物(IZO)淀积在该钝化层52上,在该钝化层52上形成一透明导电金属层58。阻光材料层60形成于该透明导电金属层58上。由透光部分“E”和阻光部分“F”组成的第五掩模62设置在阻光层60之上,然后进行曝光。与数据线15、选通线(图中未示)和薄膜晶体管“T”相应的阻光层部分受到如图所示“G”曝光,用一显影器去除阻光层60的曝光部分。把与阻光层60的去除部分相对应的透明导电金属层58蚀刻掉。
如图3F所示,通过以上过程形成象素电极17。象素电极17通过漏极接触孔54接触漏极34,并且通过图2中的存储接触孔40接触图2中的第二存储电极39。长2微米的象素电极17在数据线15的两侧与数据线相交叠,如图所示,各象素电极17之间的距离为4微米。各象素电极17之间的距离可以在以下条件下形成为有一最小值,即,在象素电极17与相邻象素电极17相互之间没有电影响的条件下。通常,满足以上条件的最小距离已知为2微米。因此,如果象素电极17与相邻象素电极17之间的距离最小可以达到2微米,那么数据线15的宽度也可以减小那么多。因此,孔径比可以因占据液晶板非驱动区域的数据线宽度减小而得到改善。
但是,当采样传统曝光方法时,象素电极17与相邻象素电极17之间的距离无法窄到4微米以下。下文将参照图4详细描述其原因。图4是示出一掩模缝(mask slit)结构和从根据已有技术的掩模结构中得到光强曲线的图。当光透过具有单一缝的掩模62透光部分“E”时,光因Fraunhofer衍射作用受到衍射,光的光强分布到达衬底22。此时,光强分布的宽度与掩模62的透光部分“E”的宽度“b”成反比,而与该光的波长λ成正比。最亮的光强“L”出现在与掩模62透光部分“E”的中部相对应的区域中,而光强与该掩模62透光部分“E”的宽度“b”成比例。通过该掩模62透光部分“E”衍射的光的光强可以以数值表达形式表示如下:
I=Io(sinβ/β)2,
这里,β=(1/2)kbsinθ,
其中sinθ=2π/kb=λ/b,
这里,k是传播常数,I是光强,λ是光的波长,b是掩模透光部分的宽度,θ是光前进方向的衍射角。如可从以上数值表达式看到的那样,仅通过减小衍射角θ以减小光强分布的宽度,可以使阻光层60完全曝光。如果当波长λ保持在常值时透光部分“E”的宽度“b”增大,那么光强曲线“I”的宽度变窄,由此可以实现完全的曝光“Ia”。另一方面,如果当波长λ保持在常值时透光部分“E”的宽度“b”变窄,那么由于衍射角θ增大因而光强曲线“H”的宽度变大,导致光强减弱,所以仅阻光层60的上部“Ha”受到曝光。在这两种情况下,由于光强从衍射角θ为零的点迅速减小,由此用于曝光的光量不足,所以阻光层60的曝光状态变得无规律。因此,当采用单缝掩模时,应当确定掩模62透光部分“E”的宽度“b”,以使阻光层60均匀曝光。所以,在减小掩模62透光部分“E”的宽度方面有限制,由此在减小象素电极与相邻象素电极之间的距离方面也有限制。
当考虑掩模62透光部分的宽度“b”与曝光过程的光强分布之间的关系时,可以通过传统的光刻掩模法实现的象素电极17与相邻象素电极17之间的最小距离是4微米。因此,当考虑象素电极17与相邻象素电极17之间4微米的最小距离和象素电极与数据线15在数据线15两侧的两个交叠宽度2微米时,应当根据已有技术对数据线15制作图案,使其具有8微米的最小宽度。由于如上所述在减小数据线15的宽度方面有限制,所以很难再改善孔径比。
发明内容
因此,本发明涉及一种液晶显示器阵列衬底的制造方法,它基本上避免了因已有技术的限制和缺点带来的一个或多个问题。
本发明的一个优点在于,提供一种液晶显示器阵列衬底的制造方法,其中在象素电极的光刻掩模法中采用有两条缝的掩模,以减小一个象素电极与一个相邻象素电极之间的距离,由此减小数据线的宽度,改善孔径比。
本发明的其他特征和优点将在以下的描述中列出,从该描述中它们一部分可以变得很显然,或者可以通过对本发明的实践来学会。本发明的目的和其他优点将通过所写的说明书及其权利要求书以及附图中所特别指出的结构实现和达到。
为了实现这些和其他优点,根据本发明的目的,如所具体实施和概括描述的那样,一种液晶显示器阵列衬底的制造方法包括以下步骤:在一衬底上形成一选通线和一栅极;在该衬底上形成一选通绝缘层;在该选通绝缘层上形成一有源层和一欧姆接触层;在该衬底上形成一数据线、一源极和一漏极;通过在该衬底上淀积绝缘材料形成一钝化层;通过对该钝化层制作图案形成一漏极接触孔,该漏极接触孔露出漏极的一部分;在该钝化层上形成一透明金属层;在该透明金属层上形成一阻光层;通过将一掩模设置在阻光层之上来执行一曝光过程,该掩模包括一阻光部分、一缝部分和一透光部分;通过对曝光的阻光层进行显影和对所曝光的透明金属层进行蚀刻,形成一象素电极。该掩模的阻光部分对应于象素电极区,该掩模的透光部分对应于薄膜晶体管,该缝部分对应于数据线。该象素电极与相邻象素电极之间的距离为2到3.5微米。象素电极与数据线一侧之间的交叠宽度为2微米。数据线的宽为了实现这些和其他优点,根据本发明的目的,如所具体实施和概括描述的那样,一种液晶显示器阵列衬底的制造方法包括以下步骤:在一衬底上形成一选通线和一栅极;在该衬底上形成一选通绝缘层;在该选通绝缘层上形成一有源层和一欧姆接触层;在该衬底上形成一数据线、一源极和一漏极;通过在该衬底上淀积绝缘材料形成一钝化层;通过对该钝化层制作图案形成一漏极接触孔,该漏极接触孔露出漏极的一部分;在该钝化层上形成一透明金属层;在该透明金属层上形成一阻光层;通过将一掩模设置在阻光层之上来执行一曝光过程,该掩模包括一阻光部分、一缝部分和一透光部分;通过对曝光的阻光层进行显影和对所曝光的透明金属层进行蚀刻,形成一象素电极。该掩模的阻光部分对应于象素电极区,该掩模的透光部分对应于薄膜晶体管,该缝部分对应于数据线。该象素电极与相邻象素电极之间的距离为2到3.5微米。象素电极与数据线一侧之间的交叠宽度为2微米。数据线的宽度为6到7.5微米。该缝部分具有至少两条缝。缝的宽度为1.2微米,各缝之间的距离为0.5微米。
在另一个方面,一种显示器薄膜晶体管阵列衬底的制造方法包括以下步骤:通过淀积和蚀刻第一导电层,在一衬底上形成多条选通线和多个栅极;在该衬底上形成一选通绝缘层,以覆盖这多条选通线和多个栅极;在该选通绝缘层上形成多个岛形有源层和多个岛形欧姆接触层;通过淀积和蚀刻第二导电层,在该选通绝缘层、多个有源层和多个欧姆接触层上形成多条数据线、多个源极和多个漏极;通过在该选通绝缘层上淀积和蚀刻绝缘材料,形成一钝化层以覆盖多条数据线、多个源极和多个漏极,该钝化层具有多个接触孔,这多个接触孔用来暴露多个漏极;在该钝化层上形成与多条数据线相交叠的多个象素电极,至少两个相邻象素电极之间的空间小于3.5微米。该象素电极与相该象素电极与相邻象素电极之间的距离为2到3.5微米。数据线的宽度是6到7.5微米。采用一掩模形成多个象素电极,该掩模包括一阻光部分、一缝部分和一透光部分。该掩模的阻光部分对应于该象素电极,该掩模的透光部分对应于有源层,源极和漏极以及该缝部分对应于数据线。该缝部分具有至少两条缝。缝的宽度为1.2微米,各缝之间的距离为0.5微米。
应当理解的是,前面一般的描述和后面详细的描述是示例性和解释性的,意欲用它们对如所要求保护的本发明作进一步解释。
附图的简要说明
提供对本发明的进一步理解并且包括在说明书内且构成说明书一部分的所包括的附图、本发明的图示实施例连同其描述一起用来解释本发明的原理,这些附图中:
图1是一分解透视图,它示出一传统的彩色液晶显示器;
图2是一平面图,它示出一传统液晶显示器的局部阵列衬底;
图3A至3F是沿图2中线III-III所取的剖视图,它们示出一种根据已有技术的液晶显示器阵列衬底的制造方法;
图4是示出从根据已有技术掩模结构中得到的掩模缝和光强曲线的结构图;
图5是一平面图,它示出根据本发明的用于液晶显示器的局部阵列衬底;
图6A至图6F是沿图5中线VI-VI所取的剖视图,它们示出一种根据本发明的液晶显示器阵列衬底的制造方法;
图7是示出从根据本发明掩模结构中得到的掩模缝和光强曲线的结构图。
5的选通线102和栅极104。图5和图6A中,通过延长选通线102形成栅极104,不过栅极104也可以定义为选通线102的一部分。选通线102的一部分用作图5中的第一存储电极102a。选通线102和栅极104的导电金属材料可以从铬(
Cr)、钼(Mo)、钽(Ta)、锑(Sb)和铜(Cu)组成的金属材料组中选择,铝(Al)基金属材料如纯铝或铝钕(AlNd)也可以用作该金属材料。如果铝(Al)基的金属材料用作选通线102,那么由于铝(Al)基的金属材料有一低的电阻,所以可以减少选通线102中信号的RC延迟。但是,由于铝(Al)基的金属材料对化学物质的耐腐蚀性差,所以可能因蚀刻过程中的蚀刻溶液导致出现断线的情况。因此,可以把对化学物质的耐腐蚀性强的材料如钼(Mo)敷设在铝(Al)基金属材料如纯铝(Al)或铝钕(AlNd)上。通过用一无机绝缘材料如二氧化硅(SiO2)和氮化硅(SoNx),或者用一有机绝缘材料如苯并环丁烯(BCB)和丙烯酸树脂在衬底100上进行淀积或涂敷,形成选通绝缘层106。
图6B示出用第二掩模制造的阵列衬底结构。通过在绝缘层106上淀积一非晶硅层(a-Si:H),然后在该绝缘层106上淀积一掺杂非晶硅层(N+a-Si:H)并且对其制作图案,在该绝缘层106上形成一有源层108和一欧姆接触层110。
图6C示出第三掩模制造的阵列衬底结构。通过在衬底100上淀积导电金属材料如铬(Cr)、钼(Mo)、钽(Ta)、锑(Sb)、铜(Cu)和铝基金属材料如纯铝或铝钕(AlNd)淀积在衬底100上并且对其制作图案,在该衬底100上形成图5中的数据线112、源极114、漏极116和第二存储电极117。漏极116与栅极114间隔开。图5中的第二存储电极117形成于图5中第一存储电极102a之上。欧姆接触层110用来减小有源层108与源极114和漏极116之间的接触电阻。欧姆接触层110在源极114与漏极116之间的那部分被蚀刻掉,以减少漏电。此时,数据线112制作成具有宽度“d”为6到7.5微米。
图6D示出用第四掩模制造的阵列衬底结构。通过将一种有机绝缘材料如苯并环丁烯(BCB)或丙烯酸树脂淀积或涂敷在衬底100上,在该衬底100上形成钝化层118,即第二绝缘层。通过以一光刻掩模法对该钝化层118制作图案,形成穿过钝化层118的暴露漏极116一部分的漏极接触孔120和穿过钝化层118的暴露图5中第二存储电极117一部分的图5中存储接触孔122。
图6E示出用第五掩模制造的阵列衬底结构。通过将透明导电金属材料如铟锡氧化物(ITO)、铟锌氧化物(IZO)和铟锡锌氧化物(ITZO)淀积在钝化层118上,在该钝化层118上形成一透明导电金属层124。阻光材料层126形成于该透明导电金属层124上。由透光部分“J”、阻光部分“E”和双缝部分“F”组成的第五掩模128设置在阻光层126之上,然后进行曝光。阻光部分“E”对应于在接下来的过程中形成的象素电极124a,双缝部分“F”对应于数据线112之上象素电极124a与相邻象素电极124a之间的开口。透光部分“J”对应于选通线102和薄膜晶体管区之上象素电极124a与相邻象素电极124a之间的开口。掩模128双缝部分“F”的第一缝“Q”的宽度和第二缝“R”的宽度分别为1.2微米,第一缝“Q”与第二缝“R”之间的距离约为0.5微米。如果具有如上所述结构的掩模128用来对象素电极124a制作图案,那么与已有技术相比,所曝光阻光层的尺寸可以有较大程度的减小。
当掩模128设置在阻光层126之上,然后执行光刻掩模过程时,穿过掩模128双缝部分“F”且到达衬底100的光的光强曲线可以如图7所示得到。由于分别穿过每一个缝然后到达衬底100的光随着缝“Q”和“R”的宽度“b”变窄而相互交叠,所以穿过每一缝“Q”和“R”中间的光的光强“N”和与缝“Q”和缝“R”之间区域“O”相对应的光的光强“M”基本相等。因此,虽然穿过双缝掩模中变窄缝的光的光强变得比传统单缝掩模稍弱,但是可以以均匀的光强均匀进行短时间的图案制作。
图6E中,当在曝光过程之后进行显影过程时,在数据线112之上剩下残留的阻光层“K”。可以采用一种干刻法——灰化法蚀刻掉残留的阻光层“K”。可以采用灰化法完全去除残留的阻光层“K”,同时,还可以蚀刻去一些其他区域中的阻光层126,但这不影响其下的金属层。
去除通过去除阻光层126而暴露的金属层124,以形成象素电极124a。因此,如图6F所示形成象素电极124a。如果完全执行以上过程,那么象素电极124a与相邻象素电极124a之间的距离“f”可以达到3.5微米以下。参考已有技术,由于象素电极相互没有电作用的最小空间为2微米,所以象素电极124a与相邻象素电极124a之间的距离“f”理想情况下为2到3.5微米。象素电极124a形成为与数据线的两侧相互交叠,交叠宽度“e”为2微米。交叠宽度“e”可以形成为在2微米以下。
由于可以用本发明中的双缝掩模缩短数据线的宽度,所以可以改善孔径比,这改善了液晶显示器的显示质量。另外,在大型液晶显示器中,本发明的作用最大。
对本领域的普通技术人员来说,很明显,在不脱离本发明的实质或范围的情况下,可以在本发明的制作和应用方面作各种修改和变换。这样,只要这些修改和变换落在所附权利要求书及其等同物的范围之内,意欲使本发明覆盖这些修改和变换。
Claims (10)
1.一种液晶显示器阵列衬底的制造方法,包括以下步骤:
在一衬底上形成一选通线和一栅极;
在该衬底上形成一选通绝缘层;
在该选通绝缘层上形成一有源层和一欧姆接触层;
在该衬底上形成一数据线、一源极和一漏极;
通过在该衬底上淀积绝缘材料形成一钝化层;
通过对该钝化层制作图案形成一漏极接触孔,该漏极接触孔露出漏极的一部分;
在该钝化层上形成一透明金属层;
在该透明金属层上形成一阻光层;
通过将一掩模设置在阻光层之上来执行一曝光过程,该掩模包括一阻光部分、一缝部分和一透光部分;和
通过对曝光的阻光层进行显影和对所曝光的透明金属层进行蚀刻,形成一象素电极;
该掩模的阻光部分对应于象素电极,该掩模的透光部分对应于有源层、源极和漏极,以及缝部分对应于数据线;
该缝部分具有至少两条缝。
2.根据权利要求1的方法,其中该象素电极与相邻象素电极之间的距离为2到3.5微米。
3.根据权利要求1的方法,其中数据线的宽度为6到7.5微米。
4.根据权利要求3的方法,其中缝的宽度为1.2微米。
5.根据权利要求3的方法,其中该缝与相邻缝之间的距离为0.5微米。
6.一种显示器薄膜晶体管阵列衬底的制造方法,包括以下步骤:
通过淀积和蚀刻第一导电层,在一衬底上形成多条选通线和多个栅极;
在该衬底上形成一选通绝缘层,以覆盖该多条选通线和多个栅极;
在该选通绝缘层上形成多个岛形有源层和多个岛形欧姆接触层;
通过淀积和蚀刻第二导电层,在该选通绝缘层、多个有源层和多个欧姆接触层上形成多条数据线、多个源极和多个漏极;
通过在该选通绝缘层上淀积和蚀刻一绝缘材料,形成一钝化层以覆盖多条数据线、多个源极和多个漏极,该钝化层具有多个接触孔,这多个接触孔用来暴露多个漏极;
采用一掩模在该钝化层上形成与多条数据线相交叠的多个像素电极,该掩模包括一阻光部分、一缝部分和一透光部分,其中该掩模的阻光部分对应于该像素电极,该掩模的透光部分对应于有源层、源极和漏极,以及缝部分对应于数据线;并且该缝部分具有至少两条缝。
7.根据权利要求6的方法,其中该象素电极与相邻象素电极之间的距离为2到3.5微米。
8.根据权利要求6的方法,其中数据线的宽度是6到7.5微米。
9.根据权利要求6的方法,其中缝的宽度为1.2微米。
10.根据权利要求6的方法,其中缝与缝之间的距离为0.5微米。
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US20020142505A1 (en) | 2002-10-03 |
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JP4299487B2 (ja) | 2009-07-22 |
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