CN1211856C - 可分断式连接桥和可连接式线路中断器及其制造与启动方法 - Google Patents

可分断式连接桥和可连接式线路中断器及其制造与启动方法 Download PDF

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Publication number
CN1211856C
CN1211856C CNB971921598A CN97192159A CN1211856C CN 1211856 C CN1211856 C CN 1211856C CN B971921598 A CNB971921598 A CN B971921598A CN 97192159 A CN97192159 A CN 97192159A CN 1211856 C CN1211856 C CN 1211856C
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CN
China
Prior art keywords
conductivity type
conductive
line
diffusion
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB971921598A
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English (en)
Chinese (zh)
Other versions
CN1210623A (zh
Inventor
T·泽特勒
J·温内尔
G·格奥尔加克斯
W·波克兰德特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of CN1210623A publication Critical patent/CN1210623A/zh
Application granted granted Critical
Publication of CN1211856C publication Critical patent/CN1211856C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Fuses (AREA)
  • Lining Or Joining Of Plastics Or The Like (AREA)
CNB971921598A 1996-02-09 1997-02-06 可分断式连接桥和可连接式线路中断器及其制造与启动方法 Expired - Lifetime CN1211856C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19604776A DE19604776A1 (de) 1996-02-09 1996-02-09 Auftrennbare Verbindungsbrücke (Fuse) und verbindbare Leitungsunterbrechung (Anti-Fuse), sowie Verfahren zur Herstellung und Aktivierung einer Fuse und einer Anti-Fuse
DE19604776.5 1996-02-09

Publications (2)

Publication Number Publication Date
CN1210623A CN1210623A (zh) 1999-03-10
CN1211856C true CN1211856C (zh) 2005-07-20

Family

ID=7784979

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB971921598A Expired - Lifetime CN1211856C (zh) 1996-02-09 1997-02-06 可分断式连接桥和可连接式线路中断器及其制造与启动方法

Country Status (10)

Country Link
EP (1) EP0879479B1 (enExample)
JP (1) JP3288385B2 (enExample)
KR (1) KR100414239B1 (enExample)
CN (1) CN1211856C (enExample)
AT (1) ATE239302T1 (enExample)
DE (2) DE19604776A1 (enExample)
ES (2) ES2158310T3 (enExample)
IN (1) IN191121B (enExample)
UA (1) UA50755C2 (enExample)
WO (1) WO1997029515A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0992809A1 (de) 1998-09-28 2000-04-12 Siemens Aktiengesellschaft Schaltungsanordnung mit deaktivierbarem Scanpfad
DE10346460A1 (de) * 2003-10-02 2005-05-19 Infineon Technologies Ag Anordnung und Verfahren zum Schutz von Fuses/Anti-Fuses
DE10349749B3 (de) * 2003-10-23 2005-05-25 Infineon Technologies Ag Anti-Fuse-Verbindung für integrierte Schaltungen sowie Verfahren zur Herstellung von Anti-Fuse-Verbindungen
JP4701034B2 (ja) * 2005-08-02 2011-06-15 パナソニック株式会社 半導体装置
US7576407B2 (en) * 2006-04-26 2009-08-18 Samsung Electronics Co., Ltd. Devices and methods for constructing electrically programmable integrated fuses for low power applications
US8542517B2 (en) 2011-06-13 2013-09-24 International Business Machines Corporation Low voltage programmable mosfet antifuse with body contact for diffusion heating

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1131790B (it) * 1979-08-20 1986-06-25 Rca Corp Complesso universale di collegamento interno per circuiti integrati cmos/sos ad alta densita'
EP0054102A3 (en) * 1980-12-11 1983-07-27 Rockwell International Corporation Very high density cells comprising a rom and method of manufacturing same
GB2100057A (en) * 1981-05-27 1982-12-15 Post Office Method of forming conductive tracks in a semi-conductor body by annealing
EP0094073B1 (en) * 1982-05-12 1988-07-27 Kabushiki Kaisha Toshiba Semiconductor device capable of structural selection
GB2215128B (en) * 1988-02-23 1991-10-16 Stc Plc Improvements in integrated circuits
JPH0320063A (ja) * 1989-06-16 1991-01-29 Matsushita Electron Corp 電気ヒューズ
FR2713398B1 (fr) * 1993-11-30 1996-01-19 Sgs Thomson Microelectronics Fusible pour circuit intégré.

Also Published As

Publication number Publication date
IN191121B (enExample) 2003-09-27
ATE239302T1 (de) 2003-05-15
EP0879479B1 (de) 2003-05-02
EP0879479A2 (de) 1998-11-25
WO1997029515A2 (de) 1997-08-14
WO1997029515A3 (de) 1997-09-18
ES2158310T3 (es) 2001-09-01
UA50755C2 (uk) 2002-11-15
ES2198559T3 (es) 2004-02-01
JP3288385B2 (ja) 2002-06-04
CN1210623A (zh) 1999-03-10
KR100414239B1 (ko) 2004-02-18
DE59709973D1 (de) 2003-06-05
DE19604776A1 (de) 1997-08-14
JPH11506874A (ja) 1999-06-15
KR19990082361A (ko) 1999-11-25

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Owner name: INFINEON TECHNOLOGIES AG

Free format text: FORMER OWNER: SIEMENS AG

Effective date: 20120222

C41 Transfer of patent application or patent right or utility model
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Effective date of registration: 20120222

Address after: Federal Republic of Germany City, Laura Ibiza Berger

Patentee after: Infineon Technologies AG

Address before: Munich, Germany

Patentee before: Siemens AG

CX01 Expiry of patent term

Granted publication date: 20050720

CX01 Expiry of patent term