CN1165398A - 突起形成体及突起的形成方法 - Google Patents

突起形成体及突起的形成方法 Download PDF

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CN1165398A
CN1165398A CN97111688A CN97111688A CN1165398A CN 1165398 A CN1165398 A CN 1165398A CN 97111688 A CN97111688 A CN 97111688A CN 97111688 A CN97111688 A CN 97111688A CN 1165398 A CN1165398 A CN 1165398A
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projection
protrusion
electrode
adults
shaped
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CN1123063C (zh
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山口和文
三谷力
浅辺光男
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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  • Engineering & Computer Science (AREA)
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

本发明提供了一种突起形成体及其形成方法，电特性、连接可靠性优良，且在焊区电极下也能配置层间绝缘层、有源层、多层布线等。在各焊区电极2上，也以盖住钝化膜3的周缘部的状态，形成由约20μm铝喷镀厚膜组成的底层5a。在底层5a之上，形成由约30μm铜喷镀厚膜形成的表面层5b。以此形成2层结构的突起6。

Description

突起形成体及突起的形成方法
本发明涉及半导体芯片和半导体晶片上的电极、电路基片上的电极、和各种电子器件的电极上形成的突起形成体及其成形方法。
对于实现电子设备、系统的小型、轻便和高性能来说，半导体集成电路的高密度安装是不可缺少的。在各种高密度安装技术中，正在开发和实际应用在载体基板和电路基板上安装裸片(裸露芯片)的芯片规模组装(CSP)及多片微型组件(MCM)。在这些裸片的安装技术中，通过突起把裸片连接到基片电极上的《倒装片连接技术》产生的使片子找齐拉平和低成本，成为当前重要课题。
所谓倒装片技术是使裸片背向通过突起安装在电路基片上的技术。由于把连接区域限制在芯片区域内，所以是适合于高密度安装的先进方法。在倒装片连接技术中有关起重要作用的突起，其各种材料、结构、形成方法等得到研究。一部分成果已被实际应用。在突起形成方法中大致分为2种。以下对其进行说明。
第1种方法是《焊料突起法》，在半导体晶片上形成的各芯片的焊区电极上淀积阻挡层之后，再形成厚度为10-50μm的焊料层。这种情况下，焊料层用真空蒸镀法(如参考特公昭63-4939号公报)，电解电镀法(如参考特开昭63-6860号公报)，或者焊料球法(如参考特开昭64-22049号公报)等形成。
第2种方法是《球形接合法》，在焊区电极上如使用引线接合装置和金线作球形接合，在焊区电极上形成高约50μm的金球。该方法特征在于，因无需上述第1法(焊料突起法)的阻挡金属层，所以在一般的半导体芯片上也能形成突起。
然而，问题在于，当使用焊料突起法形成突起情况下，必需形成阻挡金属层，该阻挡金属层用真空蒸镀法或溅射法层叠钛、镍、铬等薄膜形成，因此成为成本高、形成时间长的一个原因。并且，作为突起的焊料层其膜厚必需在10μm以上，当由真空蒸镀法形成此膜情况下，在其淀积中费时费工。并且问题还在于，用电解电镀法形成支撑层情况下，根据电场分布镀膜厚度不匀，电镀时间长，为了事先对所有焊区电极作电连接，需要公共电极。此外问题在于，当利用支撑球法形成焊料层情况下，需要粒径一致的焊料球，在全部焊区电极上无遗漏地配置焊料球等。
另一方面，球形接合法是在每个焊区电极上接合的技术，所以其形成速度即便在高速联接情况下为每秒6-8焊区。因此，一旦焊区电极数量多，则仅此在突起形成中要费时，成本提高。从而，球形接合法不适于大批量生产。并且，在使用球形接合法形成突起情况下，因连接时的冲击，往往会破坏层间绝缘层、有源层、多层布线等。所以在焊区电极下面不能配置所述各层，难以获得芯片的高集成度。
本发明是为了解决已有技术中的问题，提供了一种突起形成体及其形成方法，电特性和连接可靠性能高，并且在焊区电极之下也能配置层间绝缘层、有源层和多层布线。
为实现所述目的，本发明的突起形成体的结构为在基片上设置的电极上形成由导电性材料组成的突起，其特征是突起至少由一层金属喷镀厚膜组成。根据该突起形成体的结构，可产生如下作用效果。即，由金属喷镀厚膜组成的突起，象用印刷法形成的突起不含有机粘合剂成份，纯度高，突起本身的电阻也小，并且安装后几乎不从突起产生气体，可靠性高。而且，在金属喷镀厚膜上内有气孔或间隙，比起块状易于吸收应力。从而，如可降低由于形成突起的半导体芯片和电路基片热膨胀而产生作用在突起上的应力，可使连接可靠性得以提高。而且，这样在金属喷镀厚膜上因内有气孔或间隙，如焊锡、导电性浆料等的连接材料通过气孔或间隙易进入突起内部。其结果，因增加了突起和连接材料的接触面积，所以减小了接触电阻。由金属喷镀膜组成的突起与用球形接合法形成的突起不同，不用担心层间绝缘层、有源层和多层布线等被破坏，所以在电极下可布置所述各层。其结果可求得高集成化。
并且，所述本发明突起形成体的构成中，突起由在电极上形成的底层和在所述底层上形成的表面层组成，所述底层材料最好是从由铝、含有铝的金属、锌及含有锌的金属组成组之中选择其中一种；这时，表面层材料最好是铜或含有铜的金属。
并且在所述本发明的突起形成体的构成中，突起由形成在电极上的底层、和形成在所述底层上的中间层、和形成在所述中间层上的表面层组成，所述底层材料最好是从由铝、含有铝的金属、锌及含有锌的金属形成的组中选择其一。
在此情况下，中间层材料最好是铜或含铜的金属。
在此情况下，表面层材料最好是焊料。
并且，在所述本发明的突起形成体结构中，还备有形成在电极上且具有开口部的抗蚀膜，在所述开口部内，最好形成以从所述抗蚀膜上面突出状态由金属喷镀厚膜组成的突起。根据该最佳例子，如可防止形成突起的半导体芯片和电路基片连接工序发生的损伤。
并且，在该情况下，阻挡膜材料最好从由耐热性树脂及阻燃性树脂形成的组中选其一。
在所述本发明的突起形成体构成中，突起最好由包括可吸收液状物质的空隙的导电性材料组成，至少在所述空隙中填充防潮性物质。根据该最佳例子，抑制突起内部的氧化，可防止增加电阻。
并且在该情况下，防潮性物质最好从由环氧系列树脂、硅石系列树脂、丙烯系列树脂及氟系列树脂形成的组中选择其一。在该情况下，突起的侧面最好用防潮性物质覆盖。根据该最佳例子，进一步抑制突起的氧化，可防止电阻的增加。从而，即便在高潮湿环境下经长时间使用，突起的电阻也不增加。
在该情况下，防潮性物质最好从由环氧系列树脂、硅石系列树脂、丙烯系列树脂及氟系列树脂形成的组中选择其一。
在所述本发明突起形成体的结构中，突起最好形成二级突出形状。在该最佳例中，例如当用导电性树脂和焊料连接形成突起的半导体芯片和电路基片情况下，可在第1级突出上积存导电性树脂和焊料。其结果，由于导电性树脂和焊料不作多余性扩展，所以可作高精度安装。
根据本发明的突起形成方法，在设置于基片上的电极之上淀积导电性材料粒子，形成突起，其特征是，在所述电极上淀积所述导电性材料粒子时，所述导电性材料粒子除去所述电极表面氧化层至少一部分，或所述导电性材料粒子要穿通所述电极表面氧化层。根据该突起的形成方法，设置在基片上的电极和突起的接触电阻在实用上可充分地小。
根据本发明的突起形成方法，最好用喷镀法在电极上淀积导电性材料粒子。
在该情况下，喷镀法最好是等离子喷镀法。在该情况下，至少导电性材料粒子冲撞的区域最好是非活性气氛或还原性气氛。根据该最佳实施例，由于可抑制氧化形成的突起，所以能得到电阻小，质地优良的突起。
在所述本发明的突起形成方法中，作为至少突起上层导电性材料使用超塑性金属材料，在淀积所述超塑性金属材料之后，在高于所述超塑性金属材料的超塑性温度下使基片加热，从所述突起上挤压具有所要求形状的凹版型，按所要求的形状形成所述突起为佳。根据该最佳例子，如能轻易得到2级突出的突起。
在该情况下，超塑性金属材料最好从由锌-铝共析合金、铋-锡共析合金、镁-铝共析合金及铝-锡共析合金形成的组中选择其一。
图1是表示本发明第1实施例的突起形成体3个例子的剖面图；
图2是表示本发明第1实施例的突起形成方法的工序剖面图；
图3是表示本发明第2实施例的突起形成体的剖面图；
图4是表示在本发明第2实施例的突起形成方法中使用的等离子喷镀装置的示意性结构图；
图5是表示本发明第3实施例的突起形成体的剖面图；
图6是表示本发明第3实施例的突起形成方法之喷涂工序剖面图；
图7是表示本发明第4实施例的突起成形体之剖面图；
图8是表示本发明第4实施例的突起成形方法的工序剖面图。
下面通过实施例对本发明作进一步说明。
(实施例1)
图1是表示本发明第1实施例突起形成体的3个例子之剖面图。图1(a)表示单层结构的突起；图1(b)表示2层结构的突起；图1(c)表示3层结构的突起。下面分别予以说明。
如图1(a)所示，在半导体芯片1的表面，形成在其周缘部作为电源、接地、信号输入输出端子使用的焊区电极2。并且，在最近，随着半导体芯片输入输出端子的增加，为使焊区电极密度的增加，还开发着在芯片表面配置二维阵列状排列的焊区电极的LSI。一般，作为焊区电极2用由电子束蒸镀法和溅射法形成的铝薄膜。在半导体芯片1之表面上，以盖住焊区电极2周边部的状态形成钝化膜3。在各焊区电极2上，也以盖住钝化膜3的周边部的状态形成作为突起状连接电极的突起4。其中，突起4由膜厚约50μm的单层铜喷镀厚膜构成。
如图1(b)所示，在各焊区电极2上形成以盖住钝化膜3的周缘部状态由膜厚约为20μm的铝喷镀膜组成的底层5a。这时，底层5a材料不仅限于铝，其他比如可用含有重量60％铝的金属、锌、含有重量60％锌的金属。这些金属电阻小，并且作为底层5a的材料，若用这些金属，则可使底层5a牢牢地粘结在焊区电极(铝膜)2上。并且，这些金属即便在金属材料中也属低熔点，所以在喷镀时可最低限度地减少对半导体芯片1的损伤，是形成突起的最佳材料。在底层5a上，形成由膜厚约30μm铜喷镀厚膜组成的表面层5b。以此，形成2层结构的突起6。其他结构与图1(a)情况相同，所以说明从略。
如图1(C)所示，在各焊区电极2上，形成也以盖住钝化膜3周缘部状态由膜厚约20μm铝喷镀厚膜组成的底层7a。并且，在底层7a上，形成由膜厚约30μm铜喷镀厚膜组成的中间层7b。这时，中间层7b的材料不仅限于铜，其他的如可用含有重量60％铜的金属，锌、含有重量60％锌的金属。这些金属电阻小，且焊料的浸润性也好。而且，底层7a的材料不仅限于铝，其他的如含重量60％铝的金属、锌、含重量60％锌的金属也可使用。这些金属因延展性强，在其上作为形成中间层7b时的缓冲材料也能发挥作用。在中间层7b之上，形成由厚约60μm的焊料组成的表面层7c。借此，构成3层结构的突起8。底层7a和中间层7b和焊料表面层7c的3层结构的突起8，在形成上述2层结构的突起[图1(b)]之后，使半导体芯片1通过焊料软熔炉，在表面形成焊料可制成。而且，焊料表面层7c也可通过印刷焊料浆料形成。其他结构与图1(a)的相同，说明从略。
下面参考附图2，说明有关形成图1(b)所示的2层结构的突起的方法。
首先如图2(a)所示，在半导体芯片1表面周边部，用电子束蒸镀法或溅射法形成膜厚约1μm的铝薄膜，制作焊区电极2。接着在半导体芯片1表面用溅射法淀积氮化硅，使盖住焊区电极2周缘部，形成膜厚约为1μm的钝化膜3。接着在作完上述晶片处理结束之后的半导体芯片1的全部表面上，粘贴感光性抗蚀剂材料的干燥膜，形成厚约50μm的感光性抗蚀剂膜10。
如图2(b)所示，为露出焊区图形部分，对感光性抗蚀剂膜10进行曝光、显影，在焊区电极2上形成具有比焊区尺寸(没有被钝化膜3盖住的焊区电极2的尺寸：直径约为100μm)还要大些的口径的开口部11。
如图2(c)所示，在半导体芯片1的整个表面，通过使用等离子喷镀装置喷镀铝，形成在开口部11内的焊区电极2上的表面厚约20μm铝喷镀厚膜组成的涂层5a。通常，若用喷镀法，可高速大面积地形成纯度较高的厚膜。因此，在形成高度必须为大于数10μm的突起方面，喷镀法在生产性方面是先进的方法。并且，用喷镀法形成膜时，因在具有象弹性感光性抗蚀剂膜10的塑料系列表面上，难以成膜，所以主要在开口部11的焊区电极2上有选择性地淀积铝。
如图2(d)所示，以照旧形成半导体芯片1上的感光性抗蚀剂膜10的状态，在半导体芯片1的整个表面，用等离子喷镀装置喷镀铜，在开口部11内底层5a之上，形成约50μm的铜喷射厚膜12。
如图2(e)所示，从半导体芯片1上方对平板(未图示)推挤加压，使铜喷镀厚膜13[图2(d)]上端整平，形成表面层5b。借此，获得由底层5a、表面层5b2层组成的突起6。此外，作为使铜喷镀厚膜12上端平整的方法有除加压外如研削、研磨等。
最后，如图2(f)所示，使用剥离液等除去感光性抗蚀剂膜10。根据以上工序，获得具有图1(b)所示的2层结构的突起的形成体。
并且，在本实施例中，在晶片工艺结束后的半导体芯片1的全表面上，加贴感光性抗蚀材料的干燥膜，使形成感光性抗蚀膜10，但未必仅限于该方法。例如也可事先在半导体芯片1的全表面上涂敷感光性抗蚀材料。
(实施例2)
图3是本发明第2实施例的突起形成体剖面图。
如图3所示，在半导体芯片13的表面，形成由在其周边部作为电源、接地、信号输入输出端子使用的铝薄组成的焊区电极14。并且，在半导体芯片13的表面，以盖住焊区电极14周边部的状态形成钝化膜15。在钝化膜15之上，除了其周边部分形成抗蚀剂膜16，这时，作为抗蚀剂膜16，使用感光性聚酰亚胺膜，该抗蚀膜16不剥离、除去，半永久性使用。抗蚀剂膜16是作为以后工序的半导体芯片13和基板的连接中不被损伤的保护膜使用。因此，若为有耐潮、耐热的树脂系列材料，除聚酰亚胺外，可用如PT、FE、PE或聚苯均四酰亚胺。在焊区电极14之上，也以盖住钝化膜15周边部的状态，形成由厚度约为20μm铝喷镀厚膜组成的底层17，在底层17上形成由厚约30μm的铜喷镀厚膜组成的突起18。这种情况下，有必要使突起从抗蚀剂膜16的表面突出。当用喷镀法成膜情况下，由于在如抗蚀膜16有弹性的塑料系列材料表面难以成膜，所以主要在底膜17上可有选择地淀积铜喷射厚膜。因此，若用喷射法，可形成从抗蚀膜16表面突出的突起18。
以下参照附图3说明有关本发明突起的形成方法。
本发明的突起形成方法，在突起和基片电极接合部分，其特征是与突起形成同时，至少除去电极表面氧化层一部分，或者使突起穿通电极表面氧化层一部分。具体来说，本发明特征是用喷镀法形成构成突起的金属厚膜和焊区电极的接合层。该情况下，尤其最好使用等离子喷镀法。再最好至少使喷镀粒子淀积的区域处于非活性气氛或还原性气氛中。
图4是表示本发明突起形成方法中所用的等离子喷射装置的示意性结构图。在图4，19是等离子喷射枪。在喷射枪19的前端部分位置圆筒状防护喷头20。这样可抑制应使半导体芯片13上喷镀粒子22冲击的区域23成为氧化气氛。因此，所形成的突起几乎不被氧化，所以可得到电阻小质地优良的突起。在防护喷头20上部壁上设置进气口。借此，在喷镀时，把氩气等惰性气体和氢等的还原性气体供给防护喷头20内部，可维护应使喷镀粒子22冲击的区域23的惰性气氛或还原性气氛中。因此，可得到电阻更小质地优良的突起。而且，为了通过半导体芯片13的整个面形成喷镀厚度，与喷镀同时可使喷射枪19或半导体芯片13的任一方在水平方向移动。
并且，利用喷镀法若形成图3所示的突起，则图4所示的喷镀粒子22冲破半导体芯片13焊区电极(铝薄膜)14上的底层(铝喷镀厚膜)17的表面氧化层淀积，把焊区电极14和突起18的接触电阻在每个焊区作成数mΩ。其结果，使突起18的电阻充分小至实用化。这认为是以下原因，在惰性气氛或还原性气氛中，从数μm至数10μm的喷镀粒子22在粒子材料熔点附近，即数100℃的温度下，并且以数10m/秒至数100m/秒的速度向焊区电极14冲击，所以底层17的表面氧化层一部分被除去，或喷镀粒子22穿通底层17，被淀积在焊区电极14上。
并且，用喷镀法形成的突起，如由印刷法形成的突起不含有机粘合剂成分，因纯度高，突起本身电阻也小，安装后几乎也不从突起产生气体，所以可靠性也高。
再有，本发明还着眼于喷镀膜结构及形状特征。虽然也根据膜的材料和形成条件等，但在喷镀厚膜上，通常内存气孔或间隙。象这样的膜比起突块来要易于吸收应力，所以能降低由于电路基片和形成由喷射厚膜组成的突起的半导体芯片的热膨胀差作用于突起的应力。其结果，能使半导体芯片和电路基片连接的可靠性提高。
象这样因在喷镀厚膜中内存气孔和间隙，所以由喷镀厚膜形成突起情况下，如焊料、导电性浆料等的连接材料通过气孔或间隙易于进入突起内部。结果因使突起和连接材料接触而增加，所以可降低接触电阻。
(实施例3)
图5是表示本发明第3实施例的突起形成体剖面。
如图5所示，在半导体芯片24表面，形成在其周边部作为电源、接地、信号输入输出等用的焊区电极25。并且，在半导体芯片24的表面，以盖住焊区电极25周边部的状态形成钝化膜26。在各焊区电极25上面，也以盖住钝化膜26周边部的状态形成由厚约20μm铝等离子喷镀膜组成的底层27a，在底层27a上面，形成由厚约30μm铜等离子喷镀膜组成的表面层27b。借此，构成2层结构的突起28。如所述第2实施例所述，虽然也取决于膜的材料和形成条件等，但在喷镀膜上，比起用其他工序形成的膜，内存气孔或间隙。在本实施例的突起28中，在铝等离子喷镀膜(底层27a)及铜等离子喷镀膜(表面层27b)中存在气孔或间隙29内浸润环氧系列树脂。并且在突起28侧面，形成由环氧系列树脂组成的涂层30，此外由铝等离子喷镀膜形成的底层27a及由铜等离子喷镀膜形成的表面层27b用在所述第1实施例所示的方法(图2)构成。
如图6(a)所示，在形成由铝等离子喷镀膜组成的底层27a和由铜等离子喷镀膜组成的表面层27b之后，利用喷涂易于使环氧系列树脂浸入气孔或间隙29中。即，在形成喷镀突起的半导体芯片24之上，通过雾化喷咀32喷射粘度较低的环氧系列树脂31。这时，半导体芯片24在水平面内旋转或作2维移送，在含有突起28的半导体芯片24之上均匀地涂敷环氧系列树脂31[图6(b)]，同时，在喷镀突起28上内存的气孔或间隙中浸入环氧系列树脂31。作为在气孔或间隙29中浸入环氧系列树脂31的方法，也可用旋转涂覆等。
接着，在约100℃温度下加热半导体芯片24，使环氧系列树脂31干燥固化。然而，在这种情况下在突起28上面也成为涂覆了环氧系列树脂31的状态。在该状态下，由于得不到电路基片和半导体芯片24的电连接，所以如图6(c)所示，如用研磨等工艺在突起28上除去数μm，使突起28上面露出金属面。利用该研磨确保突起28的高精度。
金属由于在高温、高湿度环境下易于氧化，所以在由金属材料组成的突起中，经长时间使用情况下，存在其电阻增加的可能性。并且，由于在喷镀膜中内存气孔或间隙，即便是由金属喷镀厚膜组成的突起中，也会在其内部渐渐氧化，也能增加电阻。但是在本实施例中，由于构成突起28的铝等离子喷镀膜(底层27a)及铜等离子喷镀膜(表面层27b)上内存的气孔或间隙29中浸入环氧系列树脂，所以抑制突起28内部氧化、能防止电阻增加。并且由于在突起28侧面也形成由环氧系列树脂组成的涂覆层30，可进一步抑制突起28的氧化，能进一步防止电阻增加。其结果，在高温、高湿环境下经长时间使用、也不会使突起28的电阻增加，可获得电特性稳定的高可靠性突起28。
并且，通过在包括突起28的半导体芯片24上涂覆树脂，因树脂达到突起28和焊区电极25的界面，所以使突起28和焊区电极25的粘结力被强化。其结果，可谋求形成突起28后的操作性(溅射)提高，以及安装在基片上后的使用状态之可靠性提高。此外，由于树脂富有弹性，所以在包括突起28的半导体芯片24上之涂覆树脂不妨碍在所述第2实施例中所述的《具有喷镀厚膜、可降低突起和电路基片上热应力的效果》。
并且在本实施例中，尽管在包括突起28的半导体芯片24上作为涂覆的树脂使用环氧系列树脂，但未必仅限于此。若能满足耐湿性，耐热性条件，如也可用硅石系列树脂、丙烯系列树脂、氟系列树脂。
(实施例4)
图7是表示本发明第4实施例的突起形成体的剖面。
如图7所示，在半导体芯片33表面，形成在其周边部作为电源、接地、信号输入输出端子等使用的焊区电极34。
并且，在半导体芯片33表面，以盖住焊区电极34的周边部状态形成钝化膜35。在各焊区电极34之上，也以盖住钝化膜35的周缘部状态形成由约20μm的铝等离子喷镀膜组成的底层36a，在底层36a上形成由约30μm超塑性金属材料的等离子喷镀厚膜组成的表面层36b。借此形成2层突起结构37。其中，以2级突出状形成表面层36b，若用如此2级突出的突起37，则在用导电性树脂和焊料连接半导体芯片33和电路基片情况下，在第1级突出上面积存导电性树脂和焊料。其结果导电性树脂和焊料不会剩余扩展，所以可作高精度安装。作为超塑性金属材料，要考虑超塑性大小及超塑性温度，使用含有铝重量22％的锌-铝共析合金，该锌-铝共析合金的超塑性温度约为250℃，很适合于在半导体芯片33上作表面层36b的成形处理。
图8表示该情况的突起形成工序。
首先如图8(a)所示，在半导体芯片33的表面周缘部分，用电子束蒸镀法或溅射法形成1μm的铝薄膜，制作焊区电极34。接着在半导体芯片33表面，用溅射法淀积氮化硅，盖住焊区电极34的周边，形成1μm的钝化膜35。接着要在上述那样，晶片处理结束后的半导体芯片33整个表面，经粘贴感光性抗蚀材料的干燥膜，形成约50μm的感光性抗蚀剂膜38。
然而，如图8(b)所示，为使焊区图形露出，对感光性抗蚀膜38作曝光、显影，在焊区电极34上形成比焊区尺寸(没有被钝化膜35盖住的焊区电极34的尺寸：直径约为100μm)还要大一些口径的开口部39。
如图8(c)所示，在半导体芯片33整个表面通过等离子喷镀装置喷镀铝，在开口部39内的焊区电极34上形成由约20μm的铝喷镀膜组成的底层36a。用喷镀法形成膜时，困难地在具有象感光性抗蚀膜38的弹性的塑料系列材料表面上形成膜，所以主要在开口部39内的焊区电极2上有选择性地可淀积铝。
如图8(d)所示，在半导体芯片33的整个表面，用同样的等离子喷镀装置喷镀锌-铝共析合金，在开口部39内底层36a上形成由约350μm的锌-铝共析合金喷镀厚膜形成的表面层36b。这种情况下也和图8(c)的情况一样，主要在开口部39内底层36a上有选择地可使锌-铝共析合金淀积。根据以上工序，获得2层突起37的构成。
如图8(e)所示，使用剥离液等除去感光性钝化膜38。
如图8(f)所示，以使半导体芯片33保持在作为锌-铝共析合金超塑性温度的250℃环境中的状态下，使成台阶状雕刻进凹版型(未图示)与焊区位置对准用一定压力从表面层36b上面挤压。根据超塑性材料的特征，因超塑性厚膜(表面层36b)通过所述凹版型易于发生塑性变形，所以可轻易地使表面层36b形成2级突出状。利用以上工序，能获得图7所示的2层突起37形成体结构。
在本实施例中，作为超塑性金属材料虽然使用了锌-铝共析合金，但未必仅限于此。如也可用铋-锡共析合金，镁-铝共析合金、铅-锡共析合金等。
并且，在本实施例中，借助用等离子喷镀法喷镀超塑性金属材料，虽然形成由喷射厚膜组成的表面层36b，但作为表面层36b的形成方法，未必仅限于该方法。如象下面那样也可形成表面层36b。首先，将超塑性金属材料的原料粉末与粘合剂混合，成浆料状。接着将此印在底层36a之上，再烧结。
在所述第1至第4实施例中，虽然举例说明了在半导体芯片上的焊区电极上形成突起的情况，但是并不仅限于这种情况。例如在半导体晶片、电路基片，芯片规模组装(CSP)用的载体基片等的电极上形成突起的情况下，也能适用于本发明。并且在传感器、电阻、电容器、电感器等的各种电子元件的电极上形成突起情况下也适用于本发明。
如上所述，根据本发明突起形成体构成，可产生如下作用效果。即，由金属喷镀厚膜组成的突起如用印刷法形成的突起不含有机粘结剂成分，因是高纯度，所以突起的电阻也小，并且安装后几乎不从突起产生气体，提高了可靠性。因在金属喷镀厚膜上内存气孔或间隙，比起实芯块易于吸收应力。从而，例如可降低作用于突起的应力，应力来源于形成突起的半导体芯片和电路基片的热膨胀差，提高了连接的可靠性。并且，这样因在金属喷镀厚膜上内存气孔或间隙，所以例如焊料、导电性浆料等的连接材料经气孔或间隙易进入突起内部。其结果，因突起和连接材料的接触面积增加，所以可减小接触电阻。并且，由金属喷镀厚膜组成的突起与用球形接合法形成的不同，所以不用担心层间绝缘层、有源层、多层布线等被破坏，在电极下可配置所述各层。结果可谋求高集层化。
根据本发明的突起形成方法，利用喷镀粒子能量可除掉或破坏设置于基片上的电极表面氧化层，所以电极和突起的接触电阻在实用中可作得充分的小。

Claims (18)

1一种突起形成体，在基片上设置的电极上形成由导电性材料组成的突起，其特征是突起至少由一层金属喷镀厚膜组成。
2如权利要求1的突起形成体，其特征是突起由在电极上形成的底层和在所述底层上形成的表面层组成，所述底层材料是从由铝、含有铝的金属、锌及含有锌的金属组成的组之中选择其中一种。
3如权利要求2的突起形成体，其特征是表面层材料是铜或含有铜的金属。
4如权利要求1的突起形成体，其特征是，突起由形成在电极上的底层，和形成在所述底层上的中间层，和形成在所述中间层上的表面层组成，所述底层材料是从由铝，含有铝的金属、锌及含有锌的金属形成的组中选择其一。
5如权利要求4的突起形成体，其特征是中间层材料是铜或含有铜的金属。
6如权利要求4的突起形成体，其特征是表面层材料是焊料。
7如权利要求1的突起形成体，其特征是，还备有形成在电极上且具有开口部的抗蚀膜，在所述开口部内，形成以从所述抗蚀剂膜上面突出状态由金属喷镀厚膜组成的突起。
8如权利要求7的突起形成体，其特征是抗蚀膜材料从由耐热性树脂及阻燃性树脂形成的组中选其一。
9如权利要求1的突起形成体，其特征是突起由包括可吸收液状物质的空隙的导电性材料组成，至少在所述空隙中填充防潮性物质。
10如权利要求9的突起形成体，其特征是突起侧面用防潮性物质盖住。
11如权利要求9或10的突起形成体，其特征是防潮性物质从由环氧系列树脂、硅石系列树脂、丙烯系列树脂及氟系列树脂形成的组中选择其一。
12如权利要求1的突起形成体，其特征是突起形成2级突出形状。
13一种突起形成方法，在设置于基片上的电极之上淀积导电性材料粒子，形成突起，其特征是，在所述电极上淀积所述导电性材料粒子时，所述导电性材料粒子除去所述电极表面氧化层至少一部分，或所述导电性材料粒子要穿通所述电极表面氧化层。
14如权利要求13的方法，其特征是用喷镀法在电极上淀积导电性材料粒子。
15如权利要求14的方法，其特征是喷镀法是等离子喷镀法。
16如权利要求15的方法，其特征是至少导电性材料粒子冲撞的区域是惰性气氛或还原性气氛。
17如权利要求13的方法，其特征是作为至少突起上层导电性材料使用超塑性金属材料，在淀积所述超塑性金属材料之后，在高于所述超塑性金属材料的超塑性温度下使基片加热，从所述突起上挤压具有所要求形状的凹面型，按所要求的形状形成所述突起。
18如权利要求17的方法，其特征是超塑性金属材料从由锌-铝共析合金、铋-锡共析合金、镁-铝共析合金及铅-锡共析合金形成的组中选择其一。
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US5914274A (en) 1999-06-22
DE69722296T2 (de) 2004-04-01
EP0797247A1 (en) 1997-09-24
CN1123063C (zh) 2003-10-01
KR100251677B1 (ko) 2000-04-15
DE69722296D1 (de) 2003-07-03
US6042953A (en) 2000-03-28

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