FR2924302B1 - Procede de fabrication de plots de connexion electrique d'une plaque - Google Patents
Procede de fabrication de plots de connexion electrique d'une plaqueInfo
- Publication number
- FR2924302B1 FR2924302B1 FR0759273A FR0759273A FR2924302B1 FR 2924302 B1 FR2924302 B1 FR 2924302B1 FR 0759273 A FR0759273 A FR 0759273A FR 0759273 A FR0759273 A FR 0759273A FR 2924302 B1 FR2924302 B1 FR 2924302B1
- Authority
- FR
- France
- Prior art keywords
- plate
- electrical connection
- manufacturing plates
- plates
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
- H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H01L2924/01058—Cerium [Ce]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01076—Osmium [Os]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0759273A FR2924302B1 (fr) | 2007-11-23 | 2007-11-23 | Procede de fabrication de plots de connexion electrique d'une plaque |
US12/262,982 US8227332B2 (en) | 2007-11-23 | 2008-10-31 | Method for fabricating electrical bonding pads on a wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0759273A FR2924302B1 (fr) | 2007-11-23 | 2007-11-23 | Procede de fabrication de plots de connexion electrique d'une plaque |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2924302A1 FR2924302A1 (fr) | 2009-05-29 |
FR2924302B1 true FR2924302B1 (fr) | 2010-10-22 |
Family
ID=39537542
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0759273A Expired - Fee Related FR2924302B1 (fr) | 2007-11-23 | 2007-11-23 | Procede de fabrication de plots de connexion electrique d'une plaque |
Country Status (2)
Country | Link |
---|---|
US (1) | US8227332B2 (fr) |
FR (1) | FR2924302B1 (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101185859B1 (ko) * | 2010-10-19 | 2012-09-25 | 에스케이하이닉스 주식회사 | 반도체 패키지용 범프, 상기 범프를 갖는 반도체 패키지 및 적층 반도체 패키지 |
US10833033B2 (en) | 2011-07-27 | 2020-11-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bump structure having a side recess and semiconductor structure including the same |
US9105533B2 (en) | 2011-07-27 | 2015-08-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structure having a single side recess |
US9935038B2 (en) * | 2012-04-11 | 2018-04-03 | Taiwan Semiconductor Manufacturing Company | Semiconductor device packages and methods |
FR2994304A1 (fr) * | 2012-08-02 | 2014-02-07 | St Microelectronics Tours Sas | Puce a montage en surface |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3661730A (en) * | 1969-09-22 | 1972-05-09 | Kazuo Nishihara | Process for the formation of a super-bright solder coating |
DE2044494B2 (de) * | 1970-09-08 | 1972-01-13 | Siemens AG, 1000 Berlin u 8000 München | Anschlussflaechen zum anloeten von halbleiterbausteinen in flip chip technik |
GB1536772A (en) * | 1977-04-06 | 1978-12-20 | Nevin Electric Ltd | Selectively solder-plated printed circuit boards |
AU5316996A (en) * | 1995-04-05 | 1996-10-23 | Mcnc | A solder bump structure for a microelectronic substrate |
US6042953A (en) | 1996-03-21 | 2000-03-28 | Matsushita Electric Industrial Co., Ltd. | Substrate on which bumps are formed and method of forming the same |
EP0899787A3 (fr) * | 1997-07-25 | 2001-05-16 | Mcnc | Réservoirs de soudure formés-contrôlés pour augmenter le volume de bosses de soudure et dtructures ainsi formées |
US6372622B1 (en) * | 1999-10-26 | 2002-04-16 | Motorola, Inc. | Fine pitch bumping with improved device standoff and bump volume |
TW459362B (en) * | 2000-08-01 | 2001-10-11 | Siliconware Precision Industries Co Ltd | Bump structure to improve the smoothness |
US6818545B2 (en) | 2001-03-05 | 2004-11-16 | Megic Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
TW483136B (en) | 2001-03-22 | 2002-04-11 | Apack Technologies Inc | Bump process |
US6555296B2 (en) | 2001-04-04 | 2003-04-29 | Siliconware Precision Industries Co., Ltd. | Fine pitch wafer bumping process |
US6759319B2 (en) * | 2001-05-17 | 2004-07-06 | Institute Of Microelectronics | Residue-free solder bumping process |
DE10132158A1 (de) * | 2001-07-03 | 2003-01-23 | Infineon Technologies Ag | Verfahren zum galvanischen Erzeugen einer lateral strukturierten Metallisierung |
TW536767B (en) | 2002-03-01 | 2003-06-11 | Advanced Semiconductor Eng | Solder ball attaching process |
JP4341552B2 (ja) * | 2002-05-17 | 2009-10-07 | 日本電気株式会社 | プリント配線板 |
US6784089B2 (en) | 2003-01-13 | 2004-08-31 | Aptos Corporation | Flat-top bumping structure and preparation method |
TWI227557B (en) | 2003-07-25 | 2005-02-01 | Advanced Semiconductor Eng | Bumping process |
TWI322491B (en) | 2003-08-21 | 2010-03-21 | Advanced Semiconductor Eng | Bumping process |
TWI259572B (en) | 2004-09-07 | 2006-08-01 | Siliconware Precision Industries Co Ltd | Bump structure of semiconductor package and fabrication method thereof |
US7459386B2 (en) | 2004-11-16 | 2008-12-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming solder bumps of increased height |
-
2007
- 2007-11-23 FR FR0759273A patent/FR2924302B1/fr not_active Expired - Fee Related
-
2008
- 2008-10-31 US US12/262,982 patent/US8227332B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20090134514A1 (en) | 2009-05-28 |
FR2924302A1 (fr) | 2009-05-29 |
US8227332B2 (en) | 2012-07-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20140731 |