CN1157794C - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN1157794C CN1157794C CNB001306316A CN00130631A CN1157794C CN 1157794 C CN1157794 C CN 1157794C CN B001306316 A CNB001306316 A CN B001306316A CN 00130631 A CN00130631 A CN 00130631A CN 1157794 C CN1157794 C CN 1157794C
- Authority
- CN
- China
- Prior art keywords
- region
- conductivity type
- impurity
- oxide film
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6706—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing leakage current
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
Landscapes
- Element Separation (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP285269/1999 | 1999-10-06 | ||
| JP28526999A JP2001111056A (ja) | 1999-10-06 | 1999-10-06 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1292572A CN1292572A (zh) | 2001-04-25 |
| CN1157794C true CN1157794C (zh) | 2004-07-14 |
Family
ID=17689325
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB001306316A Expired - Fee Related CN1157794C (zh) | 1999-10-06 | 2000-10-08 | 半导体装置及其制造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6545318B1 (enExample) |
| JP (1) | JP2001111056A (enExample) |
| KR (1) | KR100397096B1 (enExample) |
| CN (1) | CN1157794C (enExample) |
| TW (1) | TW468279B (enExample) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6787422B2 (en) * | 2001-01-08 | 2004-09-07 | Chartered Semiconductor Manufacturing Ltd. | Method of body contact for SOI mosfet |
| JP2002246600A (ja) * | 2001-02-13 | 2002-08-30 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| JP4322453B2 (ja) * | 2001-09-27 | 2009-09-02 | 株式会社東芝 | 半導体装置およびその製造方法 |
| JP4139105B2 (ja) | 2001-12-20 | 2008-08-27 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| JP2004072063A (ja) * | 2002-06-10 | 2004-03-04 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| US20040060899A1 (en) * | 2002-10-01 | 2004-04-01 | Applied Materials, Inc. | Apparatuses and methods for treating a silicon film |
| JP2004221301A (ja) * | 2003-01-15 | 2004-08-05 | Seiko Instruments Inc | 半導体装置とその製造方法 |
| WO2004109810A1 (en) * | 2003-06-11 | 2004-12-16 | Koninklijke Philips Electronics N.V. | Prevention of parasitic channel in an integrated soi process |
| US20050072975A1 (en) * | 2003-10-02 | 2005-04-07 | Shiao-Shien Chen | Partially depleted soi mosfet device |
| KR100574971B1 (ko) * | 2004-02-17 | 2006-05-02 | 삼성전자주식회사 | 멀티-게이트 구조의 반도체 소자 및 그 제조 방법 |
| US6998684B2 (en) * | 2004-03-31 | 2006-02-14 | International Business Machines Corporation | High mobility plane CMOS SOI |
| KR101155943B1 (ko) * | 2004-04-28 | 2012-06-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Mos 캐패시터 및 반도체 장치 |
| JP3898715B2 (ja) * | 2004-09-09 | 2007-03-28 | 株式会社東芝 | 半導体装置およびその製造方法 |
| JP2007184553A (ja) * | 2005-12-06 | 2007-07-19 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| US7566630B2 (en) * | 2006-01-18 | 2009-07-28 | Intel Corporation | Buried silicon dioxide / silicon nitride bi-layer insulators and methods of fabricating the same |
| EP1863090A1 (en) | 2006-06-01 | 2007-12-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
| US20080217727A1 (en) * | 2007-03-11 | 2008-09-11 | Skyworks Solutions, Inc. | Radio frequency isolation for SOI transistors |
| JP5658916B2 (ja) * | 2009-06-26 | 2015-01-28 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP2011029610A (ja) * | 2009-06-26 | 2011-02-10 | Semiconductor Energy Lab Co Ltd | 半導体装置及びその作製方法 |
| CN101872737A (zh) * | 2010-01-28 | 2010-10-27 | 中国科学院上海微系统与信息技术研究所 | 一种抑制soi浮体效应的mos结构及其制作方法 |
| US8461005B2 (en) * | 2010-03-03 | 2013-06-11 | United Microelectronics Corp. | Method of manufacturing doping patterns |
| KR101870809B1 (ko) * | 2016-06-21 | 2018-08-02 | 현대오트론 주식회사 | 전력 반도체 소자 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58124243A (ja) | 1982-01-21 | 1983-07-23 | Toshiba Corp | 半導体装置の製造方法 |
| US5145802A (en) * | 1991-11-12 | 1992-09-08 | United Technologies Corporation | Method of making SOI circuit with buried connectors |
| US5463238A (en) * | 1992-02-25 | 1995-10-31 | Seiko Instruments Inc. | CMOS structure with parasitic channel prevention |
| US5359219A (en) * | 1992-12-04 | 1994-10-25 | Texas Instruments Incorporated | Silicon on insulator device comprising improved substrate doping |
| JP2806277B2 (ja) * | 1994-10-13 | 1998-09-30 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| JPH08181316A (ja) * | 1994-12-22 | 1996-07-12 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| JP3462301B2 (ja) | 1995-06-16 | 2003-11-05 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
| JP3376204B2 (ja) | 1996-02-15 | 2003-02-10 | 株式会社東芝 | 半導体装置 |
| US5767549A (en) * | 1996-07-03 | 1998-06-16 | International Business Machines Corporation | SOI CMOS structure |
| US5770875A (en) | 1996-09-16 | 1998-06-23 | International Business Machines Corporation | Large value capacitor for SOI |
| US6133608A (en) * | 1997-04-23 | 2000-10-17 | International Business Machines Corporation | SOI-body selective link method and apparatus |
| JPH1154758A (ja) * | 1997-08-01 | 1999-02-26 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
| US6392277B1 (en) * | 1997-11-21 | 2002-05-21 | Hitachi, Ltd. | Semiconductor device |
| KR100562539B1 (ko) * | 1997-12-19 | 2006-03-22 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | 벌크 씨모스 구조와 양립 가능한 에스오아이 구조 |
| US6121659A (en) * | 1998-03-27 | 2000-09-19 | International Business Machines Corporation | Buried patterned conductor planes for semiconductor-on-insulator integrated circuit |
| US6072217A (en) * | 1998-06-11 | 2000-06-06 | Sun Microsystems, Inc. | Tunable threshold SOI device using isolated well structure for back gate |
-
1999
- 1999-10-06 JP JP28526999A patent/JP2001111056A/ja active Pending
-
2000
- 2000-04-12 US US09/548,311 patent/US6545318B1/en not_active Expired - Fee Related
- 2000-10-05 TW TW089120743A patent/TW468279B/zh not_active IP Right Cessation
- 2000-10-05 KR KR10-2000-0058446A patent/KR100397096B1/ko not_active Expired - Fee Related
- 2000-10-08 CN CNB001306316A patent/CN1157794C/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20010050860A (ko) | 2001-06-25 |
| US6545318B1 (en) | 2003-04-08 |
| CN1292572A (zh) | 2001-04-25 |
| JP2001111056A (ja) | 2001-04-20 |
| TW468279B (en) | 2001-12-11 |
| KR100397096B1 (ko) | 2003-09-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20040714 Termination date: 20091109 |