CN1149671C - 半导体器件 - Google Patents

半导体器件 Download PDF

Info

Publication number
CN1149671C
CN1149671C CNB981093957A CN98109395A CN1149671C CN 1149671 C CN1149671 C CN 1149671C CN B981093957 A CNB981093957 A CN B981093957A CN 98109395 A CN98109395 A CN 98109395A CN 1149671 C CN1149671 C CN 1149671C
Authority
CN
China
Prior art keywords
layer
conductive layer
interlayer insulating
contact hole
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB981093957A
Other languages
English (en)
Chinese (zh)
Other versions
CN1218291A (zh
Inventor
豆谷智治
永井享浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN1218291A publication Critical patent/CN1218291A/zh
Application granted granted Critical
Publication of CN1149671C publication Critical patent/CN1149671C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNB981093957A 1997-11-21 1998-06-02 半导体器件 Expired - Lifetime CN1149671C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP320850/1997 1997-11-21
JP9320850A JPH11154701A (ja) 1997-11-21 1997-11-21 半導体装置
JP320850/97 1997-11-21

Publications (2)

Publication Number Publication Date
CN1218291A CN1218291A (zh) 1999-06-02
CN1149671C true CN1149671C (zh) 2004-05-12

Family

ID=18125952

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB981093957A Expired - Lifetime CN1149671C (zh) 1997-11-21 1998-06-02 半导体器件

Country Status (6)

Country Link
US (1) US6175156B1 (enExample)
JP (1) JPH11154701A (enExample)
KR (1) KR100268629B1 (enExample)
CN (1) CN1149671C (enExample)
DE (1) DE19813741B4 (enExample)
TW (1) TW366519B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6545359B1 (en) 1998-12-18 2003-04-08 Semiconductor Energy Laboratory Co., Ltd. Wiring line and manufacture process thereof, and semiconductor device and manufacturing process thereof
US6965165B2 (en) * 1998-12-21 2005-11-15 Mou-Shiung Lin Top layers of metal for high performance IC's
JP2003031657A (ja) * 2001-07-18 2003-01-31 Mitsubishi Electric Corp 半導体装置およびその製造方法
CN100342526C (zh) * 2003-08-22 2007-10-10 全懋精密科技股份有限公司 有电性连接垫金属保护层的半导体封装基板结构及其制法
JP2005252027A (ja) * 2004-03-04 2005-09-15 Nec Electronics Corp 多層配線構造の半導体装置
JP2008060532A (ja) * 2006-08-04 2008-03-13 Seiko Epson Corp 半導体装置
US8264077B2 (en) * 2008-12-29 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Backside metal of redistribution line with silicide layer on through-silicon via of semiconductor chips

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4834686A (enExample) * 1971-09-09 1973-05-21
US4648937A (en) * 1985-10-30 1987-03-10 International Business Machines Corporation Method of preventing asymmetric etching of lines in sub-micrometer range sidewall images transfer
KR900003618B1 (ko) * 1986-05-30 1990-05-26 후지쓰가부시끼가이샤 반도체장치 및 그 제조방법
JP2546297B2 (ja) * 1987-11-02 1996-10-23 日本電気株式会社 半導体記憶装置
US5027185A (en) * 1988-06-06 1991-06-25 Industrial Technology Research Institute Polycide gate FET with salicide
JPH02222148A (ja) * 1989-02-22 1990-09-04 Yamaha Corp 半導体装置
DE69123175T2 (de) * 1990-05-31 1997-04-03 Canon Kk Verfahren zur Verdrahtung einer Halbleiterschaltung
JPH06326106A (ja) * 1993-03-18 1994-11-25 Sony Corp ダミーパターンの形成方法
JP2955459B2 (ja) * 1993-12-20 1999-10-04 株式会社東芝 半導体装置の製造方法
JPH08293523A (ja) * 1995-02-21 1996-11-05 Seiko Epson Corp 半導体装置およびその製造方法
US6015326A (en) * 1996-09-03 2000-01-18 Advanced Vision Technologies,Inc. Fabrication process for electron field-emission display

Also Published As

Publication number Publication date
KR19990044725A (ko) 1999-06-25
JPH11154701A (ja) 1999-06-08
HK1019118A1 (en) 2000-01-21
US6175156B1 (en) 2001-01-16
TW366519B (en) 1999-08-11
DE19813741A1 (de) 1999-06-02
KR100268629B1 (ko) 2000-10-16
DE19813741B4 (de) 2005-09-22
CN1218291A (zh) 1999-06-02

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