CN1145534A - 快速电可擦可编程只读存储器单元及其制造方法 - Google Patents

快速电可擦可编程只读存储器单元及其制造方法 Download PDF

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CN1145534A
CN1145534A CN96107224A CN96107224A CN1145534A CN 1145534 A CN1145534 A CN 1145534A CN 96107224 A CN96107224 A CN 96107224A CN 96107224 A CN96107224 A CN 96107224A CN 1145534 A CN1145534 A CN 1145534A
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蒋尚焕
韩星英
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    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
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Abstract

本发明涉及一种快速EEPROM(电可擦可编程只读存贮器)单元及其制造方法，特别地，通过根据两个浮栅是否被编程或删除而使有效沟道长度改变以及偏置连接，使得这种EEPROM单元具有三种不同的输出电平，其中两个浮栅形成于沟道区中。

Description

快速电可擦可编程只读存储器单元及其制造方法
本发明涉及一种快速EEPROM(电可擦可编程只读存贮器)单元及其制造方法，特别地，通过根据两个浮栅是否被编程或删除而使有效沟道长度改变以及偏置连接，而使得这种EEPROM单元具有三种不同的输出电平，其中两个浮栅形成于沟道区中。
具有编程和电可擦功能的EEPROM半导体器件由于其独特的优点而已在市场上被广泛地接受。但是，EEPROM器件的每位生产成本较高，因而，通过增加单元的集成度来降低成本。这样，由于与DRAM单元相比，EEPROM单元具有相对复杂的结构，因此，在集成EEPROM单元时存在许多困难。
因此，本发明的一个目的是提供一种EEPROM单元及其制造方法以解决上述问题，其方法就是通过根据两个浮栅是否被编程或删除而使有效沟道长度改变以及偏置连接，而获得三种不同的输出电平。
为了实现上述目的，根据本发明的一个EEPROM单元包括第一和第二浮栅，从硅基片上通过下面的隧道氧化膜而使二者电绝缘，并且二者在形成时是相互平行地相邻，还包括一个介质膜垫片，此垫片位于第一浮栅和第二浮栅之间，还包括一个在第一浮栅和第二浮栅之上形成的控制栅极，其中此控制栅极与第一浮栅和第二浮栅之间电绝缘，还包括一个源区和一个漏区，它们在硅基片上形成并且与上述两个浮栅的两端的一部分重叠。
一种制造EEPROM单元的方法，包括下列步骤：在硅基片上形成第一隧道氧化膜，形成第一多晶硅模型以确定第一浮栅的宽度和一边，在第一多晶硅模型的壁上形成一个介质膜垫片，在已产生的结构上形成第二隧道氧化物，在与第一多晶硅图形平行的位置上形成第二多晶硅模型以确定第二浮栅的宽度和一边，然后形成一介质膜和第三多晶硅膜，通过采用掩膜而蚀刻第三多晶硅膜形成一控制栅极，其中第一和第二多晶硅模型的其它边被连续地蚀刻，在硅基片上采用离子注入处理而形成一个源区和一个漏区。
为了更充分地理解本发明的原理和目的，下面的详细描述中将参考的附图为：
图1A和1D表示了根据本发明制造的快速EEPROM单元的剖面图；
图2是1B的一个顶视图；以及
图3A和3C是一个器件的剖面图，此器件用于解释根据本发明的快速EEPROM的操作。
在上面的几个附图中，相似的参考序号涉及相似的部分。
图1A至图1D是说明根据本发明的快速EEPROM单元的制造方法的一个器件的剖面图；
在图1A中，第一隧道氧化物(2)和第一多晶硅膜在硅基片(1)上顺序地形成，构图第一多晶硅以确定第一浮栅的宽度和一边，因而形成第一多晶硅模型(3)。一介质膜垫片(4)在第一多晶硅模型(3)的一个蚀刻的壁上形成。此第一多晶硅模型(3)在一有源区(A)中形成，如图1所示。
参考图1B，在形成介质膜垫片后产生的结构上，顺序地形成第二隧道氧化物(5)和第二多晶硅，并且第二多晶硅被构图以确定第二浮栅的宽度和一边，从而形成第二多晶硅模型(6)。并且图1B也是图2所示的沿X-X′线的剖面图。如图2所示，第二多晶硅模型(6)形成在除了形成有第一多晶硅模型(3)的区域的有源区的剩余区域，其中的由第二多晶硅模型(6)确定的一边与由第一多晶硅模型确定的一边重叠。第一和第二多晶硅模型(3和6)延伸到场区(B)而完全覆盖住有源区(A)。
如图1C所示，介质膜(7)和第三多晶硅膜顺序地淀积。
在图1D中，通过用控制栅掩模(未示出)蚀刻第三多晶硅膜(8)而形成控制栅极(8A)中。同时，通过采用控制栅掩模的自对准蚀刻方法顺序地蚀刻介质膜(7)，第二多晶硅模型(6)，第二隧道氧化物(5)，第一多晶硅模型(3)和第一隧道氧化物(2)。并且然后通过离子注入处理而在硅基片(1)中形成源和漏(10和9)。如上所述，通过采用控制栅掩模的自对准蚀刻方法，第一和第二多晶硅模型(3和6)的其它边被确定，从而变成与有源区(A)平行的相邻的第一和第二浮栅(3A和6A)。
本发明的优点如下。由于金属氧化物半导体(MOS)晶体管的饱和电流随着其沟道长度的变化而变化，当有效沟道长度改变时，其饱和电流相应地变化，使得不同的饱和电流可以用于不同的逻辑电平。本发明能够提供三种不同的输出电平。例如，在一般的设计中，为了得到八(8)种不同的输出，需要三(3)个单元。而根据本发明仅仅需要二(2)个单元应可得到九(9)个不同的输出，因此器件的集成可大大地增加。
现在参考图3A至图3C，这些图中显示了上述的利用本技术原理制造快速EEPROM单元的操作。
为了对单元编程，即在浮栅中存储电荷，一个地电位加到源(10)和漏(9)并且一个约+12V的高电压设置到控制栅极(8A)。然后对第一和第二浮栅(3A和6A)顺序地编程。在擦除操作中，当源(10)和漏(9)设置为5V并且控制栅极(8A)设置成-12V时，存储在第一和第二浮栅(3A和6A)中的电荷通过隧道效应引出，如图3C所示。为了用类似的方法对第一或第二浮栅(3A和6A)的其中一个浮栅编程，在用与图3A所示的同样的方法对第一和第二浮栅(3A和6A)编程后，设置源(10)，漏(9)和控制栅极(8A)和分别为0V，5V和-12V，从而使第一浮栅(3A)被擦除，如图3B所示。反之，擦除第二浮栅(6A)是可能的。
如上所述，读入的编程数据的情况分成三种类型，(1)两个浮栅都被编程的情况，(2)一个浮栅被编程时另一浮栅被擦除，(3)两个浮栅都被擦除。
对于上述三种类型，第二种类型(例如，在这种情况下假设所述的第一浮栅(3A)被擦除)的读操作将在下面说明。
如果Vtp(第一种类型的阈值电压)被加到控制栅极(8A)，那么在第一浮栅(3A)下的一个沟道会转换而足够形成一个实际的漏。这样，此实际的漏产生同样的作用，即沟道长度减少到与第一浮栅的长度一样，使得与第一种类型相比，饱和电流更大。因此，采用本发明的原理，具有三种不同的输出的快速EEPROM单元可以采用上述的三种类型而实现。
如上所述，当采用本发明时，随着沟道长度的变化可获得不同的饱和电流，并且能够产生三种不同的输出电平，从而使得在增加器件的集成度而不增加费用方面具有显著的作用。
尽管在最佳实施例的描述中采用了一些特例，但是前面的描述仅仅用于说明本发明的原理，不难理解的是本发明不应限制在这里所说明和公开的最佳实施例。因此，根据本发明的精神而作的所有变化都包括在本发明的其它实施例中。

Claims (4)

1.一种快速EEPROM单元，包括：
第一和第二浮栅，它们由一下面的隧道氧化膜与硅基片电绝缘并且相互平行相邻地形成；
一介质膜垫片，形成于所述的第一浮栅和第二浮栅之间；
一控制栅极，形成在所述的第一浮栅和第二浮栅之上，其中所述控制栅极与所述的第一和第二浮栅之间电绝缘；以及
一个源区和一个漏区，形成于硅基片之上并且与所述的两个浮栅的两端重叠。
2.如权利要求1所述的EEPROM单元，其中所述的第二浮栅的一边与所述的第一浮栅的一边重叠。
3.一种制造EEPROM单元的方法，包括如下步骤：
在硅基片上形成第一隧道氧化膜；
形成第一多晶硅模型以确定第一浮栅的宽度和一边；
在第一多晶硅模型的壁上形成一介质膜垫片；
在形成所述介质膜垫片后产生的结构上形成第二隧道氧化物；
在与第一多晶硅模型平行的位置上形成第二多晶硅模型以确定第二浮栅的宽度和一边；
顺序地形成一介质膜和第三多晶硅膜；
通过采用掩模而蚀刻第三多晶硅膜形成一控制栅极，其中第一和第二多晶硅模型的其它边被连续地蚀刻；并且
在硅基片上采用离子注入处理而形成一个源区和一个漏区。
4.如权利要求3所述的方法，其中所述的第二浮栅的一边与所述的第一浮栅的一边重叠。
CN96107224A 1995-03-22 1996-03-22 快速电可擦可编程只读存储器单元及其制造方法 Expired - Fee Related CN1050699C (zh)

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