CN113574663B - 具有支石墓结构的半导体装置及其制造方法 - Google Patents

具有支石墓结构的半导体装置及其制造方法

Info

Publication number
CN113574663B
CN113574663B CN201980094137.9A CN201980094137A CN113574663B CN 113574663 B CN113574663 B CN 113574663B CN 201980094137 A CN201980094137 A CN 201980094137A CN 113574663 B CN113574663 B CN 113574663B
Authority
CN
China
Prior art keywords
chip
support
sheet
adhesive sheet
support sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201980094137.9A
Other languages
English (en)
Chinese (zh)
Other versions
CN113574663A (zh
Inventor
桥本慎太郎
谷口纮平
矢羽田达也
尾崎義信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Holdings Corp
Resonac Corp
Original Assignee
Showa Denko KK
Resonac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Showa Denko KK, Resonac Corp filed Critical Showa Denko KK
Publication of CN113574663A publication Critical patent/CN113574663A/zh
Application granted granted Critical
Publication of CN113574663B publication Critical patent/CN113574663B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/121Arrangements for protection of devices protecting against mechanical damage
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07321Aligning
    • H10W72/07327Aligning involving guiding structures, e.g. spacers or supporting members
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H10W72/07338Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy hardening the adhesive by curing, e.g. thermosetting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/353Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/953Materials of bond pads not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/20Configurations of stacked chips
    • H10W90/24Configurations of stacked chips at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Die Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
CN201980094137.9A 2019-04-25 2019-04-25 具有支石墓结构的半导体装置及其制造方法 Active CN113574663B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/017713 WO2020217404A1 (ja) 2019-04-25 2019-04-25 ドルメン構造を有する半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
CN113574663A CN113574663A (zh) 2021-10-29
CN113574663B true CN113574663B (zh) 2025-12-12

Family

ID=72941128

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980094137.9A Active CN113574663B (zh) 2019-04-25 2019-04-25 具有支石墓结构的半导体装置及其制造方法

Country Status (7)

Country Link
US (1) US12412880B2 (https=)
JP (1) JP7294410B2 (https=)
KR (1) KR102711424B1 (https=)
CN (1) CN113574663B (https=)
SG (1) SG11202110111YA (https=)
TW (1) TWI830901B (https=)
WO (1) WO2020217404A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020217394A1 (ja) * 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法
WO2020217404A1 (ja) 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置及びその製造方法
JP7452545B2 (ja) * 2019-08-29 2024-03-19 株式会社レゾナック 支持片の製造方法、半導体装置の製造方法、及び支持片形成用積層フィルム
JP2023102570A (ja) 2022-01-12 2023-07-25 株式会社レゾナック 個片化体形成用積層フィルム及びその製造方法、並びに半導体装置の製造方法
CN120981923A (zh) * 2023-07-21 2025-11-18 株式会社力森诺科 半导体装置及半导体装置的制造方法
WO2025164537A1 (ja) * 2024-02-02 2025-08-07 株式会社レゾナック 個片化体形成用積層フィルム及び半導体装置の製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7859119B1 (en) * 2003-11-10 2010-12-28 Amkor Technology, Inc. Stacked flip chip die assembly

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3210126B2 (ja) 1993-03-15 2001-09-17 株式会社東芝 液晶表示装置の製造方法
US5721452A (en) 1995-08-16 1998-02-24 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
JP2002222889A (ja) 2001-01-24 2002-08-09 Nec Kyushu Ltd 半導体装置及びその製造方法
KR20030018204A (ko) * 2001-08-27 2003-03-06 삼성전자주식회사 스페이서를 갖는 멀티 칩 패키지
US6787916B2 (en) * 2001-09-13 2004-09-07 Tru-Si Technologies, Inc. Structures having a substrate with a cavity and having an integrated circuit bonded to a contact pad located in the cavity
DE10360708B4 (de) 2003-12-19 2008-04-10 Infineon Technologies Ag Halbleitermodul mit einem Halbleiterstapel, Umverdrahtungsplatte, und Verfahren zur Herstellung derselben
US7312261B2 (en) * 2004-05-11 2007-12-25 International Business Machines Corporation Thermal interface adhesive and rework
JP4188337B2 (ja) * 2004-05-20 2008-11-26 株式会社東芝 積層型電子部品の製造方法
US7064430B2 (en) * 2004-08-31 2006-06-20 Stats Chippac Ltd. Stacked die packaging and fabrication method
TWI292617B (en) * 2006-02-03 2008-01-11 Siliconware Precision Industries Co Ltd Stacked semiconductor structure and fabrication method thereof
JP4954569B2 (ja) * 2006-02-16 2012-06-20 日東電工株式会社 半導体装置の製造方法
WO2007109326A2 (en) * 2006-03-21 2007-09-27 Promerus Llc Methods and materials useful for chip stacking, chip and wafer bonding
US20080029885A1 (en) 2006-08-07 2008-02-07 Sandisk Il Ltd. Inverted Pyramid Multi-Die Package Reducing Wire Sweep And Weakening Torques
TWI317993B (en) 2006-08-18 2009-12-01 Advanced Semiconductor Eng Stackable semiconductor package
JP2010040835A (ja) * 2008-08-06 2010-02-18 Toshiba Corp 積層型半導体装置の製造方法
JP5791866B2 (ja) 2009-03-06 2015-10-07 株式会社ディスコ ワーク分割装置
JPWO2010110069A1 (ja) 2009-03-23 2012-09-27 日立化成工業株式会社 ダイボンディング用樹脂ペースト、それを用いた半導体装置の製造方法、及び半導体装置
US8169058B2 (en) 2009-08-21 2012-05-01 Stats Chippac, Ltd. Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars
KR20120080634A (ko) * 2009-11-13 2012-07-17 히다치 가세고교 가부시끼가이샤 반도체 장치, 반도체 장치의 제조 방법 및 접착제층 부착 반도체 웨이퍼
KR20110083969A (ko) * 2010-01-15 2011-07-21 삼성전자주식회사 반도체 패키지 및 그 제조 방법
JP4976522B2 (ja) 2010-04-16 2012-07-18 日東電工株式会社 熱硬化型ダイボンドフィルム、ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法
JP5013148B1 (ja) 2011-02-16 2012-08-29 株式会社東京精密 ワーク分割装置及びワーク分割方法
KR101774938B1 (ko) * 2011-08-31 2017-09-06 삼성전자 주식회사 지지대를 갖는 반도체 패키지 및 그 형성 방법
JP5537515B2 (ja) * 2011-09-01 2014-07-02 株式会社東芝 積層型半導体装置の製造方法と製造装置
JP2013127014A (ja) * 2011-12-16 2013-06-27 Hitachi Chemical Co Ltd 接着シート
JP5840479B2 (ja) * 2011-12-20 2016-01-06 株式会社東芝 半導体装置およびその製造方法
WO2013133275A1 (ja) 2012-03-08 2013-09-12 日立化成株式会社 接着シート及び半導体装置の製造方法
KR101906269B1 (ko) * 2012-04-17 2018-10-10 삼성전자 주식회사 반도체 패키지 및 그 제조 방법
CN105143380B (zh) 2013-03-28 2019-05-17 古河电气工业株式会社 粘合带及晶片加工用胶带
JP2015176906A (ja) 2014-03-13 2015-10-05 株式会社東芝 半導体装置および半導体装置の製造方法
KR102161776B1 (ko) 2014-03-28 2020-10-06 에스케이하이닉스 주식회사 적층 패키지
US9418974B2 (en) 2014-04-29 2016-08-16 Micron Technology, Inc. Stacked semiconductor die assemblies with support members and associated systems and methods
US9412722B1 (en) 2015-02-12 2016-08-09 Dawning Leading Technology Inc. Multichip stacking package structure and method for manufacturing the same
DE102015204698B4 (de) * 2015-03-16 2023-07-20 Disco Corporation Verfahren zum Teilen eines Wafers
JP6603479B2 (ja) 2015-05-18 2019-11-06 日東電工株式会社 接着フィルム、ダイシングテープ一体型接着フィルム、複層フィルム、半導体装置の製造方法および半導体装置
US10297575B2 (en) * 2016-05-06 2019-05-21 Amkor Technology, Inc. Semiconductor device utilizing an adhesive to attach an upper package to a lower die
WO2018159305A1 (ja) 2017-02-28 2018-09-07 パナソニックIpマネジメント株式会社 ピラー供給用シートの製造方法、ガラスパネルユニットの製造方法及びガラス窓の製造方法
WO2020217404A1 (ja) 2019-04-25 2020-10-29 日立化成株式会社 ドルメン構造を有する半導体装置及びその製造方法
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7859119B1 (en) * 2003-11-10 2010-12-28 Amkor Technology, Inc. Stacked flip chip die assembly

Also Published As

Publication number Publication date
KR102711424B1 (ko) 2024-09-26
SG11202110111YA (en) 2021-11-29
JP7294410B2 (ja) 2023-06-20
CN113574663A (zh) 2021-10-29
TW202044423A (zh) 2020-12-01
KR20210145737A (ko) 2021-12-02
TWI830901B (zh) 2024-02-01
WO2020217404A1 (ja) 2020-10-29
JPWO2020217404A1 (https=) 2020-10-29
US12412880B2 (en) 2025-09-09
US20220157802A1 (en) 2022-05-19

Similar Documents

Publication Publication Date Title
CN113574663B (zh) 具有支石墓结构的半导体装置及其制造方法
CN113632226A (zh) 具有支石墓结构的半导体装置及其制造方法以及支撑片形成用层叠膜及其制造方法
CN118591870A (zh) 单片体形成用层叠膜及其制造方法、以及半导体装置的制造方法
CN113574664B (zh) 具有支石墓结构的半导体装置及其制造方法以及支撑片形成用层叠膜及其制造方法
JP7247733B2 (ja) ドルメン構造を有する半導体装置の製造方法
CN113614916B (zh) 具有支石墓结构的半导体装置的制造方法、支撑片的制造方法、以及支撑片形成用层叠膜
WO2020218530A1 (ja) ドルメン構造を有する半導体装置の製造方法及び支持片の製造方法
KR102764810B1 (ko) 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법, 및, 지지편 형성용 적층 필름 및 그 제조 방법
CN114270481B (zh) 支撑片的制造方法、半导体装置的制造方法及支撑片形成用层叠膜
TW202107666A (zh) 具有支石墓結構的半導體裝置及其製造方法、支撐片的製造方法、以及支撐片形成用積層膜
KR102741215B1 (ko) 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법, 및, 지지편 형성용 적층 필름 및 그 제조 방법

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information

Address after: Tokyo

Applicant after: Lishennoco Co.,Ltd.

Address before: Tokyo

Applicant before: Showa electrical materials Co.,Ltd.

CB02 Change of applicant information
GR01 Patent grant
GR01 Patent grant