CN1132941A - Pmosfet及由此制造的cmos器件 - Google Patents

Pmosfet及由此制造的cmos器件 Download PDF

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Publication number
CN1132941A
CN1132941A CN95120272A CN95120272A CN1132941A CN 1132941 A CN1132941 A CN 1132941A CN 95120272 A CN95120272 A CN 95120272A CN 95120272 A CN95120272 A CN 95120272A CN 1132941 A CN1132941 A CN 1132941A
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mentioned
pmosfet
substrate
channel region
type
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CN95120272A
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Chinese (zh)
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伊西克·C·基兹尔亚利
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AT&T Corp
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AT&T Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/637—Lateral IGFETs having no inversion channels, e.g. buried channel lateral IGFETs, normally-on lateral IGFETs or depletion-mode lateral IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01031—Gallium [Ga]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CN95120272A 1994-12-01 1995-11-27 Pmosfet及由此制造的cmos器件 Pending CN1132941A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US34798094A 1994-12-01 1994-12-01
US347,980 1994-12-01

Publications (1)

Publication Number Publication Date
CN1132941A true CN1132941A (zh) 1996-10-09

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN95120272A Pending CN1132941A (zh) 1994-12-01 1995-11-27 Pmosfet及由此制造的cmos器件

Country Status (6)

Country Link
US (2) US5710055A (enExample)
JP (1) JPH08227992A (enExample)
KR (1) KR960026938A (enExample)
CN (1) CN1132941A (enExample)
DE (1) DE19544945A1 (enExample)
TW (1) TW304301B (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100364055C (zh) * 2004-09-02 2008-01-23 海力士半导体有限公司 半导体器件的单元沟道离子的注入方法
CN100530696C (zh) * 2004-03-12 2009-08-19 惠普开发有限公司 具有多组分氧化物制备的沟道的半导体器件
CN100592535C (zh) * 2004-03-12 2010-02-24 惠普开发有限公司 具有包含二元氧化物的混合物的沟道的半导体器件
US20100117074A1 (en) * 2008-11-07 2010-05-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN105679712A (zh) * 2015-12-31 2016-06-15 上海华虹宏力半导体制造有限公司 Sonos器件的工艺方法
CN107039506A (zh) * 2010-12-03 2017-08-11 三重富士通半导体股份有限公司 对改进型晶体管的源/漏延伸控制

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6030874A (en) * 1997-01-21 2000-02-29 Texas Instruments Incorporated Doped polysilicon to retard boron diffusion into and through thin gate dielectrics
US5891782A (en) * 1997-08-21 1999-04-06 Sharp Microelectronics Technology, Inc. Method for fabricating an asymmetric channel doped MOS structure
TW388087B (en) * 1997-11-20 2000-04-21 Winbond Electronics Corp Method of forming buried-channel P-type metal oxide semiconductor
US6013546A (en) * 1997-12-19 2000-01-11 Advanced Micro Devices, Inc. Semiconductor device having a PMOS device with a source/drain region formed using a heavy atom p-type implant and method of manufacture thereof
US6146934A (en) * 1997-12-19 2000-11-14 Advanced Micro Devices, Inc. Semiconductor device with asymmetric PMOS source/drain implant and method of manufacture thereof
KR100248509B1 (ko) * 1997-12-30 2000-03-15 김영환 매몰 채널 nmos 트랜지스터를 구비하는 반도체 장치의cmos 논리 게이트 및 그 제조방법
WO1999035685A1 (en) * 1998-01-05 1999-07-15 Advanced Micro Devices, Inc. Integrated cmos transistor formation
US6063682A (en) * 1998-03-27 2000-05-16 Advanced Micro Devices, Inc. Ultra-shallow p-type junction having reduced sheet resistance and method for producing shallow junctions
US6331456B1 (en) * 1998-05-04 2001-12-18 Texas Instruments - Acer Incorporated Fipos method of forming SOI CMOS structure
US6087209A (en) * 1998-07-31 2000-07-11 Advanced Micro Devices, Inc. Formation of low resistance, ultra shallow LDD junctions employing a sub-surface, non-amorphous implant
US6180468B1 (en) * 1998-10-23 2001-01-30 Advanced Micro Devices Inc. Very low thermal budget channel implant process for semiconductors
FR2794898B1 (fr) 1999-06-11 2001-09-14 France Telecom Dispositif semi-conducteur a tension de seuil compensee et procede de fabrication
KR100332107B1 (ko) * 1999-06-29 2002-04-10 박종섭 반도체 소자의 트랜지스터 제조 방법
US6372582B1 (en) * 1999-08-18 2002-04-16 Advanced Micro Devices, Inc. Indium retrograde channel doping for improved gate oxide reliability
US6686629B1 (en) * 1999-08-18 2004-02-03 International Business Machines Corporation SOI MOSFETS exhibiting reduced floating-body effects
US20030235936A1 (en) * 1999-12-16 2003-12-25 Snyder John P. Schottky barrier CMOS device and method
US6303479B1 (en) * 1999-12-16 2001-10-16 Spinnaker Semiconductor, Inc. Method of manufacturing a short-channel FET with Schottky-barrier source and drain contacts
JP2002076332A (ja) * 2000-08-24 2002-03-15 Hitachi Ltd 絶縁ゲート型電界効果トランジスタ及びその製造方法
JP3940565B2 (ja) * 2001-03-29 2007-07-04 株式会社東芝 半導体装置及びその製造方法
EP1417718A1 (en) * 2001-08-10 2004-05-12 Spinnaker Semiconductor, Inc. Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
US20060079059A1 (en) * 2001-08-10 2006-04-13 Snyder John P Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate
JP3481223B2 (ja) * 2001-09-07 2003-12-22 松下電器産業株式会社 半導体装置の製造方法
US6747318B1 (en) * 2001-12-13 2004-06-08 Lsi Logic Corporation Buried channel devices and a process for their fabrication simultaneously with surface channel devices to produce transistors and capacitors with multiple electrical gate oxides
US6974737B2 (en) * 2002-05-16 2005-12-13 Spinnaker Semiconductor, Inc. Schottky barrier CMOS fabrication method
US6756619B2 (en) * 2002-08-26 2004-06-29 Micron Technology, Inc. Semiconductor constructions
EP1554756B1 (en) * 2002-09-20 2016-07-20 Koninklijke Philips N.V. A method for manufacturing an electrical device
KR100496551B1 (ko) * 2002-11-20 2005-06-22 주식회사 하이닉스반도체 반도체 소자의 제조 방법
KR100460757B1 (ko) * 2003-04-30 2004-12-14 주식회사 하이닉스반도체 이중 도핑 구조의 초박형 에피채널 반도체 소자의 제조 방법
JP5114829B2 (ja) * 2005-05-13 2013-01-09 ソニー株式会社 半導体装置およびその製造方法
KR100779395B1 (ko) * 2006-08-31 2007-11-23 동부일렉트로닉스 주식회사 반도체소자 및 그 제조방법
US20090032885A1 (en) * 2007-07-31 2009-02-05 Intersil Americas, Inc. Buried Isolation Layer
JP2009182089A (ja) * 2008-01-30 2009-08-13 Panasonic Corp 半導体装置の製造方法
JP5527080B2 (ja) * 2010-07-22 2014-06-18 富士通セミコンダクター株式会社 半導体装置の製造方法
US10553494B2 (en) * 2016-11-29 2020-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Breakdown resistant semiconductor apparatus and method of making same
JP6996858B2 (ja) * 2017-03-29 2022-01-17 旭化成エレクトロニクス株式会社 半導体装置及びその製造方法
US10319855B2 (en) 2017-09-25 2019-06-11 International Business Machines Corporation Reducing series resistance between source and/or drain regions and a channel region

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5413779A (en) * 1977-07-04 1979-02-01 Toshiba Corp Semiconductor integrated circuit device
US4199773A (en) * 1978-08-29 1980-04-22 Rca Corporation Insulated gate field effect silicon-on-sapphire transistor and method of making same
US4574467A (en) * 1983-08-31 1986-03-11 Solid State Scientific, Inc. N- well CMOS process on a P substrate with double field guard rings and a PMOS buried channel
US4679303A (en) * 1983-09-30 1987-07-14 Hughes Aircraft Company Method of fabricating high density MOSFETs with field aligned channel stops
US5256583A (en) * 1986-03-21 1993-10-26 Advanced Power Technology, Inc. Mask surrogate semiconductor process with polysilicon gate protection
EP0296627A3 (en) * 1987-06-25 1989-10-18 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device
US4845047A (en) * 1987-06-25 1989-07-04 Texas Instruments Incorporated Threshold adjustment method for an IGFET
US5114874A (en) * 1987-07-15 1992-05-19 Rockwell International Corporation Method of making a sub-micron NMOS, PMOS and CMOS devices with methods for forming sub-micron contacts
JPH0744275B2 (ja) * 1988-10-06 1995-05-15 日本電気株式会社 高耐圧ｍｏｓ型半導体装置の製造方法
JPH02291150A (ja) * 1989-04-28 1990-11-30 Hitachi Ltd 半導体装置
US5134448A (en) * 1990-01-29 1992-07-28 Motorola, Inc. MOSFET with substrate source contact
JPH0734477B2 (ja) * 1990-05-28 1995-04-12 株式会社東芝 半導体装置の製造方法
US5266510A (en) * 1990-08-09 1993-11-30 Micron Technology, Inc. High performance sub-micron p-channel transistor with germanium implant
KR940002400B1 (ko) * 1991-05-15 1994-03-24 금성일렉트론 주식회사 리세스 게이트를 갖는 반도체장치의 제조방법
US5401994A (en) * 1991-05-21 1995-03-28 Sharp Kabushiki Kaisha Semiconductor device with a non-uniformly doped channel
US5244823A (en) * 1991-05-21 1993-09-14 Sharp Kabushiki Kaisha Process for fabricating a semiconductor device
US5320974A (en) * 1991-07-25 1994-06-14 Matsushita Electric Industrial Co., Ltd. Method for making semiconductor transistor device by implanting punch through stoppers
US5266508A (en) * 1991-08-26 1993-11-30 Sharp Kabushiki Kaisha Process for manufacturing semiconductor device
US5330925A (en) * 1992-06-18 1994-07-19 At&T Bell Laboratories Method for making a MOS device
US5346587A (en) * 1993-08-12 1994-09-13 Micron Semiconductor, Inc. Planarization of a gate electrode for improved gate patterning over non-planar active area isolation

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100530696C (zh) * 2004-03-12 2009-08-19 惠普开发有限公司 具有多组分氧化物制备的沟道的半导体器件
CN100592535C (zh) * 2004-03-12 2010-02-24 惠普开发有限公司 具有包含二元氧化物的混合物的沟道的半导体器件
CN100364055C (zh) * 2004-09-02 2008-01-23 海力士半导体有限公司 半导体器件的单元沟道离子的注入方法
US20100117074A1 (en) * 2008-11-07 2010-05-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN101740633A (zh) * 2008-11-07 2010-06-16 株式会社半导体能源研究所 半导体器件及其制造方法
US8395148B2 (en) * 2008-11-07 2013-03-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN101740633B (zh) * 2008-11-07 2014-10-15 株式会社半导体能源研究所 半导体器件及其制造方法
CN107039506A (zh) * 2010-12-03 2017-08-11 三重富士通半导体股份有限公司 对改进型晶体管的源/漏延伸控制
CN107039506B (zh) * 2010-12-03 2020-09-11 联华电子日本株式会社 对改进型晶体管的源/漏延伸控制
CN105679712A (zh) * 2015-12-31 2016-06-15 上海华虹宏力半导体制造有限公司 Sonos器件的工艺方法

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JPH08227992A (ja) 1996-09-03
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US5767557A (en) 1998-06-16
US5710055A (en) 1998-01-20
TW304301B (enExample) 1997-05-01

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