CN111725191A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN111725191A CN111725191A CN202010187073.1A CN202010187073A CN111725191A CN 111725191 A CN111725191 A CN 111725191A CN 202010187073 A CN202010187073 A CN 202010187073A CN 111725191 A CN111725191 A CN 111725191A
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- Prior art keywords
- wires
- semiconductor device
- metal
- wire
- semiconductor element
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 106
- 229910052751 metal Inorganic materials 0.000 claims abstract description 94
- 239000002184 metal Substances 0.000 claims abstract description 94
- 239000000758 substrate Substances 0.000 claims description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 239000010949 copper Substances 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 230000020169 heat generation Effects 0.000 description 6
- 230000006378 damage Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000008929 regeneration Effects 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
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Abstract
目的在于提供能够抑制电流路径的截面积的减小,并且提高熔断特性的半导体装置。具有半导体元件、端子电极以及内部配线。半导体元件被收容于壳体。端子电极以能够与壳体的外部电连接的方式而设置。内部配线设置于壳体内,将半导体元件与端子电极之间电连接。内部配线在内部配线的一部分包含通过过电流而熔断的熔断部。熔断部包含一组并列配线即多根金属线。多根金属线中的一根金属线的电阻值比在一根金属线的外侧配线的其它金属线的电阻值高。
Description
技术领域
本发明涉及半导体装置。
背景技术
当前,在半导体模块中的电容器等电子部件发生了短路故障的情况下,在半导体模块所包含的半导体装置流过过大的短路电流,半导体模块破损。并且,由于超过额定值的电流流过半导体装置,因此该半导体模块的破损程度变大。
在专利文献1中记载了将与功率开关元件的芯片连接的配线的一部分用作熔断器的功率模块元件。就专利文献1的功率模块而言,通过改变板熔断器的切入量而调整其熔断特性。或者,通过改变键合导线的数量、粗细或长度而调整其熔断特性。例如,在熔断部由多根键合导线构成的情况下,为了可靠地熔断所有的键合导线,必须减小各导线的截面积。
专利文献1:日本特开平8-195411号公报
在通过调整电流路径的截面积而调整熔断特性的情况下,熔断部的截面积比该熔断部的前后的电流路径的截面积小。例如,电流路径的最小截面部对应于熔断部。
由于最小截面部为高电阻,因此在半导体装置进行通常动作的情况下,最小截面部成为发热源。因此,半导体装置在通常动作时温度升高,给其它电子部件等带来不良影响。
发明内容
本发明就是为了解决上述这样的问题而提出的,其目的在于提供能够确保稳定的熔断特性,并且防止通常使用时的熔断部的损耗增大的半导体装置。
本发明涉及的半导体装置具有半导体元件、端子电极以及内部配线。半导体元件被收容于壳体。端子电极以能够与壳体的外部电连接的方式而设置。内部配线设置于壳体内,将半导体元件与端子电极之间电连接。内部配线在内部配线的一部分包含通过过电流而熔断的熔断部。熔断部包含一组并列配线即多根金属线。多根金属线中的一根金属线的电阻值比在一根金属线的外侧配线的其它金属线的电阻值高。
发明的效果
根据本发明,能够提供确保稳定的熔断特性,并且防止通常使用时的熔断部的损耗增大的半导体装置。
本发明的目的、特征、方案以及优点通过以下的详细说明和附图变得更清楚。
附图说明
图1是表示实施方式1中的半导体装置的结构的俯视图。
图2是表示实施方式2中的半导体装置的结构的俯视图。
图3是表示实施方式3中的半导体装置的熔断部的结构的俯视图。
图4是表示实施方式3中的半导体装置的熔断部的结构的俯视图。
图5是表示实施方式3中的nout与ΔI之间的关系的图。
标号的说明
1绝缘基板,2电路图案,3半导体元件,5端子电极,6熔断部,7金属线,8金属线,9内部配线,10壳体。
具体实施方式
<实施方式1>
图1是表示实施方式1中的半导体装置的结构的俯视图。半导体装置包含绝缘基板1、壳体10、半导体元件3、端子电极5以及内部配线9。
绝缘基板1包含绝缘材料作为基体材料。绝缘基板1在主面包含具有导电性的电路图案2,在与主面相反侧的面包含散热性图案(未图示)。在图1中,作为一个例子,在绝缘基板1的主面设置有3个电路图案2。电路图案2例如是印刷配线。
壳体10呈框形状。壳体10以其框形状将绝缘基板1的外周部包围的方式而设置。
半导体元件3被收容于壳体10内,并且保持于绝缘基板1的主面。在实施方式1中,2个半导体元件3配置于1个电路图案2之上。半导体元件3例如是IGBT(Insulated GateBipolar Transistor)、MOSFET(Metal Oxide Semiconductor Field EffectTransistor)、肖特基势垒二极管等。半导体元件3例如包含SiC、GaN等宽带隙半导体作为材料。半导体元件3例如是电力用半导体元件(功率半导体元件)。
端子电极5以能够与在壳体10的外部设置的外部电路(未图示)电连接的方式而设置。这里,端子电极5设置于壳体10。
内部配线9设置于壳体10内,包含多根金属线8以及上述电路图案2。多根金属线8例如是键合导线。多根金属线8将2个半导体元件3之间、半导体元件3与电路图案2之间、以及电路图案2与端子电极5之间各自连接。通过这样的结构,内部配线9将半导体元件3与端子电极5之间电连接。另外,多根金属线8的数量大于或等于构成后述的熔断部6的多根金属线7的数量。因此,多根金属线8具有与熔断部6相比不易熔断的特性。此外,多根金属线8是一个例子,将半导体元件3与端子电极5之间电连接的该配线不限定于键合导线等金属线。半导体元件3与端子电极5之间的配线只要构成为具有与熔断部6相比不易熔断的特性即可。
绝缘基板1、半导体元件3以及内部配线9在壳体10内由封装材料(未图示)封装。
内部配线9在其一部分还包含通过过电流而熔断的熔断部6。换言之,熔断部6具有熔断器功能。熔断部6包含一组并列配线即多根金属线7。一组并列配线对应于例如由多根金属线7形成同1根内部配线9(电流路径)的结构。即,与多根金属线7各自对应的多个一端是从同1根内部配线9分支出的,另外,上述多根金属线的多个另一端也是从同1根内部配线9分支出的。
多根金属线7中的一根金属线7A的电阻值比在该一根金属线7A的外侧配线的其它金属线7B的电阻值高。在实施方式1中,多根金属线7中的在中央侧配线的金属线7A的长度比在上述金属线7A的外侧配线的金属线7B的长度长。因此,中央侧的金属线7A的电阻值比在其外侧配线的金属线7B的电阻值高。
多根金属线7的电阻值不限定于2种,也可以具有至少2种电阻值。例如,如图1所示,在多根金属线7各自以其长度从中央朝向外侧而逐渐变短的方式配线的情况下,多根金属线7具有多个电阻值。例如,多根金属线7中的在中央配线的金属线7A具有最高的电阻值。另外,实施方式1中的各金属线7的粗细相同,但也可以不同。
另外,优选熔断部6即多根金属线7以将半导体元件3与端子电极5之间的2个区域间连接的方式而设置。该2个区域各自例如是半导体元件3、端子电极5或电路图案2。实施方式1中的多根金属线7以将2个电路图案2之间连接的方式而设置。
多根金属线7各自例如是键合导线。多根金属线7各自由铝、金、银或铜构成。或者,多根金属线7各自由包含铝、金、银或铜的合金构成。
在半导体装置进行通常动作的情况下,通过中央侧的金属线7A以及外侧的金属线7B这两者而确保电流路径。因此,半导体装置抑制了由多根金属线7构成的熔断部6的发热所导致的电路的温度升高。另一方面,在超过额定值的电流流过了多根金属线7的情况下,即产生了过电流的情况下,流过中央侧的金属线7A的电流值与流过外侧的金属线7B的电流值之间产生差异。这是因为中央侧的金属线7A的电阻值与外侧的金属线7B的电阻值不同。多根金属线7中的发热量多的外侧的金属线7B首先熔断。其结果,相比于外侧的金属线7B,包含中央侧的金属线7A的多根金属线作为电流路径而残留下来。在该残留下来的多根金属线流过电流,同样地,发热量多的外侧的金属线进一步熔断。通过反复进行这样的熔断现象,从而仅中央侧的金属线7A作为电流路径而残留下来。并且,电流集中于中央侧的金属线7A,金属线7A也熔断。最终,多根金属线7全部熔断,过电流的电流路径消失,防止由过电流引起的半导体装置内的电路的破坏。
在熔断部由全部具有相同电阻值的多根金属线构成的情况下,所有金属线通过过电流而同时熔断。因此,熔断需要高能量,直至所有金属线的熔断为止需要时间。另一方面,在实施方式1中的熔断部6产生了过电流的情况下,首先,从外侧的金属线7B开始依次熔断,最后金属线7A熔断。由于多根金属线7阶段性地熔断,因此其熔断能量小。这样的熔断部6取得以下效果,即,能够以最小限度的时间切断电流,防止电路的损坏。
综上所述,实施方式1中的半导体装置具有半导体元件3、端子电极5以及内部配线9。半导体元件3被收容于壳体10。端子电极5以能够与壳体10的外部电连接的方式而设置。内部配线9设置于壳体10内,将半导体元件3与端子电极5之间电连接。内部配线9在内部配线9的一部分包含通过过电流而熔断的熔断部6。熔断部6包含一组并列配线即多根金属线7。多根金属线7中的一根金属线7A的电阻值比在一根金属线7A的外侧配线的其它金属线7B的电阻值高。
这样的半导体装置确保了稳定的熔断特性,并且防止了通常使用时的熔断部6的损耗增大。半导体装置例如能够在满足基于过电流的熔断特性的同时,使主电流路径的截面积最大化。例如,在超过额定的电流值的电流流过由多根键合导线构成的熔断部6的情况下,所有键合导线可靠地熔断。
由于熔断部6由多根金属线7构成,因此在半导体装置进行通常动作的情况下,通过中央侧的金属线7A以及外侧的金属线7B这两者而确保电流路径。因此,半导体装置抑制了由多根金属线7构成的熔断部6的发热所导致的电路的温度升高。
另一方面,由于中央侧的金属线7A以及外侧的金属线7B的电阻值不同,因此在超过额定值的电流流过了多根金属线7的情况下,流过中央侧的金属线7A的电流值与流过外侧的金属线7B的电流值之间产生差异。在多根金属线7中,从发热量多的外侧的金属线7B朝向中央侧的金属线7A而依次熔断,最终所有金属线7熔断。因此,半导体装置防止了由过电流引起的电路的破坏。
另外,由于在多根金属线7内有意地设置有高电阻的金属线,因此容易确定由过电流破坏的金属线的位置。另外,实施方式1中的半导体装置能够使熔断部6的截面的面积尽可能大。这样的半导体装置例如能够用作发电以及输电用途的半导体装置、高效的能量利用以及再生用途的半导体装置。
另外,实施方式1中的多根金属线7具有至少2种电阻值而作为多根金属线7各自的电阻值。
这样的半导体装置由于使各金属线7熔断的过电流的电流值不同,因此针对各种大小的过电流,兼顾了熔断特性的确保以及通常时的电流路径的确保。
另外,实施方式1中的内部配线9还包含电路图案2。电路图案2具有导电性,并且在设置于壳体10内的绝缘基板1的主面进行配线。多根金属线7将半导体元件3与端子电极5之间的2个区域间连接。2个区域各自是半导体元件3、端子电极5或电路图案2。
这样的半导体装置能够提供适用于由键合导线构成的熔断部6的构造。
另外,实施方式1中的多根金属线7各自是键合导线。
这样的半导体装置能够通过键合导线的长度而对构成熔断部6的多根金属线7各自的电阻值进行调整。
另外,实施方式1中的多根金属线7各自由铝、金、银或铜构成。或者,多根金属线7各自由包含铝、金、银或铜的合金构成。
这样的半导体装置能够通过各种材料及其组合而容易地调整多根金属线7的电阻值。
<实施方式2>
对实施方式2中的半导体装置进行说明。此外,对于与实施方式1相同的结构及动作,省略说明。
图2是表示实施方式2中的半导体装置的结构的俯视图。实施方式2中的半导体装置与实施方式1中的半导体装置相比,多根金属线7的结构不同。
在实施方式2中,多根金属线7中的在中央侧配线的金属线7C的截面积比在金属线7C的外侧配线的金属线7D的截面积小。例如,如图2所示,中央侧的3根金属线7C的截面积比它们的外侧的4根金属线7D的截面积小。因此,中央侧的金属线7C的电阻值比在它们的外侧配线的金属线7D的电阻值高。
这样的半导体装置确保了稳定的熔断特性,并且防止了通常使用时的熔断部6的损耗增大。
由于熔断部6由多根金属线7构成,因此在半导体装置进行通常动作的情况下,通过中央侧的金属线7C以及外侧的金属线7D这两者而确保电流路径。因此,半导体装置抑制了由多根金属线7构成的熔断部6的发热所导致的电路的温度升高。
另一方面,由于中央侧的金属线7C以及外侧的金属线7D的电阻值不同,因此在多根金属线7处产生了过电流的情况下,流过中央侧的金属线7C的电流值与流过外侧的金属线7D的电流值之间产生差异。多根金属线7中的发热量多的外侧的金属线7D首先熔断。然后,中央侧的金属线7C熔断,最终所有金属线7熔断。因此,半导体装置防止了由过电流引起的电路的破坏。
另外,这样的半导体装置能够通过多根金属线7各自的截面积的大小而对构成熔断部6的多根金属线7各自的电阻值进行调整。半导体装置针对各种大小的过电流,兼顾了熔断特性的确保以及通常时的电流路径的确保。
<实施方式3>
对实施方式3中的半导体装置进行说明。此外,对于与实施方式1或2相同的结构及动作,省略说明。
在超过额定值的电流流过了熔断部6即多根金属线7的情况下,例如,流过图1中的中央侧的金属线7A的电流值与流过外侧的金属线7B的电流值之间产生差异。根据该电流值之差,决定金属线7的熔断特性之一即熔断的容许度。例如,在由过电流引起的电流值之差小的情况下,多根金属线7同时熔断。因此,熔断需要高能量,直至所有金属线的熔断为止需要时间。但是,如果电流值之差足够大,则从外侧的金属线7B朝向中央侧的金属线7A而依次熔断。多根金属线7阶段性地熔断,因此其熔断能量小。这样的熔断部6能够以最小限度的时间切断电流,防止电路的破坏。
就实施方式3中的半导体装置而言,在将电流值之差设为ΔI,将流过多根金属线7的电流值设为I,将多根金属线7的数量设为n,将分别与多根金属线7对应地流过的多个电流中的最大电流值设为Imax,将多个电流中的最小电流值设为Imin的情况下,满足式(1)的关系。这里,由I表示的流过多根金属线7的电流值对应于流过各金属线7的电流值的总和。
[式1]
ΔI=(Imax-Imin)/(I/n)>50% (1)
图3及图4是表示实施方式3中的半导体装置的熔断部6的结构的俯视图。熔断部6由在2个电路图案2之间设置的18根金属线7构成。这些金属线7是键合导线。
就图3所示的半导体装置而言,18根金属线7中的在最外侧配线的2根金属线7F的长度比与它们相比在中央侧配线的16根金属线7E的长度短。另外,这里,16根金属线7E各自的长度相同。就这样的结构而言,中央侧的各金属线7E的电阻值比在它们的外侧配线的各金属线7F的电阻值高。因此,式(1)中的Imax对应于流过在最外侧配线的2根金属线7F各自的电流值。另外,Imin对应于流过中央侧的16根金属线7E各自的电流值。
就图4所示的半导体装置而言,18根金属线7中的在最外侧配线的2根以及在它们的内侧配线的4根合计6根金属线7F的长度比在中央侧配线的12根金属线7E的长度短。因此,式(1)中的Imax对应于流过在外侧配线的6根金属线7F各自的电流值。另外,Imin对应于流过中央侧的12根金属线7E各自的电流值。
这里,将18根金属线7中的在外侧配线的金属线7F的数量设为nout。图5是表示实施方式3中的nout与ΔI之间的关系的图。图3所示的半导体装置对应于nout=2。图4所示的半导体装置对应于nout=6。
在熔断部6由18根金属线7构成的情况下,如果在外侧配线的金属线7F的数量小于或等于16根,则半导体装置满足ΔI>50%的关系。另外,即使仅在最外侧配线的2根金属线7F比中央侧的16根金属线7E短,半导体装置也满足ΔI>50%的关系。
这样的半导体装置确保了稳定的熔断特性,并且防止了通常使用时的熔断部6的损耗增大。
由于实施方式3中的熔断部6构成为流过多根金属线7的电流值之差大于或等于50%,因此在半导体装置进行通常动作的情况下,通过中央侧的金属线7E以及外侧的金属线7F这两者而确保电流路径。因此,半导体装置抑制了由多根金属线7构成的熔断部6的发热所导致的电路的温度升高。
另一方面,由于中央侧的金属线7E以及外侧的金属线7F的电阻值不同,因此在多根金属线7处产生了过电流的情况下,流过中央侧的金属线7E的电流值与流过外侧的金属线7F的电流值之间产生差异。多根金属线7中的发热量多的外侧的金属线7F首先熔断。然后,中央侧的金属线7E熔断,最终所有金属线7熔断。因此,半导体装置防止了由过电流引起的电路的破坏。
此外,本发明能够在该发明的范围内对各实施方式自由地进行组合,或者对各实施方式适当地进行变形、省略。
对于本发明进行了详细说明,但上述说明在所有方面均为例示,本发明不限定于此。可以理解为在不脱离本发明的范围的情况下能够想到未例示出的无数的变形例。
Claims (8)
1.一种半导体装置,其具有:
半导体元件,其被收容于壳体;
端子电极,其以能够与所述壳体的外部电连接的方式而设置;以及
内部配线,其设置于所述壳体内,将所述半导体元件与所述端子电极之间电连接,
所述内部配线在所述内部配线的一部分包含通过过电流而熔断的熔断部,
所述熔断部包含一组并列配线即多根金属线,
所述多根金属线中的一根金属线的电阻值比在所述一根金属线的外侧配线的其它金属线的电阻值高。
2.根据权利要求1所述的半导体装置,其中,
所述多根金属线具有至少大于或等于2种电阻值而作为所述多根金属线各自的所述电阻值。
3.根据权利要求1或2所述的半导体装置,其中,
所述内部配线还包含电路图案,该电路图案具有导电性,并且在设置于所述壳体内的绝缘基板的主面进行配线,
所述多根金属线将所述半导体元件与所述端子电极之间的2个区域间进行连接,
所述2个区域各自是所述半导体元件、所述端子电极或所述电路图案。
4.根据权利要求3所述的半导体装置,其还具有:
所述壳体;以及
所述绝缘基板,
所述半导体元件保持于所述绝缘基板的所述主面。
5.根据权利要求1至4中任一项所述的半导体装置,其中,
所述多根金属线各自是键合导线。
6.根据权利要求1至5中任一项所述的半导体装置,其中,
所述多根金属线各自由铝、金、银或铜构成,或者由包含铝、金、银或铜的合金构成。
7.根据权利要求1至6中任一项所述的半导体装置,其中,
所述多根金属线中的所述一根金属线的截面积比在所述一根金属线的外侧配线的所述其它金属线的截面积小。
8.根据权利要求1至7中任一项所述的半导体装置,其中,
在将流过所述多根金属线的电流值设为I,将所述多根金属线的数量设为n,将分别与所述多根金属线对应地流过的多个电流中的最大电流值设为Imax,将所述多个电流中的最小电流值设为Imin的情况下,满足
(Imax-Imin)/(I/n)>50%
的关系式。
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009218275A (ja) * | 2008-03-07 | 2009-09-24 | Mitsubishi Electric Corp | 半導体装置及びその半導体装置を備えたインバータシステム |
CN102822967A (zh) * | 2010-04-01 | 2012-12-12 | 日立汽车系统株式会社 | 功率模块、以及具备功率模块的电力变换装置 |
US20170077012A1 (en) * | 2015-09-16 | 2017-03-16 | Mitsubishi Electric Corporation | Amplifier |
JP2017139903A (ja) * | 2016-02-04 | 2017-08-10 | 矢崎総業株式会社 | 電流遮断装置 |
CN107039408A (zh) * | 2015-10-22 | 2017-08-11 | 三菱电机株式会社 | 半导体装置及半导体装置的制造方法 |
CN107393822A (zh) * | 2017-07-17 | 2017-11-24 | 中国振华集团永光电子有限公司(国营第八七三厂) | 一种具有瞬态电压抑制和整流功能的玻璃钝化续流二极管的制造方法 |
JP2018148164A (ja) * | 2017-03-09 | 2018-09-20 | 株式会社東芝 | パワー半導体モジュール |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH02216475A (ja) * | 1989-02-17 | 1990-08-29 | Nec Corp | 半導体装置の検査方法 |
JPH04147635A (ja) | 1990-10-09 | 1992-05-21 | Mitsubishi Electric Corp | 高周波高出力トランジスタ |
JP3292614B2 (ja) * | 1995-01-17 | 2002-06-17 | 東芝アイティー・コントロールシステム株式会社 | パワーモジュール素子 |
JPH11238851A (ja) * | 1998-02-23 | 1999-08-31 | Hitachi Ltd | 集積回路装置およびそれを用いた通信機 |
JP2008235502A (ja) * | 2007-03-20 | 2008-10-02 | Mitsubishi Electric Corp | 樹脂封止型半導体装置 |
DE102009029040A1 (de) | 2009-08-31 | 2011-03-03 | Robert Bosch Gmbh | Vorrichtung und Verfahren zur Herstellung einer Vorrichtung |
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Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009218275A (ja) * | 2008-03-07 | 2009-09-24 | Mitsubishi Electric Corp | 半導体装置及びその半導体装置を備えたインバータシステム |
CN102822967A (zh) * | 2010-04-01 | 2012-12-12 | 日立汽车系统株式会社 | 功率模块、以及具备功率模块的电力变换装置 |
US20170077012A1 (en) * | 2015-09-16 | 2017-03-16 | Mitsubishi Electric Corporation | Amplifier |
CN107039408A (zh) * | 2015-10-22 | 2017-08-11 | 三菱电机株式会社 | 半导体装置及半导体装置的制造方法 |
JP2017139903A (ja) * | 2016-02-04 | 2017-08-10 | 矢崎総業株式会社 | 電流遮断装置 |
JP2018148164A (ja) * | 2017-03-09 | 2018-09-20 | 株式会社東芝 | パワー半導体モジュール |
CN107393822A (zh) * | 2017-07-17 | 2017-11-24 | 中国振华集团永光电子有限公司(国营第八七三厂) | 一种具有瞬态电压抑制和整流功能的玻璃钝化续流二极管的制造方法 |
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