CN111684585A - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

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Publication number
CN111684585A
CN111684585A CN201980011621.0A CN201980011621A CN111684585A CN 111684585 A CN111684585 A CN 111684585A CN 201980011621 A CN201980011621 A CN 201980011621A CN 111684585 A CN111684585 A CN 111684585A
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layer
support substrate
semiconductor device
manufacturing
substrate
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CN201980011621.0A
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English (en)
Chinese (zh)
Inventor
河野一郎
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Aoi Electronics Co Ltd
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Aoi Electronics Co Ltd
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Bipolar Transistors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Dicing (AREA)
CN201980011621.0A 2018-02-06 2019-01-30 半导体装置的制造方法 Withdrawn CN111684585A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2018019434A JP6816046B2 (ja) 2018-02-06 2018-02-06 半導体装置の製造方法
JP2018-019434 2018-02-06
PCT/JP2019/003169 WO2019155959A1 (ja) 2018-02-06 2019-01-30 半導体装置の製造方法

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CN111684585A true CN111684585A (zh) 2020-09-18

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US (1) US11521948B2 (enExample)
JP (1) JP6816046B2 (enExample)
KR (1) KR102407800B1 (enExample)
CN (1) CN111684585A (enExample)
TW (1) TWI802648B (enExample)
WO (1) WO2019155959A1 (enExample)

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JP2020131552A (ja) * 2019-02-20 2020-08-31 株式会社東芝 キャリアおよび半導体装置の製造方法
JP7362378B2 (ja) * 2019-09-12 2023-10-17 株式会社東芝 キャリア及び半導体装置の製造方法
JP7395898B2 (ja) * 2019-09-18 2023-12-12 大日本印刷株式会社 半導体多面付け基板用部材、半導体多面付け基板、および半導体部材
CN112786515B (zh) * 2019-11-11 2022-12-13 上海新微技术研发中心有限公司 一种薄膜器件的加工方法
CN112786513B (zh) * 2019-11-11 2023-06-09 上海新微技术研发中心有限公司 一种薄膜器件的加工方法及薄膜器件
JP7474608B2 (ja) * 2020-03-09 2024-04-25 アオイ電子株式会社 半導体装置の製造方法、および半導体封止体
JP7521258B2 (ja) * 2020-05-26 2024-07-24 Toppanホールディングス株式会社 基板ユニット、基板ユニットの製造方法及び半導体装置の製造方法
JP6985477B1 (ja) * 2020-09-25 2021-12-22 アオイ電子株式会社 半導体装置および半導体装置の製造方法
KR102684002B1 (ko) * 2020-12-14 2024-07-11 주식회사 네패스 반도체 패키지 제조방법 및 이에 이용되는 가이드 프레임
EP4586310A4 (en) * 2022-09-05 2025-12-10 Mitsui Mining & Smelting Co Ltd Printed circuit board manufacturing process

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001035461A1 (en) * 1999-11-11 2001-05-17 Casio Computer Co., Ltd. Semiconductor device and method of manufacturing the same
JP2006222164A (ja) * 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP2006261299A (ja) * 2005-03-16 2006-09-28 Yamaha Corp 半導体装置の製造方法および半導体装置
JP2010251682A (ja) * 2009-03-26 2010-11-04 Kyocera Corp 多数個取り配線基板
US20110143501A1 (en) * 2009-12-10 2011-06-16 Nitto Denko Corporation Manufacturing method for semiconductor device
US20110233786A1 (en) * 2010-03-24 2011-09-29 Soichi Homma Semiconductor device and method for manufacturing the same
US20110318881A1 (en) * 2010-06-24 2011-12-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor substrate and method for manufacturing semiconductor device
JP2012069972A (ja) * 2011-11-04 2012-04-05 Shinko Electric Ind Co Ltd 配線基板の製造方法及び半導体パッケージの製造方法
JP2016134516A (ja) * 2015-01-20 2016-07-25 ローム株式会社 半導体装置およびその製造方法
WO2016116980A1 (ja) * 2015-01-19 2016-07-28 凸版印刷株式会社 配線基板積層体及びこれを用いた半導体装置の製造方法
US20170005044A1 (en) * 2015-07-03 2017-01-05 J-Devices Corporation Semiconductor device and method for manufacturing same
WO2017149810A1 (ja) * 2016-02-29 2017-09-08 三井金属鉱業株式会社 キャリア付銅箔及びその製造方法、並びに配線層付コアレス支持体及びプリント配線板の製造方法
JP2017162876A (ja) * 2016-03-07 2017-09-14 株式会社ジェイデバイス 半導体パッケージの製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56158480A (en) 1980-05-12 1981-12-07 Nippon Telegr & Teleph Corp <Ntt> Field effect transistor
JP2004134672A (ja) * 2002-10-11 2004-04-30 Sony Corp 超薄型半導体装置の製造方法および製造装置、並びに超薄型の裏面照射型固体撮像装置の製造方法および製造装置
JP2009147270A (ja) 2007-12-18 2009-07-02 Nec Electronics Corp 配線基板の製造方法、配線基板、および半導体装置
JP5458029B2 (ja) * 2011-01-19 2014-04-02 日本特殊陶業株式会社 多数個取り配線基板

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001035461A1 (en) * 1999-11-11 2001-05-17 Casio Computer Co., Ltd. Semiconductor device and method of manufacturing the same
JP2006222164A (ja) * 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP2006261299A (ja) * 2005-03-16 2006-09-28 Yamaha Corp 半導体装置の製造方法および半導体装置
JP2010251682A (ja) * 2009-03-26 2010-11-04 Kyocera Corp 多数個取り配線基板
US20110143501A1 (en) * 2009-12-10 2011-06-16 Nitto Denko Corporation Manufacturing method for semiconductor device
US20110233786A1 (en) * 2010-03-24 2011-09-29 Soichi Homma Semiconductor device and method for manufacturing the same
US20110318881A1 (en) * 2010-06-24 2011-12-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor substrate and method for manufacturing semiconductor device
JP2012069972A (ja) * 2011-11-04 2012-04-05 Shinko Electric Ind Co Ltd 配線基板の製造方法及び半導体パッケージの製造方法
WO2016116980A1 (ja) * 2015-01-19 2016-07-28 凸版印刷株式会社 配線基板積層体及びこれを用いた半導体装置の製造方法
JP2016134516A (ja) * 2015-01-20 2016-07-25 ローム株式会社 半導体装置およびその製造方法
US20170005044A1 (en) * 2015-07-03 2017-01-05 J-Devices Corporation Semiconductor device and method for manufacturing same
WO2017149810A1 (ja) * 2016-02-29 2017-09-08 三井金属鉱業株式会社 キャリア付銅箔及びその製造方法、並びに配線層付コアレス支持体及びプリント配線板の製造方法
JP6203988B1 (ja) * 2016-02-29 2017-09-27 三井金属鉱業株式会社 キャリア付銅箔及びその製造方法、並びに配線層付コアレス支持体及びプリント配線板の製造方法
JP2017162876A (ja) * 2016-03-07 2017-09-14 株式会社ジェイデバイス 半導体パッケージの製造方法

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