CN111682005B - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN111682005B CN111682005B CN201910676240.6A CN201910676240A CN111682005B CN 111682005 B CN111682005 B CN 111682005B CN 201910676240 A CN201910676240 A CN 201910676240A CN 111682005 B CN111682005 B CN 111682005B
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- Prior art keywords
- metal layer
- outer edge
- electrode
- insulating layer
- semiconductor device
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 79
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 title claims description 14
- 229910052751 metal Inorganic materials 0.000 claims abstract description 206
- 239000002184 metal Substances 0.000 claims abstract description 206
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 14
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 12
- 230000009477 glass transition Effects 0.000 claims description 12
- 239000010931 gold Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 229910052759 nickel Inorganic materials 0.000 claims description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 229910052763 palladium Inorganic materials 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000007747 plating Methods 0.000 description 12
- 230000004048 modification Effects 0.000 description 9
- 238000012986 modification Methods 0.000 description 9
- 239000004020 conductor Substances 0.000 description 8
- 238000007772 electroless plating Methods 0.000 description 6
- 230000007797 corrosion Effects 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 3
- 230000008595 infiltration Effects 0.000 description 3
- 238000001764 infiltration Methods 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 229910001096 P alloy Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000004090 dissolution Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910000521 B alloy Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- FIOBDUSJUICPHU-UHFFFAOYSA-N [P].[W].[Ni].[Co] Chemical compound [P].[W].[Ni].[Co] FIOBDUSJUICPHU-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- QDWJUBJKEHXSMT-UHFFFAOYSA-N boranylidynenickel Chemical compound [Ni]#B QDWJUBJKEHXSMT-UHFFFAOYSA-N 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000004925 denaturation Methods 0.000 description 1
- 230000036425 denaturation Effects 0.000 description 1
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- OFNHPGDEEMZPFG-UHFFFAOYSA-N phosphanylidynenickel Chemical compound [P].[Ni] OFNHPGDEEMZPFG-UHFFFAOYSA-N 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
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Abstract
实施方式涉及半导体装置及其制造方法。半导体装置具备;半导体部;电极,设置于上述半导体部上,与上述半导体部电连接;第1金属层,选择性地设置于上述电极上;绝缘层,在上述电极上包围上述第1金属层,包括与上述第1金属层的外缘的上表面接触的第1表面及与上述第1表面相邻的第2表面;以及第2金属层,设置于上述第1金属层上。上述第2金属层具有与上述绝缘层的上述第2表面接触的外缘。
Description
关联申请
本申请享受以日本专利申请2019-44019号(申请日:2019年3月11日)为基础申请的优先权。本申请通过参照该基础申请而包括基础申请的全部内容。
技术领域
实施方式涉及半导体装置及其制造方法。
背景技术
大功率的控制中使用的半导体装置,使用连接器或者母排等板状的连接导体而与电源电路连接。因此,需要在半导体上的电极与连接导体之间配置接合部件。
发明内容
实施方式提供使在半导体上的电极与连接导体之间设置的连接构造的可靠性提高的半导体装置及其制造方法。
实施方式的半导体装置,具备:半导体部;电极,设置于上述半导体部上,与上述半导体部电连接;第1金属层,选择性地设置于上述电极上;绝缘层,在上述电极上包围上述第1金属层,该绝缘层包括与上述第1金属层的外缘的上表面接触的第1表面和与上述第1表面相邻的第2表面;以及第2金属层,设置于上述第1金属层上。上述第2金属层具有与上述绝缘层的第2表面接触的外缘。
附图说明
图1是表示实施方式的半导体装置的示意剖视图。
图2是表示实施方式的半导体元件的电极构造的示意剖视图。
图3A~4B是表示实施方式的半导体元件的制造过程的示意剖视图。
图5是表示比较例的半导体元件的电极构造的示意剖视图。
图6是表示实施方式的第1变形例的半导体元件的电极构造的示意剖视图。
图7A及图7B是表示实施方式的第1变形例的半导体元件的制造过程的示意剖视图。
图8是表示实施方式的第2变形例的半导体元件的电极构造的示意剖视图。
图9是表示实施方式的第3变形例的半导体元件的电极构造的示意剖视图。
图10A及图10B是表示实施方式的第3变形例的半导体元件的制造过程的示意剖视图。
具体实施方式
以下,关于实施方式,参照附图进行说明。对附图中的同一部分,附以同一符号并适当省略其详细的说明,而对不同的部分进行说明。另外,附图是示意性的或者概念性的,各部分的厚度与宽度的关系、部分间的大小的比率等未必与现实中的相同。另外,即使在表示相同的部分的情况下,也存在根据附图而彼此的尺寸、比率不同地进行表示的情况。
并且,使用各图中所示的X轴、Y轴及Z轴,对各部分的配置及构成进行说明。X轴、Y轴、Z轴相互正交,分别表示X方向、Y方向、Z方向。另外,存在将Z方向作为上方,将其相反方向作为下方进行说明的情况。
图1是表示实施方式的半导体装置100的示意剖视图。半导体装置100例如具备半导体元件1、安装基板10及连接导体20。
如图1所示,安装基板10包括安装垫(mount pad)11及布线13。安装垫11设置于安装基板10的表面上。半导体元件1经由连接部件15安装于安装垫11的上方。半导体元件1经由连接导体20而与布线13电连接。
半导体元件1包括半导体部30、电极31、电极33、金属层35、绝缘层37及金属层39。半导体元件1例如是IGBT(Insulated Gate Bipolar Transisitor)。电极31例如是集电极电极,电极33例如是发射极电极。半导体部30例如是硅。
电极31设置在半导体部30的背面上。电极33设置于半导体部30的表面上。金属层35选择性地设置于电极33的上方。绝缘层37在电极33上设置为包围金属层35。金属层39设置于金属层35的上方。
连接导体20例如是铜板,经由连接部件23被接合(bonding)于金属层39上。另外,连接导体20经由连接部件25被接合于布线13上。连接部件23及25例如是焊料。
半导体装置100不限定于上述的例子。例如,半导体元件1可以是MOSFET或者二极管。另外,安装基板10例如可以置换为铜框。
图2是表示实施方式的半导体元件1的电极构造的示意剖视图。半导体元件1例如包括在电极33的上方所层叠的金属层35、金属层38及金属层39。电极33例如是铝电极。另外,电极33的材料可以是包含铜的金属。金属层35例如是镍层。金属层38例如是钯层。金属层39例如是金(Au)层。
金属层39为了使经由连接部件23的连接导体20的接合强度提高而使用。例如,连接部件23与金属层39之间的贴紧强度(参照图1),大于以将连接部件23与金属层35直接接触的方式配置的情况下的连接部件23的贴紧强度。设置金属层38例如为了防止金属层35的金属原子由于安装时的热而扩散到金属层39中、从而连接部件23与金属层39之间的贴紧强度降低。即,金属层38是所谓阻挡层。另外,在将金属层39形成例如0.1μm以上的厚度的情况下,金属层38能够省略。
如图2所示那样,金属层35设置为,其外缘35e沿着绝缘层37的内表面。另外,金属层38的外缘38e及金属层39的外缘39e也设置为沿着绝缘层37。
例如,在与电极33的表面垂直的方向(Z方向)上,绝缘层37的厚度设为比金属层35、金属层38及金属层39的总的厚度更厚。绝缘层37包括第1延伸部37a及第2延伸部37b。
第1延伸部37a,在Z方向上位于金属层35的外缘35e与金属层38的外缘38e之间。另外,第1延伸部37a,在Z方向上位于金属层35的外缘35e与金属层39的外缘39e之间。第2延伸部37b,在Z方向上位于电极33与金属层35的外缘35e之间。
绝缘层37包括:在外缘35e与金属层35的上表面接触的表面37S1、与金属层39的外缘39e接触的表面37S2及与金属层38的外缘38e接触的表面37S3。表面37S3位于表面37S1与表面37S2之间。
接下来,参照图3A~图4B,对形成图2所示的电极构造的方法进行说明。图3A~图4B是依次表示实施方式的半导体元件1的制造过程的示意剖视图。
如图3A所示那样,在电极33的上方形成金属层35及绝缘层37。绝缘层37具有使电极33露出的开口37f。金属层35例如通过以镍为主成分的金属的无电解镀来形成。金属层35将绝缘层37作为掩模,选择性地形成于电极33的上方。金属层35形成为与绝缘层37的内周面接触。金属层35的材料可以是镍磷合金、镍硼合金、镍钴钨磷合金等。另外,金属层35的材料可以是以铜为主成分的材料。
绝缘层37使用具有玻化温度(日文:ガラス転移点)的绝缘材料。绝缘层37例如包含硅氧烷,使用旋涂法而形成在电极33的上方。开口37f,例如通过使用通过光刻法而形成的蚀刻掩模(未图示)对绝缘层37进行选择蚀刻而形成。另外,绝缘层37例如可以通过网板印刷等形成。
绝缘层37的开口37f形成为,从电极33的表面朝向上方而开口宽度变宽。因此,金属层35的外缘35e形成为,在绝缘层37的边缘上扩展。即,形成为,绝缘层37的第2延伸部37b位于金属层35的外缘35e与电极33之间。
图3B所示那样,使绝缘层37变形,以覆盖金属层35的外缘35e。绝缘层37被加热到比其玻化温度高的温度。绝缘层37的加热中例如使用回流(reflow)方式。由此,在金属层35的外缘35e的上方,形成绝缘层37的第1延伸部37a。绝缘层37形成为具有在外缘35e与金属层35的上表面接触的表面37S1。
绝缘层37中使用的绝缘材料优选在120℃~350℃的温度范围内有玻化温度。在玻化温度小于120℃的情况下,例如,有时绝缘层37会由于形成开口37f的平版印刷(lithography)过程中的热而变形。另外,在回流后的处理例如使晶片干燥的过程中,绝缘层37的再次的热变形也难以避免。另一方面,在金属层35使用了镍的情况下,在高于350℃的温度下发生伴随相变的结晶化。为了避免这些热变形或者热变性,希望在120℃以上、350℃以下的温度范围中使绝缘层37热变形。
如图4A所示那样,在金属层35的上方,形成金属层38。金属层38例如使用无电解镀而选择性地形成。金属层38例如是钯层。另外,金属层38的材料可以是包含金、镍、钨或者磷等的金属。金属层38的外缘38e与绝缘层37的第1延伸部37a接触。绝缘层37具有与金属层38的外缘38e接触的表面37S3。
如图4B所示那样,在金属层38的上方形成金属层39。金属层39例如使用无电解镀选择性地形成。金属层39例如是金(Au)层。金属层39的材料例如可以是包含钯的金属。金属层39的外缘39e与绝缘层37的第1延伸部37a接触。绝缘层37具有与金属层39的外缘39e接触的表面37S2。
上述的制造过程是例示,并不限定于此。例如,可以不形成金属层38,而在金属层35的上方直接形成金属层39。
图5是表示比较例的半导体元件2的电极构造的示意剖视图。在半导体元件2的制造过程中,不实施使绝缘层37变形的热处理。因此,金属层38及金属层39与金属层35同样地、形成为沿着绝缘层37的边缘37e而扩展。
例如,形成金属层39时使用的镀金溶液,与包含镍的金属层35反应,将金属层35腐蚀或者溶解。在形成了金属层35及金属层38后,为了形成金属层39而将晶片浸渍到电镀液中后,电镀液沿着金属层35及38与绝缘层37的界面而浸润,而在金属层35与绝缘层37之间产生间隙VSL的情况存在。并且,在金属层38包含钯的情况下,由于电镀液中的金络合物与钯之间的电子授受不易发生,镍的腐蚀被促进的情况存在。
因此,为了将金属层39形成得较厚而延长使晶片浸渍于电镀液的时间时,绝缘层37与金属层35之间的间隙VSL变宽。另外,在电镀液到达了电极33时,电极33也被侵蚀。因此,还有在电极33与金属层35之间形成空洞VSP的情况。其结果,有时会使半导体装置100的电气特性及可靠性劣化。
与此相对,在实施方式的半导体元件1中,在形成了金属层35后,对绝缘层37加热,并使之变形以在外缘35e将金属层35的上表面覆盖(参照图2)。由此,从外缘38e处的金属层38的上表面起沿着绝缘层37直到电极33的爬电距离变长,能够避免电镀液的浸润一直到达电极33为止。其结果,能够防止半导体装置100的电气特性的劣化,能够使可靠性提高。
图6是表示实施方式的第1变形例的半导体元件3的电极构造的示意剖视图。在该例子中,绝缘层37的第1延伸部37a,设置于金属层38的外缘38e的上方。另一方面,绝缘层37的第2延伸部37b,在Z方向上位于电极33与金属层35的外缘35e之间。另外,第2延伸部37b,在Z方向上位于电极33与金属层38的外缘38e之间。
绝缘层37包括与金属层39的外缘39e接触的表面37S2及与金属层38的外缘38e的上表面接触的表面37S3。表面37S2设置于与表面37S3相邻的位置。
在半导体元件3中,从金属层38的上表面沿着绝缘层37直到电极33的爬电距离变长,并且从金属层38的上表面直到金属层35的、绝缘层37与金属层38之间的界面也变长。由此,能够抑制电镀液的浸润,并且,也能够使金属层35与电镀液的接触推迟而抑制腐蚀溶解反应。
图7A及图7B是依次表示实施方式的第1变形例的半导体元件3的制造过程的示意剖视图。
如图7A所示那样,将绝缘层37作为掩模,在电极33的上方选择性地形成金属层35及金属层38。金属层35及金属层38例如通过无电解镀来形成。
如图7B所示那样,将绝缘层37加热到比玻化温度高的温度,来使之变形以将金属层38的外缘38e覆盖。绝缘层37包括在外缘38e与金属层38的上表面接触的表面37S3。
接下来,在金属层38的上方形成金属层39(参照图6)。金属层39将绝缘层37作为掩模,并通过例如无电解镀来选择性地形成。绝缘层37包括与金属层39的外缘39e接触的表面37S2。
图8是表示实施方式的第2变形例的半导体元件4的电极构造的示意剖视图。在该例子中,绝缘层37除了第1延伸部37a及第2延伸部37b以外还具有第3延伸部37c。金属层38的外缘38e及金属层39的外缘39e分别设置为台阶状。
如图8所示那样,第1延伸部37a,在Z方向上位于金属层38的外缘38e与金属层39的外缘39e之间。第2延伸部37b,在Z方向上位于电极33与金属层35的外缘35e之间。第3延伸部37c,在Z方向上位于金属层38的外缘38e与金属层35的外缘35e之间。
绝缘层37包括:在外缘35e与金属层35的上表面接触的表面37S1、与金属层39的外缘39e接触的表面37S2、及在外缘38e与金属层38的上表面接触的表面37S3。表面37S3位于表面37S1与表面37S2之间。
图8所示的电极构造,通过2阶段的热处理来形成。例如,作为第1阶段,在形成了金属层35后,将绝缘层37加热到比玻化温度高的温度,使之变形以将金属层35的外缘35e覆盖。进而,作为第2阶段,在形成了金属层38后,将绝缘层37再次加热到比玻化温度高的温度,使之变形以将金属层38的外缘38e覆盖。
这样,通过将金属层38的外缘38e及金属层39的外缘39e设为台阶状,由此能够进一步延长从金属层38的外缘38e的上表面直到电极33的、沿着绝缘层37的爬电距离。另外,从金属层38的上表面直到金属层35的、绝缘层37与金属层38的界面也变长。由此,能够抑制电镀液的浸润,并且,能够抑制由电镀液引起的金属层35的腐蚀溶解反应。
图9是表示实施方式的第3变形例的半导体元件5的电极构造的示意剖视图。在该例子中,绝缘层37具有将金属层35的外缘35e覆盖的第1延伸部37a,但不具有位于电极33与外缘35e之间的第2延伸部37b。
如图9所示那样,第1延伸部37a,包括在Z方向上位于金属层35与金属层38的外缘38e之间的部分。另外,第1延伸部37a,包括在Z方向上位于金属层35与金属层39的外缘39e之间的部分。
绝缘层37包括:在外缘35e与金属层35的上表面接触的表面37S1、与金属层39的外缘39e接触的表面37S2及与金属层38的外缘38e接触的表面37S3。表面37S3位于表面37S1与表面37S2之间。
图10A及图10B是表示实施方式的第3变形例的半导体元件5的制造过程的示意剖视图。
如图10A所示那样,在电极33的上方形成了绝缘层37后,在电极33上选择性地形成金属层35。在该例子中,绝缘层37具有从电极33起向上方、X方向及Y方向的宽度变窄的开口37f。开口37f形成为具有所谓的倒锥形状。金属层35具有沿着开口37f的内壁的外缘35e。
如图10B所示那样,将绝缘层37加热到比玻化温度高的温度,使之变形以将金属层35的外缘35e覆盖。接下来,金属层38及金属层39例如通过无电解镀来选择性地形成(参照图9)。绝缘层37形成为具有在外缘35e与金属层35的上表面接触的表面37S1。
这样,也能够不设置第2延伸部37b,就延长从金属层38直到电极33的、金属层35与绝缘层37之间的界面的长度。在该例子中,通过增厚绝缘层37的Z方向的厚度,能够使金属层35与绝缘层37之间的界面的长度,形成得比图2所示的半导体元件1及图5所示的半导体元件2中的界面的长度长。由此,在半导体元件5中,电镀液的浸润到达电极33为止的时间更长,能够抑制半导体装置100的电气特性及可靠性的劣化。
对本发明的几个实施方式进行了说明,但这些实施方式是作为例子提示的,意图不是限定发明的范围。这些新的实施方式能够以其他各种各样的方式实施,在不脱离发明的主旨的范围,能够进行各种省略、置换、变更。这些实施方式及其变形,包含在发明的范围及主旨中,并且包含在权利要求书记载的发明及其等同的范围中。
Claims (16)
1.一种半导体装置,具备:
半导体部;
电极,设置于上述半导体部上,与上述半导体部电连接;
第1金属层,选择性地设置于上述电极上;
绝缘层,在上述电极上包围上述第1金属层,包括与上述第1金属层的外缘的上表面接触的第1表面及与上述第1表面相邻的第2表面;
第2金属层,设置于上述第1金属层上,具有与上述绝缘层的第2表面接触的外缘;以及
第3金属层,设置于上述第1金属层与上述第2金属层之间,
上述第3金属层的外缘与位于上述绝缘层的上述第1表面与上述第2表面之间的第3表面接触。
2.如权利要求1所述的半导体装置,
上述第1金属层设置于上述电极的表面上,
上述绝缘层包括延伸部,该延伸部在与上述电极的上述表面垂直的方向上、位于上述第1金属层的上述外缘与上述电极之间。
3.如权利要求1所述的半导体装置,
上述绝缘层包括在上述第1金属层的外缘将上述第1金属层的上表面覆盖的部分。
4.如权利要求1所述的半导体装置,
上述第2金属层的外缘设置为台阶状。
5.如权利要求1所述的半导体装置,
上述第1金属层包含镍或者铜。
6.如权利要求1所述的半导体装置,
上述第2金属层包含金。
7.如权利要求1所述的半导体装置,
上述第1金属层设置于上述电极的表面上,
与上述电极的上述表面垂直的方向上的上述绝缘层的厚度,比从上述电极的上述表面直到上述第2金属层的上表面的、沿着上述方向的距离厚。
8.如权利要求1所述的半导体装置,
上述第3金属层包含钯。
9.如权利要求1所述的半导体装置,
上述绝缘层的上述第3表面,在上述第3金属层的外缘与上述第3金属层的上表面接触。
10.如权利要求8所述的半导体装置,
上述第2金属层的外缘及上述第3金属层的外缘,设置为台阶状。
11.一种半导体装置,具备:
半导体部;
电极,设置于上述半导体部上,与上述半导体部电连接;
第1金属层,选择性地设置于上述电极上;
绝缘层,在上述电极上包围上述第1金属层,具有位于上述电极与上述第1金属层的外缘之间的延伸部;
第2金属层,设置于上述第1金属层上,具有与上述绝缘层接触的外缘;以及
第3金属层,设置于上述第1金属层与上述第2金属层之间,
上述绝缘层具有将上述第1金属层的上述外缘及上述第3金属层的外缘覆盖的部分,包括在上述第3金属层的上述外缘处与上述第3金属层的上表面接触的表面。
12.如权利要求11所述的半导体装置,
上述绝缘层的上述延伸部,位于上述电极与上述第3金属层的外缘之间,并与上述第3金属层的上述外缘接触。
13.一种半导体装置的制造方法,具备:
形成绝缘层的工序,该绝缘层形成于在半导体部上形成且与上述半导体部电连接的电极上,该绝缘层具有使上述电极的一部分露出的开口,并包含具有玻化温度的材料;
在上述绝缘层的上述开口内,在上述电极上形成第1金属层的工序,该第1金属层的与上述电极的表面垂直的方向上的厚度,比上述绝缘层的上述方向上的厚度薄;
将上述绝缘层加热到比上述玻化温度高温来使上述绝缘层变形,以使得上述绝缘层的一部分将上述第1金属层的外缘覆盖的工序;以及
在上述第1金属层的露出的表面上形成第2金属层的工序,
上述第2金属层的外缘形成为位于上述绝缘层上。
14.如权利要求13所述的半导体装置的制造方法,
还具备在上述第1金属层上形成第3金属层的工序,
上述第2金属层形成于上述第3金属层的上方。
15.如权利要求14所述的半导体装置的制造方法,
上述第3金属层在将上述绝缘层加热到比上述玻化温度高温后形成。
16.如权利要求14所述的半导体装置的制造方法,
当在上述第1金属层上形成了上述第3金属层后,上述绝缘层被加热到比上述玻化温度高温。
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