CN111357053B - 存储装置 - Google Patents

存储装置 Download PDF

Info

Publication number
CN111357053B
CN111357053B CN201880074987.8A CN201880074987A CN111357053B CN 111357053 B CN111357053 B CN 111357053B CN 201880074987 A CN201880074987 A CN 201880074987A CN 111357053 B CN111357053 B CN 111357053B
Authority
CN
China
Prior art keywords
bit line
transistor
layer
insulating layer
cell array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201880074987.8A
Other languages
English (en)
Chinese (zh)
Other versions
CN111357053A (zh
Inventor
大贯达也
冈本佑树
池田寿雄
长冢修平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of CN111357053A publication Critical patent/CN111357053A/zh
Application granted granted Critical
Publication of CN111357053B publication Critical patent/CN111357053B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/312—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with a bit line higher than the capacitor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
CN201880074987.8A 2017-11-30 2018-11-19 存储装置 Active CN111357053B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2017229785 2017-11-30
JP2017-229785 2017-11-30
PCT/IB2018/059084 WO2019106479A1 (en) 2017-11-30 2018-11-19 Memory device

Publications (2)

Publication Number Publication Date
CN111357053A CN111357053A (zh) 2020-06-30
CN111357053B true CN111357053B (zh) 2024-05-28

Family

ID=66665461

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880074987.8A Active CN111357053B (zh) 2017-11-30 2018-11-19 存储装置

Country Status (6)

Country Link
US (1) US11270997B2 (enExample)
JP (1) JP7337496B2 (enExample)
KR (1) KR102602338B1 (enExample)
CN (1) CN111357053B (enExample)
TW (1) TWI758567B (enExample)
WO (1) WO2019106479A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9153699B2 (en) * 2012-06-15 2015-10-06 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor with multiple oxide semiconductor layers
WO2019162802A1 (ja) * 2018-02-23 2019-08-29 株式会社半導体エネルギー研究所 記憶装置およびその動作方法
WO2020074999A1 (ja) 2018-10-12 2020-04-16 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
CN113474897A (zh) 2019-03-12 2021-10-01 株式会社半导体能源研究所 半导体装置及半导体装置的制造方法
CN113632230B (zh) * 2020-03-09 2024-03-05 铠侠股份有限公司 半导体存储装置及半导体存储装置的制造方法
DE102020127961B4 (de) * 2020-05-28 2025-08-21 Taiwan Semiconductor Manufacturing Co., Ltd. Speicherschaltung und schreibverfahren
US11450377B2 (en) * 2020-07-29 2022-09-20 Micron Technology, Inc. Apparatuses and methods including memory cells, digit lines, and sense amplifiers
US11393822B1 (en) * 2021-05-21 2022-07-19 Micron Technology, Inc. Thin film transistor deck selection in a memory device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5276649A (en) * 1989-03-16 1994-01-04 Mitsubishi Denki Kabushiki Kaisha Dynamic-type semiconductor memory device having staggered activation of column groups
CN1438652A (zh) * 2002-02-14 2003-08-27 松下电器产业株式会社 半导体存储装置
KR20130029464A (ko) * 2011-09-15 2013-03-25 윤재만 반도체 메모리 장치

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2761644B2 (ja) 1989-03-16 1998-06-04 三菱電機株式会社 半導体記憶装置
JPH03238862A (ja) * 1990-02-15 1991-10-24 Mitsubishi Electric Corp 半導体記憶装置
JPH0494569A (ja) 1990-08-10 1992-03-26 Matsushita Electric Ind Co Ltd 半導体集積回路装置
US6188598B1 (en) 1999-09-28 2001-02-13 Infineon Technologies North America Corp. Reducing impact of coupling noise
US6327169B1 (en) * 2000-10-31 2001-12-04 Lsi Logic Corporation Multiple bit line memory architecture
US6430076B1 (en) 2001-09-26 2002-08-06 Infineon Technologies Ag Multi-level signal lines with vertical twists
JP2006128471A (ja) * 2004-10-29 2006-05-18 Toshiba Corp 半導体メモリ
US20070058468A1 (en) 2005-09-12 2007-03-15 Promos Technologies Pte.Ltd. Singapore Shielded bitline architecture for dynamic random access memory (DRAM) arrays
KR101820776B1 (ko) 2010-02-19 2018-01-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2012002186A1 (en) 2010-07-02 2012-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
WO2013049920A1 (en) 2011-10-04 2013-04-11 Mosaid Technologies Incorporated Reduced noise dram sensing
JP6105266B2 (ja) 2011-12-15 2017-03-29 株式会社半導体エネルギー研究所 記憶装置
TWI767772B (zh) * 2014-04-10 2022-06-11 日商半導體能源研究所股份有限公司 記憶體裝置及半導體裝置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5276649A (en) * 1989-03-16 1994-01-04 Mitsubishi Denki Kabushiki Kaisha Dynamic-type semiconductor memory device having staggered activation of column groups
CN1438652A (zh) * 2002-02-14 2003-08-27 松下电器产业株式会社 半导体存储装置
KR20130029464A (ko) * 2011-09-15 2013-03-25 윤재만 반도체 메모리 장치

Also Published As

Publication number Publication date
US11270997B2 (en) 2022-03-08
KR20200093564A (ko) 2020-08-05
TW201933355A (zh) 2019-08-16
US20200343244A1 (en) 2020-10-29
JP7337496B2 (ja) 2023-09-04
TWI758567B (zh) 2022-03-21
WO2019106479A1 (en) 2019-06-06
CN111357053A (zh) 2020-06-30
JP2019102811A (ja) 2019-06-24
KR102602338B1 (ko) 2023-11-16

Similar Documents

Publication Publication Date Title
CN111357053B (zh) 存储装置
US12347482B2 (en) Memory device including plurality of overlap memory cell arrays with folded bit-lines
JP7615365B2 (ja) 半導体装置
JP7642113B2 (ja) 半導体装置
JP2024128000A (ja) 半導体装置
JP2024097866A (ja) 記憶装置
JP2025124855A (ja) 記憶装置
JP7171226B2 (ja) 記憶装置
JP2025185067A (ja) 記憶装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant