TWI758567B - 記憶體裝置 - Google Patents

記憶體裝置 Download PDF

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Publication number
TWI758567B
TWI758567B TW107141949A TW107141949A TWI758567B TW I758567 B TWI758567 B TW I758567B TW 107141949 A TW107141949 A TW 107141949A TW 107141949 A TW107141949 A TW 107141949A TW I758567 B TWI758567 B TW I758567B
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TW
Taiwan
Prior art keywords
bit line
memory cells
transistor
addition
cell array
Prior art date
Application number
TW107141949A
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English (en)
Chinese (zh)
Other versions
TW201933355A (zh
Inventor
大貫達也
岡本佑樹
池田壽雄
長塚修平
Original Assignee
日商半導體能源研究所股份有限公司
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Publication of TW201933355A publication Critical patent/TW201933355A/zh
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Publication of TWI758567B publication Critical patent/TWI758567B/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/312—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with a bit line higher than the capacitor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
TW107141949A 2017-11-30 2018-11-23 記憶體裝置 TWI758567B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017229785 2017-11-30
JP2017-229785 2017-11-30

Publications (2)

Publication Number Publication Date
TW201933355A TW201933355A (zh) 2019-08-16
TWI758567B true TWI758567B (zh) 2022-03-21

Family

ID=66665461

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107141949A TWI758567B (zh) 2017-11-30 2018-11-23 記憶體裝置

Country Status (6)

Country Link
US (1) US11270997B2 (enExample)
JP (1) JP7337496B2 (enExample)
KR (1) KR102602338B1 (enExample)
CN (1) CN111357053B (enExample)
TW (1) TWI758567B (enExample)
WO (1) WO2019106479A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9153699B2 (en) * 2012-06-15 2015-10-06 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor with multiple oxide semiconductor layers
WO2019162802A1 (ja) * 2018-02-23 2019-08-29 株式会社半導体エネルギー研究所 記憶装置およびその動作方法
WO2020074999A1 (ja) 2018-10-12 2020-04-16 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
CN113474897A (zh) 2019-03-12 2021-10-01 株式会社半导体能源研究所 半导体装置及半导体装置的制造方法
CN113632230B (zh) * 2020-03-09 2024-03-05 铠侠股份有限公司 半导体存储装置及半导体存储装置的制造方法
DE102020127961B4 (de) * 2020-05-28 2025-08-21 Taiwan Semiconductor Manufacturing Co., Ltd. Speicherschaltung und schreibverfahren
US11450377B2 (en) * 2020-07-29 2022-09-20 Micron Technology, Inc. Apparatuses and methods including memory cells, digit lines, and sense amplifiers
US11393822B1 (en) * 2021-05-21 2022-07-19 Micron Technology, Inc. Thin film transistor deck selection in a memory device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0494569A (ja) * 1990-08-10 1992-03-26 Matsushita Electric Ind Co Ltd 半導体集積回路装置
US6188598B1 (en) * 1999-09-28 2001-02-13 Infineon Technologies North America Corp. Reducing impact of coupling noise
US20030151943A1 (en) * 2002-02-14 2003-08-14 Matsushita Electric Industrial Co., Ltd. Semiconductor memory
US20070121414A1 (en) * 2005-09-12 2007-05-31 Promos Technologies Pte.Ltd. Shielded bitline architecture for dynamic random access memory (dram) arrays
US20130155790A1 (en) * 2011-12-15 2013-06-20 Semiconductor Energy Laboratory Co., Ltd. Storage device
TW201337925A (zh) * 2011-10-04 2013-09-16 Mosaid Technologies Inc 減低雜訊動態隨機存取記憶體（ｄｒａｍ）感測

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2761644B2 (ja) 1989-03-16 1998-06-04 三菱電機株式会社 半導体記憶装置
US5276649A (en) * 1989-03-16 1994-01-04 Mitsubishi Denki Kabushiki Kaisha Dynamic-type semiconductor memory device having staggered activation of column groups
JPH03238862A (ja) * 1990-02-15 1991-10-24 Mitsubishi Electric Corp 半導体記憶装置
US6327169B1 (en) * 2000-10-31 2001-12-04 Lsi Logic Corporation Multiple bit line memory architecture
US6430076B1 (en) 2001-09-26 2002-08-06 Infineon Technologies Ag Multi-level signal lines with vertical twists
JP2006128471A (ja) * 2004-10-29 2006-05-18 Toshiba Corp 半導体メモリ
KR101820776B1 (ko) 2010-02-19 2018-01-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2012002186A1 (en) 2010-07-02 2012-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
KR20130029464A (ko) * 2011-09-15 2013-03-25 윤재만 반도체 메모리 장치
TWI767772B (zh) * 2014-04-10 2022-06-11 日商半導體能源研究所股份有限公司 記憶體裝置及半導體裝置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0494569A (ja) * 1990-08-10 1992-03-26 Matsushita Electric Ind Co Ltd 半導体集積回路装置
US6188598B1 (en) * 1999-09-28 2001-02-13 Infineon Technologies North America Corp. Reducing impact of coupling noise
US20030151943A1 (en) * 2002-02-14 2003-08-14 Matsushita Electric Industrial Co., Ltd. Semiconductor memory
US20070121414A1 (en) * 2005-09-12 2007-05-31 Promos Technologies Pte.Ltd. Shielded bitline architecture for dynamic random access memory (dram) arrays
TW201337925A (zh) * 2011-10-04 2013-09-16 Mosaid Technologies Inc 減低雜訊動態隨機存取記憶體（ｄｒａｍ）感測
US20130155790A1 (en) * 2011-12-15 2013-06-20 Semiconductor Energy Laboratory Co., Ltd. Storage device

Also Published As

Publication number Publication date
US11270997B2 (en) 2022-03-08
CN111357053B (zh) 2024-05-28
KR20200093564A (ko) 2020-08-05
TW201933355A (zh) 2019-08-16
US20200343244A1 (en) 2020-10-29
JP7337496B2 (ja) 2023-09-04
WO2019106479A1 (en) 2019-06-06
CN111357053A (zh) 2020-06-30
JP2019102811A (ja) 2019-06-24
KR102602338B1 (ko) 2023-11-16

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