CN110168717A - 一种芯片封装结构及封装方法 - Google Patents
一种芯片封装结构及封装方法 Download PDFInfo
- Publication number
- CN110168717A CN110168717A CN201780082456.9A CN201780082456A CN110168717A CN 110168717 A CN110168717 A CN 110168717A CN 201780082456 A CN201780082456 A CN 201780082456A CN 110168717 A CN110168717 A CN 110168717A
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- chip
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- plastics material
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 70
- 238000000034 method Methods 0.000 title claims abstract description 45
- 239000000758 substrate Substances 0.000 claims abstract description 208
- 239000000463 material Substances 0.000 claims abstract description 128
- 239000004033 plastic Substances 0.000 claims abstract description 119
- 229920003023 plastic Polymers 0.000 claims abstract description 119
- 229910000679 solder Inorganic materials 0.000 claims abstract description 17
- 238000005538 encapsulation Methods 0.000 claims abstract description 14
- 238000001746 injection moulding Methods 0.000 claims abstract description 9
- 238000005516 engineering process Methods 0.000 claims abstract description 5
- 239000012778 molding material Substances 0.000 claims abstract description 4
- 238000003780 insertion Methods 0.000 claims description 12
- 230000037431 insertion Effects 0.000 claims description 12
- 238000005520 cutting process Methods 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 23
- 230000006870 function Effects 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000003190 augmentative effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 229920001568 phenolic resin Polymers 0.000 description 2
- 239000005011 phenolic resin Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 238000005204 segregation Methods 0.000 description 2
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
- CMLFRMDBDNHMRA-UHFFFAOYSA-N 2h-1,2-benzoxazine Chemical compound C1=CC=C2C=CNOC2=C1 CMLFRMDBDNHMRA-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004721 Polyphenylene oxide Substances 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004643 cyanate ester Substances 0.000 description 1
- 238000004512 die casting Methods 0.000 description 1
- 229920006336 epoxy molding compound Polymers 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229920003192 poly(bis maleimide) Polymers 0.000 description 1
- 229920006380 polyphenylene oxide Polymers 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1329—Protecting the fingerprint sensor against damage caused by the finger
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
- H01L21/566—Release layers for moulds, e.g. release layers, layers against residue during moulding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13022—Disposition the bump connector being at least partially embedded in the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3512—Cracking
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
Abstract
一种芯片封装结构(400)及封装方法,涉及电子技术领域,可改善封装芯片时产生的翘曲现象。该芯片封装结构(400)包括:裸芯片(41),以及围绕该裸芯片(41)设置的封装基板(43),其中,该裸芯片(41)的第一表面上设置有焊点(401),该裸芯片(41)中除第二表面(402)的剩余表面被注塑材料(42)包裹,该注塑材料(42)内嵌入有该封装基板(43)的至少一组对边,该组对边与该注塑材料(42)的接触面积占该组对边表面积的一半以上,该第二表面(402)为该裸芯片(41)中与该第一表面相对的表面。
Description
PCT国内申请,说明书已公开。
Claims (13)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2017/107030 WO2019075720A1 (zh) | 2017-10-20 | 2017-10-20 | 一种芯片封装结构及封装方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110168717A true CN110168717A (zh) | 2019-08-23 |
CN110168717B CN110168717B (zh) | 2021-08-20 |
Family
ID=66173052
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201780082456.9A Active CN110168717B (zh) | 2017-10-20 | 2017-10-20 | 一种芯片封装结构及封装方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US11309227B2 (zh) |
EP (1) | EP3686926A4 (zh) |
JP (1) | JP6943358B2 (zh) |
KR (1) | KR102406916B1 (zh) |
CN (1) | CN110168717B (zh) |
WO (1) | WO2019075720A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115600542A (zh) * | 2022-11-28 | 2023-01-13 | 飞腾信息技术有限公司(Cn) | 一种芯片封装结构及其设计方法和相关设备 |
Citations (5)
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CN1779931A (zh) * | 2004-11-22 | 2006-05-31 | 矽品精密工业股份有限公司 | 散热型封装结构及其制法 |
CN2935472Y (zh) * | 2006-08-02 | 2007-08-15 | 力成科技股份有限公司 | 球栅阵列封装结构 |
CN202633285U (zh) * | 2012-05-17 | 2012-12-26 | 日月光半导体股份有限公司 | 堆叠封装的下封装体构造 |
CN103887251A (zh) * | 2014-04-02 | 2014-06-25 | 华进半导体封装先导技术研发中心有限公司 | 扇出型晶圆级封装结构及制造工艺 |
US20160005628A1 (en) * | 2014-07-01 | 2016-01-07 | Freescal Semiconductor, Inc. | Wafer level packaging method and integrated electronic package |
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JP4904769B2 (ja) | 2005-10-21 | 2012-03-28 | 富士通セミコンダクター株式会社 | 半導体装置 |
KR100818546B1 (ko) * | 2006-07-31 | 2008-04-01 | 하나 마이크론(주) | 이미지 센서 패키지 및 이의 제조방법 |
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-
2017
- 2017-10-20 KR KR1020207013970A patent/KR102406916B1/ko active IP Right Grant
- 2017-10-20 WO PCT/CN2017/107030 patent/WO2019075720A1/zh unknown
- 2017-10-20 EP EP17929175.2A patent/EP3686926A4/en active Pending
- 2017-10-20 US US16/757,012 patent/US11309227B2/en active Active
- 2017-10-20 JP JP2020521892A patent/JP6943358B2/ja active Active
- 2017-10-20 CN CN201780082456.9A patent/CN110168717B/zh active Active
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CN1779931A (zh) * | 2004-11-22 | 2006-05-31 | 矽品精密工业股份有限公司 | 散热型封装结构及其制法 |
CN2935472Y (zh) * | 2006-08-02 | 2007-08-15 | 力成科技股份有限公司 | 球栅阵列封装结构 |
CN202633285U (zh) * | 2012-05-17 | 2012-12-26 | 日月光半导体股份有限公司 | 堆叠封装的下封装体构造 |
CN103887251A (zh) * | 2014-04-02 | 2014-06-25 | 华进半导体封装先导技术研发中心有限公司 | 扇出型晶圆级封装结构及制造工艺 |
US20160005628A1 (en) * | 2014-07-01 | 2016-01-07 | Freescal Semiconductor, Inc. | Wafer level packaging method and integrated electronic package |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115600542A (zh) * | 2022-11-28 | 2023-01-13 | 飞腾信息技术有限公司(Cn) | 一种芯片封装结构及其设计方法和相关设备 |
Also Published As
Publication number | Publication date |
---|---|
EP3686926A1 (en) | 2020-07-29 |
US20200273770A1 (en) | 2020-08-27 |
JP2020537822A (ja) | 2020-12-24 |
EP3686926A4 (en) | 2020-08-05 |
WO2019075720A1 (zh) | 2019-04-25 |
KR20200073261A (ko) | 2020-06-23 |
JP6943358B2 (ja) | 2021-09-29 |
KR102406916B1 (ko) | 2022-06-08 |
CN110168717B (zh) | 2021-08-20 |
US11309227B2 (en) | 2022-04-19 |
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