CN109952657A - 具有封装结构空腔的隔离器集成电路和制造方法 - Google Patents

具有封装结构空腔的隔离器集成电路和制造方法 Download PDF

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CN109952657A
CN109952657A CN201780068616.4A CN201780068616A CN109952657A CN 109952657 A CN109952657 A CN 109952657A CN 201780068616 A CN201780068616 A CN 201780068616A CN 109952657 A CN109952657 A CN 109952657A
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bare chip
semiconductor bare
lead frame
circuit
frame structure
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CN109952657B (zh
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B·J·马莱
B·库克
R·A·内伊多尔夫
S·库默尔
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Texas Instruments Inc
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Abstract

所公开的实例包含一种集成电路(100)，所述集成电路具有：引线框结构(104a、104b)；第一电路结构(106a)，其包含经配置以产生沿光学路径(114)的光信号的光源(108a)；第二电路结构(106b)，其包含面向所述光学路径(114)以接收所述光信号的光传感器(108b)；以及经模制封装结构(102)，其封闭所述引线框结构(104a、104b)的部分，所述经模制封装结构(102)具有由所述经模制封装结构(102)的内表面限定的空腔(110)，所述光学路径(114)所述空腔(110)中在所述第一电路结构与所述第二电路结构(106a、106b)之间延伸。

Description

具有封装结构空腔的隔离器集成电路和制造方法
背景技术
隔离产品用于提供电隔离以在具有不同电压电平的电路之间和/或在根据不同供应电压和接地参考操作的电路之间的传送信号。将一种类型的隔离器称作光电隔离器或光电耦合器，其提供光传输路径以在可能与彼此电隔离的电路之间传送信号。光电隔离器用于数据通信、电源和其中高压或高转换速率共模信号在输入与输出之间出现的其它系统中。通常将光电隔离器建构为由玻璃分离且封装在一起的传输器和接收器。玻璃提供dc电隔离和光传输，但遭受传输器与接收器之间的电容耦合且还增加装置成本。变压器提供由绝缘体分离的磁耦合初级线圈与磁耦合次级线圈之间的隔离以在由高压或高转换速率共模信号分离的两个电路之间传送数据和/或功率。一些变压器包含磁耦合材料以增强初级线圈与次级线圈之间的磁耦合。
发明内容
所公开的实例包含一种集成电路(IC)，所述集成电路具有：光源，其产生光信号；光传感器，其接收光信号；以及经模制封装结构，其具有提供光源与光传感器之间的无固体光学路径的空腔。其它实例IC在封装结构空腔中提供第一线圈结构与第二线圈结构之间的磁耦合。实例IC制造方法包含：将半导体裸片安装在引线框结构上，连接裸片与引线框结构之间的接合线，在裸片的一部分上方形成牺牲材料，在裸片、接合线上方且在引线框结构与牺牲材料的部分上方形成经模制封装材料，以及升华牺牲材料以形成空腔，所述空腔包含在与半导体裸片相关联的第一电路与第二电路之间的隔离障壁的至少一部分。
附图说明
图1是根据一实施例的在经模制封装结构的内部空腔中的间隔半导体裸片中包含LED光源和光感受器二极管传感器从而提供用于电隔离的光学路径的光学隔离集成电路的截面侧视图。
图2是包含形成于封装空腔的凹表面上的反射涂层的具有LED光源和双极晶体管传感器的另一光学隔离IC实施例的截面侧视图。
图3是图1的光学隔离IC的顶部平面图。
图4是包含水平二极管从而形成光学传感器电路的另一光学隔离IC实施例的截面侧视图。
图5是展示图4的实施例中的光学接收的部分截面侧视图。
图6是包含竖直二极管从而形成光学传感器电路的另一光学隔离IC实施例的截面侧视图。
图7是展示图6的实施例中的光学接收的部分截面侧视图。
图8是根据一实施例的制作集成电路的方法的流程图。
图9是根据另一实施例的包含在经模制封装结构的内部空腔中延伸的线圈区段的变压器集成电路的部分截面侧视图。
图10是图9的变压器IC的截面顶部平面图。
图11到16是在制造的各个阶段处的图9和10的IC的截面侧面视图。
图17是包含在经模制封装结构的内部空腔中延伸的线圈区段和亚铁材料的另一变压器IC实施例的截面侧视图。
图18是图17的变压器IC实施例的顶部平面图。
图19是根据另一实施例的制作集成电路的方法的流程图。
具体实施方式
在图式中，相同附图标记贯穿全文指代相同元件，且各种特征不必按比例绘制。在以下论述和权利要求书中，术语“包含(including、includes)”、“具有(having、has)”“带有(with)”或其变化形式意图以类似于术语“包括(comprising)”的方式为包含性的，且因此应被解译为意味着“包含，但不限于……”。此外，术语“耦合(couple、coupled或couples)”意图包含间接或直接电连接或机械连接或其组合。举例来说，如果第一装置耦合到第二装置或与第二装置耦合，那么所述连接可以是直接电连接或经由一或多个介入装置和连接的间接电连接。
首先参考图1到3，图1展示实例光学隔离集成电路(IC)100，例如光电隔离器或光电耦合器装置。IC 100包含经配置以产生沿光学路径114的光信号的光源108a。在一个实例中，光源是制造于第一半导体裸片或其它电路结构106a中的LED，但激光器或其它光源可用于其它实施例中。IC 100进一步包含第二装置或电路结构106b，其包含面向光学路径114以接收光信号的光传感器108a。在一个实例中，光传感器108b是如图1中所示意性说明的光感受器二极管传感器。可使用从源108a接收光信号的任何适合的光传感器。图2说明另一可能实施方案，其中第二电路结构106b包含感测所接收光信号的双极晶体管109。如图1中所展示，电路结构106a和106b单独地包含由接合线124连接到引线框结构的对应电导体104a、104b的接合衬垫122。在图3中展示的一个实例中，第一电路结构106a包含单独地连接到引线框结构的一对对应第一对电导体104a-l、104a-2的第一接合衬垫和第二接合衬垫122。在一个实例中，导体104a-l和104a-2是可焊接到主机印刷电路板(PCB，未展示)的IC引脚或衬垫。在这个实例中，外部电路(未展示)提供经由导体104a-l和104a-2到光源108a的信号，且作为响应，光源108a产生光信号。在这个实例中，第二电路结构106b还包含由对应接合线124电连接到第二对引线框电导体104b-l和104b-2的接合衬垫122。所说明实例中的导体104b-l和104b-2提供IC 100的可焊接到主机PCB的衬垫或引脚，以与导体104a-l和104a-2处的源信号隔离地从传感器108b传递信号。以此方式，电路结构106a和106b的间距116提供电隔离，其中信号经由IC 100的空腔110沿路径114传输。
根据一实施例，光源108a和传感器108b在经模制封装结构102的内部空腔110中与彼此间隔开以在其间提供电隔离。空腔110提供不含固体(即，无固体)的光学路径114。玻璃或其它光学透射性固体结构的常规使用增加光学隔离装置的成本，且增加源/传感器配置的电容。使用固体传输媒体的装置的电容尤其在高速数据通信和高共模转换速率抑制方面存在问题，且制造成本对许多应用来说过高。另外，固体传输媒体还存在光学性能随时间降级的问题。相反地，所公开的光电耦合器IC 100有利地减小耦合电容和成本，同时有助于任何所期望水平的电隔离和高击穿电压。在这点上，空气具有大大低于玻璃或其它透明材料的介电常数，且所公开的实例减小光学传感器与传输器之间的电容耦合。另外，源裸片106a与传感器裸片106b之间的无固体间隙116可由其结构相对定位控制，以提供沿具有任何所需额定电压隔离的路径114的光传输所需的间距或间隙距离116。在一个实例中，间隙距离116可由所沉积的牺牲性升华材料控制。某些实例中的间隙116由裸片106中的一个上的机械性特征控制，如在裸片106之间延伸以设置间隙距离116的氧化物凸块(未展示)。在一些实例中，通过将具有特定大小的填充物材料与牺牲材料混合来控制间隙116。在其它实施例中，可使用喷墨印刷技术将升华区域形成为独特印刷形状，且可直接印刷光学通道。
光传感器108b至少部分地面向光源108a以接收光信号。在图1到3的实例中，第一电路结构106a包含光源信号输出表面或侧面107a，且第二电路结构106b包含传感器表面或侧面107b，其中信号输出表面107a和传感器表面107b处于通过空腔110中的距离116与彼此间隔开的通常平行的平面中。在其它可能实例中，表面107无需平行。可使用任何相对配置，其中传感器表面107b至少部分地面向光源108a以便接收光信号。无论二极管108b或晶体管109或其它光传感器结构，传感器表面107b都允许光进入结构106b以便修改传感器的电特性，以产生待输出或待由第二电路结构106b进一步处理的传感器信号。电路106可进一步包含接口电路(未展示)以操作传感器信号。如图1和2中所展示，此外，表面107a和107b的显著部分曝露在空腔110内，但不是全部可能实施例的严格要求。
图1到3中的IC 100还包含经模制封装结构102，其封闭引线框结构104的部分和电路结构106a与106b的部分。在其它实例中，封装结构材料102无需封闭电路结构106a和106b。封装结构102曝露电导体104a-l、104a-2、104b-l和104b-2的部分以允许与第一电路结构106a和第二电路结构106b的外部连接。在所说明实施方案中，封装结构102是包含空腔110的经模制材料结构，且光学信号路径114在电路结构106a、106b的光源108a与光传感器108b、109之间的空腔110内延伸。空腔110因此提供无固体光学路径114以用于电路结构106a与106b之间的光信号。所说明的结构进一步包含从空腔110延伸到封装结构102外部的端口118，以及从IC外部密封空腔110的盖帽或密封结构120。端口118可处于如所说明的空腔110的上部部分中，或空腔可装有穿过侧面或穿过底部或其组合的端口。
空腔110由封装结构102的内表面限定。内表面可以是任何适合的形状和轮廓。在某些实例中，内表面增强空腔中的光传输。封装结构102的内表面包含图1和2的实施例中的凹面部分。在这个实例中，凹表面可通过在制造期间如使用印刷工艺将牺牲材料形成为滴状物或一或多个滴状物而设置。这种沉积的牺牲材料因此形成部分凸形结构，且所述材料稍后在经模制封装结构材料102的形成之后升华或蒸发，从而留下凹形内表面。
在图2的实例中，内表面的凹面部分包含使光从光源108a朝向光传感器108b、109反射的反射涂层200。在一个实例中，反射涂层材料200在形成经模制封装结构材料102的模制工艺之前沉积在凸面牺牲性升华材料上方。在模制工艺后牺牲材料层的升华留下至少部分地由保留的反射材料层200的凹表面限定的空腔110。可使用有助于由光源108a产生的全部或部分光信号朝向光传感器108b、109反射的任何适合的非导电材料200。如图2所示，来自源108a的光信号可经由空腔110沿光学路径114直接传播到传感器裸片106b的感测表面107b，和/或信号还可经由凹表面上的反射涂层200沿反射路径202传播。
在其它实例中，可形成(图2中的虚线形式中所展示的)横向地朝外延伸以曝露源电路结构106a和传感器电路结构106b中的一个或两个的顶部部分的凹表面210、212。在一个实施方案中，凹表面212包含反射涂层材料210。这些实施例可包含具有朝向反射涂层材料210发射光的发光上部或顶部表面的LED或其它光源电路106a，且光信号反射一或多次传递到传感器电路106b的侧部和/或顶部感测表面。如本文中所使用，电路106的感测表面直接地或经由空腔110的凹形或平坦表面的一或多个反射表面(例如，表面200、210)至少部分地面向光源电路。在某些实施例中，顶部和/或侧部发射源电路106a可与顶部和/或侧部感测电路106b组合使用以用于直接地或利用一或多个反射来传送光学信号。
可通过模制或其它合适的工艺，优选地使用电绝缘体材料来形成封装结构102。所公开的实例使用升华工艺以提供使用空腔110的低成本隔离装置，所述空腔包含在源电路结构106a与传感器电路结构106b之间的隔离障壁的至少一部分。电路结构106至少部分地囊封于在制造期间沉积的牺牲性升华材料中，且接着进一步由经模制封装结构材料102囊封。所述结构随后经过烘焙以升华(例如，蒸发)牺牲材料，从而留下内部空腔110，其中裸片106a和106b或至少其一部分不接触模制化合物102。在某些实例中，将开口118钻凿或铸造到封装结构102中使得可升华牺牲材料，且其后密封结构120设置在开口118的顶部上方以密封空腔110。可经由模制注道将开口118铸造到封装结构102中，或可在模制工艺之前经由抛弃式插塞将开口118并入到封装中，或在模制后使用机械式钻孔、激光钻孔、蚀刻或其它技术将所述开口钻凿到封装102中。
所公开的结构有利地有助于小封装大小、减轻成本和降低与将玻璃或其它透明材料嵌入在光学隔离装置的光学路径中相关联的制造困难。此外，所公开的实例减缓与光电隔离器的光学路径中的玻璃或其它固体材料相关联的电容和老化问题，且因此提供尤其在高速通信应用方面的增强性能。另外，可使用普通主流制造处理步骤和设备来制造所公开的实例。
在某一实例中，裸片106单独地包含衬底，如硅、SOI或其它半导体衬底。可使用已知半导体制造工艺和设备来在相关衬底上形成光源108a和光传感器108b、109以及各种接口电路。在一个实例中，封装结构102是经模制结构。封装结构102可以是提供对裸片106的电绝缘和机械性保护的任何适合的模制材料，且可包含低模量弹性材料以增强抗压性。此外，裸片106可以任何适合的方式支撑于空腔110内，如所展示地安装到引线框结构上。随后，在模制之前，牺牲材料至少部分地沉积在裸片106上方。在封装材料102的模制或其它形成后，加热组合件以使得经由模制材料结构102的端口118升华牺牲性囊封材料。适合的制造工艺和材料说明且描述于2016年8月26日提交且标题为“浮动裸片封装(Floating DiePackage)”的美国专利申请案第15/248,151号中，所述申请案的全部内容特此以引用的方式并入。
还参看图4和5，图4展示另一光学隔离IC实施例100。在这个实例中，光传感器108a包含多个连接的二极管，其各自包含衬底的N掺杂区和P掺杂区。在这个实例中，第二电路结构108b在两个(例如，下部和上部)衬底中的每一个或裸片401和402中包含五个并联连接的水平二极管，但可使用任何数目的一或多个此类堆叠裸片。图5说明在多个堆叠裸片401和402中沿pn结的长度的侧面光子吸收率。在这个实施例中，N区域和P区域通常沿光学路径114布置，其中N区域或阱形成于p掺杂衬底中从而留下下伏于N阱的p区域以形成彼此并联连接的多个二极管。在这个实例中，电路结构108b包含基底裸片400，其具有包含任何所需放大器、滤波器或其它接口电路(未展示)的半导体衬底。在一个实例中，裸片401和402经过背部研磨以具有比基底裸片400更小的竖直高度。如在图5中最佳地看出，基底裸片400还包含具有一或多个金属间电介质(IMD)结构(例如，用于电路互连的电介质层和导电金属结构)的金属化物结构和上部钝化层，以及一或多个裸片衬垫，所述裸片衬垫具有与一或多个相关引线框电导体104b的一或多个接合线连接件124。在这个实例中，单个裸片401和402包含经由在所说明的N区域和P区域中植入对应掺杂剂所掺杂的基底衬底500(例如，硅)、金属化物结构502和上部钝化层504。电路结构108b包含任何适合的介入电导体结构(未展示)以使堆叠裸片401和402的二极管与基底裸片400的电路和连接件互连从而经由相关引线框导体104b将传感器或接收器输出信号提供到外部电路。
图5展示图4的堆叠裸片401和402中的光学接收。展示在感测表面107b处进入双重水平裸片堆叠结构401、402的直接和反射光学路径114和202的实例。堆叠PN结和延伸侧面光传输(例如，在图5中，从左到右)的使用为光信号提供更大的在二极管结构108b中产生输出信号的机会。因此，所公开的实例有助于侧面光学耦合隔离IC 100中的高输出信号性能，且减缓常规光电隔离器的低信号缺点。在一个实例中，单个裸片401和402各自产生大致0.5V电压信号，且堆叠裸片401和402可经由金属化物结构互连件以并联和/或串联方式互连以用于增强的输出信号强度。在这点上，具有大于2个堆叠裸片的实施例可以任何所需的串联和/或并联配置互连，以响应于来自光源108a的光信号而达到所需输出信号水平。
图6和7展示在光学传感器108b中使用多个堆叠二极管的另一隔离IC实例100。图6中的第二电路结构106b是具有竖直二极管的多裸片结构，所述竖直二极管形成光学传感器电路108b。这一电路结构106b包含形成于基底裸片600上的四个堆叠裸片601、602、603和604以提供电路结构106b。图7展示传感器电路108b的其它细节，其中基底裸片600包含具有任何所需的放大器、滤波器或其它接口电路(未展示)的半导体衬底，以及具有一或多个IMD结构的金属化物结构和上部钝化层，和一或多个裸片衬垫122，所述裸片衬垫具有与一或多个相关引线框电导体104b的一或多个接合线连接件124。单个裸片601到604包含具有掺杂有P型掺杂剂(例如，硼，在图7中表示为P+)的底部部分和掺杂有N型掺杂剂(例如，磷，表示为N-)的上部部分702的基底衬底700(例如，硅)以形成垂直定向的二极管。在这个实例中，裸片601到604的N区域和P区域因此与光学路径114正交布置。单个裸片601到604还包含触点704和具有任何相关钝化层的IMD/金属化物结构706。在这个实例中，上部裸片604包含由接合线710连接到基底裸片600的裸片衬垫712的裸片衬垫708。如同上述实例一样，图6和7中的电路结构108b包含任何适合的介入电导体结构(未展示)以将堆叠裸片601到604的二极管与基底裸片600的电路和连接件互连从而提供任何所期望水平的输出信号。在一个实例中，单个裸片601到604各自产生大致0.6V电压信号，且堆叠裸片601到604可以任何所需的串联和/或并联配置互连，以响应于来自光源108a的光信号而达到所需输出信号水平。
图8说明可用于制造如以上所描述的光学隔离装置的隔离IC的实例方法或工艺800。方法800开始于802，其中将源裸片和传感器裸片相对于彼此以间隔关系安装在引线框上。举例来说，在802处可将第一电路结构106a和第二电路结构106b安装到引线框结构104，其中源表面107a和传感器表面107b通过上图1中的所需间隙距离116与彼此间隔开。在以上实例中，此外，在802处将第二半导体裸片106b安装在引线框结构104b上，使得光传感器108b的感测表面107b至少部分地面向光学路径以从光源108a接收光信号。在图8中的804处执行线接合工艺，其包含连接在裸片衬垫122与图1中的对应引线框电导体104a和104b之间的接合线124。可在804处将其它必要接合线(例如，710)例如从上图4到7的实例中的基底裸片400、600附接到一或多个堆叠裸片401、402、601到604。还可使用焊球或其它IC连接技术来替代或补充线接合。在806处，牺牲材料形成于源裸片与传感器裸片之间的预期光学路径中的组合件的至少部分上方。在806处，在某些实例中，牺牲性材料可至少部分地形成于第一半导体裸片106a和第二半导体裸片106b中的一个或两个的一部分上方。在某些实施方案中，此外，在806处将牺牲材料SL形成为具有凸表面的滴状物。在一个实例中，在图8中的807处将反射材料形成于牺牲材料的凸表面上(例如，上图2中的反射材料200)。
在图8中的808处，执行模制工艺以便在半导体裸片106、接合线124上方和在引线框结构104的部分和牺牲材料上方形成经模制封装材料(例如，上述材料102)以形成经模制封装结构102。对于使用形成于全部或一部分牺牲材料层上方的反射材料的实施方案，在808处封装材料至少部分地形成于反射材料200上。在810处，升华牺牲材料以形成由封装结构102的内表面限定的内部空腔(例如，上述空腔110)。在上述IC实例100中，在810处，升华工艺提供具有包含至少一部分光学路径114的空腔110的结构102，以允许光信号在光源108a与光传感器108b之间传输。在812处，在某些实例中，密封所述空腔110。举例来说，在812处，在图1的实例中，密封结构120安装在端口118上方，以便从IC 100的外部密封空腔110。
现在参看图9至19，根据其它实施例提供磁耦合隔离IC 900。图9和10说明包含在经模制封装结构102的内部空腔110中延伸的变压器初级线圈区段906和次级线圈区段908的变压器IC 900。图11到16说明根据图19中展示的制造工艺1900的在制造的各个阶段处的图9和10的IC 900。图17和18说明进一步包含封装结构空腔110中的亚铁材料1700的替代实施例。在各种可能的实施例中，提供包含两个或更多个线圈结构的变压器隔离装置。在一些实例中，线圈结构由常规芯线构成。在其它实例中，使用PC板技术来蚀刻线圈。在其它实例中，如图9和10中所展示，使用适合的靶向印刷沉积技术来印刷线圈结构。在所说明的实例中，在中间制造步骤期间使用牺牲性升华材料，且接着使用如以上所描述的那些工艺的适合的工艺来进行升华。在某些实例中，粉末状铁氧体或其它核心材料包含升华材料以用于初级线圈结构906与次级线圈结构908之间的增强的磁耦合。所公开的实例将次级线圈区域有利地定位为远离半导体裸片结构901的硅衬底902。这减小涡流损耗，且由空腔110中的磁耦合产生的空气核心结构有助于减少电容损耗以增强高频操作且减少来自高转换速率共模信号的耦合。如所说明的实例中所展示，此外，在模制之前，线圈结构906、908可通过至少部分地上覆于线圈结构906、908的牺牲材料的选择性位置来至少部分地由经模制封装结构102机械地支撑。在其它实例中，线圈结构至少部分地由在沉积牺牲材料之前形成的间隔件材料机械地支撑。
在图9的实例中，IC 900包含具有如上文所描述的电导体104a和104b的引线框结构。在这个实例中，变压器初级电路由电连接到第一对引线框电导体104a-l和104a-2的第一线圈结构906形成。第一线圈结构906经由印刷工艺部分地形成于半导体裸片结构901上，且还在第一牺牲材料(图9和10中未展示)上方延伸使得所得第一线圈结构906的一部分在升华处理后在预期空腔110内延伸。在图9的实例中，此外，第一线圈结构906至少部分地形成于裸片衬垫或其它导电结构122上方(即，与所述裸片衬垫或其它导电结构电接触)，所述裸片衬垫或其它导电结构形成于半导体裸片901的钝化、IMD/金属化物结构904中。在这个实例中，金属化物结构904进一步包含导电结构907以将第一线圈结构906的第一端电连接到外部裸片衬垫122，所述外部裸片衬垫线接合到对应引线框电导体104a。线圈结构906的第二端由第二导电结构907连接到第二引线框电导体104a。如图10的俯视图中最佳地展示，第一线圈结构906形成第一端与第二端之间的空腔110内部的弯曲部。线圈结构906和908还可以是具有多个同心弯曲部的螺旋。
在这个实例中，第二线圈结构908形成具有两端的变压器次级电路，所述两端经由金属化物结构导体909、对应裸片衬垫122和相关接合线124电连接到第二对引线框电导体104b-l和104b-2。在这个实例中，第二线圈结构908由印刷沉积工艺形成，且包含在半导体裸片结构901上部分地延伸的末端以形成与对应裸片衬垫122的电连接。使用两个裸片的其它实例是可能的，一个用于初级线圈且一个用于次级线圈。所描述的技术还可用于其它实施例中以制造在IC封装内部具有空气电介质的隔离变压器而无IC裸片以提供独立变压器。第二线圈结构908延伸到空腔110中且形成至少部分地在空腔110内的第一线圈结构906上方延伸的弯曲部。通过此配置，第一线圈结构906和第二线圈结构908经由空腔110内的空气或其它气体与彼此磁耦合以组成某些实例中的空气核心变压器。如同以上描述的光学隔离装置100一样，图9的变压器实例900中的空腔110包含端口或开口118，所述端口或开口由某些实例中的密封结构120覆盖。IC 900包含如以上描述一般的封装结构102，所述封装结构封闭引线框结构104的部分和接合线124，同时曝露引线框电导体104a-l、104a-2、104b-l、104b-2的部分以允许与第一线圈结构906和第二线圈结构908的外部连接。
图17和18说明替代变压器IC实施例900，其包含如以上描述一般的第一线圈区段906和第二线圈区段908。图17和18的实例进一步包含至少部分地在空腔110中延伸的亚铁材料1700。如图17中所见，亚铁材料1700可形成于半导体裸片结构901的结构904上，与第一线圈结构906与第二线圈结构908的一部分间隔开且在所述第一线圈结构与所述第二线圈结构的一部分以下。在这个实例中，此外，亚铁材料1700至少部分地在空腔110中延伸。在操作中，亚铁材料1700有助于第一线圈结构906和第二线圈结构908的磁耦合。在其它可能实施方案中，亚铁材料1700可形成于至少部分地在空腔110内的不同位置处。在一个可能实施方案中，亚铁材料结构1700可在第一线圈结构906与第二线圈结构908之间竖直地形成，且与所述第一线圈结构和所述第二线圈结构间隔开，以进一步增强线圈的磁耦合。举例来说，在形成第二线圈结构908之前，亚铁材料层1700可形成于第一线圈结构906上方的对应牺牲材料层上方，且第二线圈结构908可形成于在亚铁材料1700上形成的另一牺牲材料层上方，所述另一牺牲材料层曝露沉积的亚铁材料结构1700的至少一部分。在此类实例中，封装材料102的后续模制和牺牲材料层的升华留下至少部分地由经模制材料102机械地支撑的亚铁材料结构1700，且所述亚铁材料结构在线圈结构906与908之间竖直地延伸且与所述线圈结构间隔开。还可在相对于线圈结构的相同或不同位置处使用多个亚铁材料层。
现在参看图11到19，图19说明根据另一实施例的制作集成电路的工艺或方法1900。举例来说，可如先前所描述使用工艺1900来制造图9、10、17和/或18的变压器IC实例900。方法1900开始于1902，其中将一或多个半导体裸片安装在引线框结构上。举例来说，图9或图17中的半导体裸片结构901可安装到包含引线框电导体104的引线框结构，如图11中所见。在图19中的1904处，执行线接合工艺以将接合线124连接在半导体裸片结构901的裸片衬垫122与引线框电导体104之间，如图11中所展示。在某些实例中，在1905处，在形成第一牺牲材料层之前，可在半导体裸片901的一部分上方形成亚铁材料1700以用于变压器核心(例如，如图17中所展示)。在1906处，第一牺牲材料形成于半导体裸片901的一部分上方(例如，直接地或在介入亚铁材料层1700上方)。第一牺牲材料层和后续牺牲材料层可由任何适合的沉积工艺形成。在图11中，将第一牺牲层展示为层SL1。在这个实例中，在1906处，第一牺牲材料层SL1形成于裸片结构901的上部表面的中间部分上方，且所述层SL1并不覆盖结构904中形成的所说明裸片衬垫122。
在图19中的1908处，第一线圈结构(例如，以上的906)至少部分地形成于第一牺牲材料层SL1上。在图11的实例中，线圈结构906至少部分地形成于半导体裸片结构9014的裸片衬垫122上方，所述裸片衬垫由在1904处处理的先前线接合电连接到引线框结构的第一对电导体104a-l、104a-2。在一个实例中，在1908处使用印刷型沉积工艺来印刷第一变压器线圈结构906。在图19中的1910处，第二牺牲材料层SL2形成于第一线圈结构906的一部分上方。图12展示一实例，其中第二材料层SL2形成于第一牺牲材料层SL1的一部分上方且形成于先前形成的第一线圈结构906的一部分上方。在图19中的1912处，第二线圈结构908部分地形成于第二牺牲材料层SL2上。如图13中所展示，在一个实例中，使用印刷工艺形成第二线圈结构908以至少部分地在第二牺牲材料层SL2上方和在半导体裸片结构9014的对应裸片衬垫122上方延伸，所述裸片衬垫经由接合线124电连接到第二对引线框电导体104b-l和104b-2。
继续图19中的1914处，形成一或多个其它牺牲材料层。在图14的实例中，形成第三牺牲层SL3以限定预期空腔110(例如，图9)的上部部分，且其后按次序形成第四牺牲材料层SL4以限定预期端口开口118(例如，图9)。在各种实施方案中，可在1914处形成更多或更少牺牲层。在1916处，执行模制工艺以形成半导体裸片901、接合线124上方和在引线框结构104的部分和牺牲材料层上方的封装材料(例如，图15中的102)从而形成经模制封装结构102。如图15中所展示，此外，在某些实例中，经模制封装材料102至少部分地形成于线圈结构906和/或908中的一个或两个上方以在升华牺牲材料层后用于其后续结构支撑。在1918处，升华牺牲材料SL以形成由封装结构102的内表面限定的内部空腔110，例如在图16中所展示。所得内部空腔110包含第一线圈结构906与第二线圈结构908之间的电隔离阻障的至少一部分，且在某些实例中还提供空气核心以使线圈结构906、908磁耦合。在某些实例中，此外，在图19中的1920处例如通过在上图9、10、17和18的变压器IC 900中的端口118上方形成密封结构120来密封所述空腔。
上述实例仅说明本公开的各种方面的若干可能的实施例，其中在阅读和理解本说明书和附图之后所属领域的其它技术人员将构想出等效变化和/或修改。在权利要求书的范围内，对所描述实施例的修改是可能的，且其它实施例是可能的。

Claims (25)

1.一种集成电路IC，其包括：
引线框结构，其包含多个电导体；
第一电路结构，其电连接到所述引线框结构的第一对电导体，所述第一电路结构包含经配置以产生光信号的光源；
第二电路结构，其与所述第一电路结构间隔开且电连接到所述引线框结构的第二对电导体，所述第二电路结构包含至少部分地面向所述光源以接收所述光信号的光传感器；以及
经模制封装结构，其封闭所述引线框结构的部分，所述经模制封装结构曝露所述第一对电导体与所述第二对电导体的部分以允许与所述第一电路结构和所述第二电路结构的外部连接，所述经模制封装结构包含由所述经模制封装结构的内表面限定的内部空腔，所述空腔在所述第一电路结构与所述第二电路结构之间提供用于所述光信号的无固体光学路径。
2.根据权利要求1所述的IC，其中密封所述空腔。
3.根据权利要求1所述的IC，其中所述经模制封装结构的所述内表面包含凹面部分，且其中所述内表面的所述凹面部分包含使光从所述光源朝向所述光传感器反射的反射涂层。
4.根据权利要求1所述的IC，其中所述光源包含发光二极管LED。
5.根据权利要求1所述的IC，其中所述光传感器包含二极管。
6.根据权利要求5所述的IC，其中所述光传感器包含多个二极管。
7.根据权利要求6所述的IC，其中所述光传感器包含多个连接的二极管，所述单个二极管包含沿所述光学路径布置的半导体裸片的N区域和P区域。
8.根据权利要求6所述的IC，其中所述光传感器包含多个连接的二极管，所述单个二极管包含与所述光学路径正交布置的半导体裸片的N区域和P区域。
9.根据权利要求1所述的IC，其中所述光传感器包含晶体管。
10.根据权利要求1所述的IC，其中所述经模制封装结构封闭所述第一电路结构与所述第二电路结构的部分。
11.一种集成电路，其包括：
引线框结构，其包含多个电导体；
第一线圈结构，其电连接到所述引线框结构的第一对电导体，所述第一线圈结构部分地形成于半导体裸片结构上；
第二线圈结构，其电连接到所述引线框结构的第二对电导体，所述第二线圈结构部分地形成于所述半导体裸片结构上；以及
经模制封装结构，其封闭所述引线框结构的部分，所述经模制封装结构曝露所述第一对电导体与所述第二对电导体的部分以允许与所述第一线圈结构和所述第二线圈结构的外部连接，所述经模制封装结构包含磁性耦合所述第一线圈结构与所述第二线圈结构的部分的空腔。
12.根据权利要求11所述的IC，其中密封所述空腔。
13.根据权利要求11所述的IC，其中所述第一线圈结构与所述第二线圈结构的部分在所述空腔中延伸。
14.根据权利要求13所述的IC，其中所述经模制封装结构封闭所述第一线圈结构与所述第二线圈结构的部分。
15.根据权利要求14所述的IC，其进一步包括在所述空腔中至少部分地延伸的亚铁材料。
16.根据权利要求11所述的IC，其中所述经模制封装结构封闭所述第一线圈结构与所述第二线圈结构的部分。
17.根据权利要求11所述的IC，其进一步包括在所述空腔中至少部分地延伸的亚铁材料。
18.根据权利要求17所述的IC，其中所述亚铁材料形成于所述半导体裸片结构上。
19.一种制造集成电路IC的方法，所述方法包括：
将至少一个半导体裸片安装在引线框结构上；
连接所述半导体裸片的接合衬垫与所述引线框结构的对应电导体之间的多个接合线；
在所述半导体裸片的一部分上方形成牺牲材料；
在所述半导体裸片、所述接合线以及所述引线框结构与所述牺牲材料的部分上方形成经模制封装材料，以形成经模制封装结构；以及
升华所述牺牲材料以形成由所述经模制封装结构的内表面限定的内部空腔，所述内部空腔包含在与所述半导体裸片相关联的第一电路与第二电路之间的隔离障壁的至少一部分。
20.根据权利要求19所述的方法，其进一步包括密封所述内部空腔。
21.根据权利要求19所述的方法，其进一步包括：
将第一半导体裸片安装在所述引线框结构上，所述第一半导体裸片包含经配置以产生沿光学路径的光信号的光源；
将第二半导体裸片安装在所述引线框结构上，所述第二半导体裸片包含至少部分地面向所述光学路径且与所述第一半导体裸片的所述光源间隔开以接收所述光信号的光传感器；
将所述第一半导体裸片的裸片衬垫连接到所述引线框结构的第一对电导体；
将所述第二半导体裸片的裸片衬垫连接到所述引线框结构的第二对电导体；以及
在至少部分地沿所述光学路径的所述第一半导体裸片和所述第二半导体裸片的一部分上方形成所述牺牲材料；
其中升华所述牺牲材料形成包含所述光学路径的至少一部分的所述内部空腔，以允许在所述光源与所述光传感器之间传输所述光信号。
22.根据权利要求21所述的方法，其中所述牺牲材料形成为具有凸表面的滴状物，所述方法进一步包括在所述牺牲材料的所述凸表面上形成反射涂层，以及在所述反射涂层上形成所述经模制封装材料。
23.根据权利要求19所述的方法，其进一步包括：
将所述半导体裸片的第一对裸片衬垫连接到所述引线框结构的第一对电导体；
将所述半导体裸片的第二对裸片衬垫连接到所述引线框结构的第二对电导体；
在所述半导体裸片的一部分上方形成第一牺牲材料层；
部分地在所述第一牺牲材料层上形成第一线圈结构，所述第一线圈结构电连接到所述引线框结构的所述第一对电导体；
在所述第一线圈结构的一部分上方形成第二牺牲材料层；
部分地在所述第二牺牲材料层上形成第二线圈结构，所述第二线圈结构电连接到所述引线框结构的所述第二对电导体；
在所述第二线圈结构的一部分上方形成第三牺牲材料层；以及
在所述半导体裸片、所述接合线以及所述引线框结构、所述第一线圈结构和所述第二线圈结构与所述牺牲材料层的部分上方形成所述经模制封装材料，以形成所述经模制封装结构；
其中升华所述牺牲材料包含升华所述牺牲材料层以形成所述内部空腔从而提供在所述第一线圈结构与所述第二线圈结构的部分之间的电隔离障壁。
24.根据权利要求23所述的方法，其进一步包括：
在形成所述经模制封装材料之前，在所述半导体裸片中的一个与所述线圈结构中的一个的一部分上方形成亚铁材料层。
25.根据权利要求23所述的方法，其包括：
将第一半导体裸片和第二半导体裸片安装在所述引线框结构上；
部分地在所述第一半导体裸片上形成所述第一线圈结构；以及
部分地在所述第二半导体裸片上形成所述第二线圈结构。
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