CN109463007B - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

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Publication number
CN109463007B
CN109463007B CN201780037693.3A CN201780037693A CN109463007B CN 109463007 B CN109463007 B CN 109463007B CN 201780037693 A CN201780037693 A CN 201780037693A CN 109463007 B CN109463007 B CN 109463007B
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China
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package
protective film
support substrate
semiconductor
back surface
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CN201780037693.3A
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Chinese (zh)
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CN109463007A (zh
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筱田智则
根本拓
中西勇人
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Lintec Corp
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Lintec Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Dicing (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Bipolar Transistors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
CN201780037693.3A 2016-08-31 2017-08-02 半导体装置的制造方法 Active CN109463007B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2016169152 2016-08-31
JP2016-169152 2016-08-31
PCT/JP2017/027956 WO2018043008A1 (fr) 2016-08-31 2017-08-02 Procédé de fabrication de dispositif à semi-conducteur

Publications (2)

Publication Number Publication Date
CN109463007A CN109463007A (zh) 2019-03-12
CN109463007B true CN109463007B (zh) 2022-11-08

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CN201780037693.3A Active CN109463007B (zh) 2016-08-31 2017-08-02 半导体装置的制造方法

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Country Link
JP (2) JP7096766B2 (fr)
KR (2) KR102487681B1 (fr)
CN (1) CN109463007B (fr)
TW (2) TWI773341B (fr)
WO (1) WO2018043008A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7238301B2 (ja) * 2018-09-05 2023-03-14 株式会社レゾナック 材料の選定方法及びパネルの製造方法
JP7395898B2 (ja) * 2019-09-18 2023-12-12 大日本印刷株式会社 半導体多面付け基板用部材、半導体多面付け基板、および半導体部材
WO2022185489A1 (fr) * 2021-03-04 2022-09-09 昭和電工マテリアルズ株式会社 Procédé de fabrication de dispositif à semi-conducteur

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101038891A (zh) * 2006-03-16 2007-09-19 株式会社东芝 半导体装置的制造方法
CN101355058A (zh) * 2007-07-27 2009-01-28 三洋电机株式会社 半导体装置及其制造方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3456462B2 (ja) * 2000-02-28 2003-10-14 日本電気株式会社 半導体装置及びその製造方法
JP3455948B2 (ja) 2000-05-19 2003-10-14 カシオ計算機株式会社 半導体装置およびその製造方法
JP2006222164A (ja) * 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP5456440B2 (ja) * 2009-01-30 2014-03-26 日東電工株式会社 ダイシングテープ一体型ウエハ裏面保護フィルム
JP5718005B2 (ja) 2010-09-14 2015-05-13 日東電工株式会社 半導体装置製造用耐熱性粘着テープ及びそのテープを用いた半導体装置の製造方法。
JP2013074184A (ja) * 2011-09-28 2013-04-22 Nitto Denko Corp 半導体装置の製造方法
WO2013057949A2 (fr) * 2011-10-19 2013-04-25 Panasonic Corporation Procédé de fabrication d'un boîtier de semi-conducteur, boîtier de semi-conducteur, et dispositif à semi-conducteur
JP2014197568A (ja) * 2011-10-19 2014-10-16 パナソニック株式会社 半導体パッケージの製造方法、半導体パッケージ、及び半導体装置
JP5892780B2 (ja) * 2011-12-19 2016-03-23 日東電工株式会社 半導体装置の製造方法
US9385102B2 (en) * 2012-09-28 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package
CN103887251B (zh) * 2014-04-02 2016-08-24 华进半导体封装先导技术研发中心有限公司 扇出型晶圆级封装结构及制造工艺
CN104103528A (zh) * 2014-07-22 2014-10-15 华进半导体封装先导技术研发中心有限公司 一种扇出型方片级半导体芯片封装工艺
JP6417142B2 (ja) * 2014-07-23 2018-10-31 株式会社ジェイデバイス 半導体装置及びその製造方法
CN204497228U (zh) * 2015-03-16 2015-07-22 苏州晶方半导体科技股份有限公司 芯片封装结构

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101038891A (zh) * 2006-03-16 2007-09-19 株式会社东芝 半导体装置的制造方法
CN101355058A (zh) * 2007-07-27 2009-01-28 三洋电机株式会社 半导体装置及其制造方法

Also Published As

Publication number Publication date
TWI732921B (zh) 2021-07-11
KR102487681B1 (ko) 2023-01-11
KR20190045091A (ko) 2019-05-02
KR20220045255A (ko) 2022-04-12
TW201826405A (zh) 2018-07-16
JP7317187B2 (ja) 2023-07-28
TWI773341B (zh) 2022-08-01
WO2018043008A1 (fr) 2018-03-08
JP2022123045A (ja) 2022-08-23
TW202137340A (zh) 2021-10-01
JP7096766B2 (ja) 2022-07-06
KR102385965B1 (ko) 2022-04-12
JPWO2018043008A1 (ja) 2019-06-24
CN109463007A (zh) 2019-03-12

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