CN109155276B - 用于半导体结构的支撑件 - Google Patents
用于半导体结构的支撑件 Download PDFInfo
- Publication number
- CN109155276B CN109155276B CN201780013336.3A CN201780013336A CN109155276B CN 109155276 B CN109155276 B CN 109155276B CN 201780013336 A CN201780013336 A CN 201780013336A CN 109155276 B CN109155276 B CN 109155276B
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- Prior art keywords
- layer
- support
- silicon
- trapping
- carbon
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3204—Materials thereof being Group IVA semiconducting materials
- H10P14/3206—Carbon, e.g. diamond-like carbon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3204—Materials thereof being Group IVA semiconducting materials
- H10P14/3208—Silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3204—Materials thereof being Group IVA semiconducting materials
- H10P14/3211—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3242—Structure
- H10P14/3244—Layer structure
- H10P14/3251—Layer structure consisting of three or more layers
- H10P14/3252—Alternating layers, e.g. superlattice
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3451—Structure
- H10P14/3452—Microstructure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3451—Structure
- H10P14/3452—Microstructure
- H10P14/3456—Polycrystalline
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
Landscapes
- Recrystallisation Techniques (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Laminated Bodies (AREA)
- Silicon Compounds (AREA)
- Element Separation (AREA)
- Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1651642 | 2016-02-26 | ||
| FR1651642A FR3048306B1 (fr) | 2016-02-26 | 2016-02-26 | Support pour une structure semi-conductrice |
| PCT/FR2017/050400 WO2017144821A1 (fr) | 2016-02-26 | 2017-02-23 | Support pour une structure semi-conductrice |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109155276A CN109155276A (zh) | 2019-01-04 |
| CN109155276B true CN109155276B (zh) | 2023-01-17 |
Family
ID=55650590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201780013336.3A Active CN109155276B (zh) | 2016-02-26 | 2017-02-23 | 用于半导体结构的支撑件 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US11251265B2 (https=) |
| EP (1) | EP3420583B1 (https=) |
| JP (1) | JP6981629B2 (https=) |
| KR (1) | KR102687932B1 (https=) |
| CN (1) | CN109155276B (https=) |
| FR (1) | FR3048306B1 (https=) |
| SG (2) | SG10201913216XA (https=) |
| TW (1) | TWI787172B (https=) |
| WO (1) | WO2017144821A1 (https=) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6619874B2 (ja) * | 2016-04-05 | 2019-12-11 | 株式会社サイコックス | 多結晶SiC基板およびその製造方法 |
| FR3068506B1 (fr) * | 2017-06-30 | 2020-02-21 | Soitec | Procede pour preparer un support pour une structure semi-conductrice |
| US20210183691A1 (en) * | 2018-07-05 | 2021-06-17 | Soitec | Substrate for an integrated radiofrequency device, and process for manufacturing same |
| FR3091011B1 (fr) * | 2018-12-21 | 2022-08-05 | Soitec Silicon On Insulator | Substrat de type semi-conducteur sur isolant pour des applications radiofréquences |
| FR3104318B1 (fr) | 2019-12-05 | 2023-03-03 | Soitec Silicon On Insulator | Procédé de formation d'un support de manipulation à haute résistivité pour substrat composite |
| FR3110283B1 (fr) | 2020-05-18 | 2022-04-15 | Soitec Silicon On Insulator | Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences |
| JP2021190660A (ja) * | 2020-06-04 | 2021-12-13 | 株式会社Sumco | 貼り合わせウェーハ用の支持基板 |
| CN111979524B (zh) * | 2020-08-19 | 2021-12-14 | 福建省晋华集成电路有限公司 | 一种多晶硅层形成方法、多晶硅层以及半导体结构 |
| FR3116151A1 (fr) | 2020-11-10 | 2022-05-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de formation d’une structure de piegeage d’un substrat utile |
| FR3117668B1 (fr) | 2020-12-16 | 2022-12-23 | Commissariat Energie Atomique | Structure amelioree de substrat rf et procede de realisation |
| FR3134239B1 (fr) * | 2022-03-30 | 2025-02-14 | Soitec Silicon On Insulator | Substrat piézoélectrique sur isolant (POI) et procédé de fabrication d’un substrat piézoélectrique sur isolant (POI) |
| US20240030222A1 (en) * | 2022-07-20 | 2024-01-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Trapping layer for a radio frequency die and methods of formation |
| JP2026511208A (ja) | 2022-11-29 | 2026-04-10 | ソイテック | 電荷トラップ層を含む支持体、そのような支持体を含む複合基板、および関連する製造方法 |
| WO2024115410A1 (fr) | 2022-11-29 | 2024-06-06 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes. |
| EP4627621A1 (fr) | 2022-11-29 | 2025-10-08 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes |
| FR3146020B1 (fr) | 2023-02-20 | 2025-07-18 | Soitec Silicon On Insulator | Support comprenant une couche de piégeage de charges, substrat composite comprenant un tel support et procédé de fabrication associés |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6225196B1 (en) * | 1996-07-01 | 2001-05-01 | Nec Corporation | High electron mobility transistor and method of fabricating the same |
| CN1856873A (zh) * | 2003-09-26 | 2006-11-01 | 卢万天主教大学 | 制造具有降低的欧姆损耗的多层半导体结构的方法 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0864851A (ja) | 1994-06-14 | 1996-03-08 | Sanyo Electric Co Ltd | 光起電力素子及びその製造方法 |
| US7202124B2 (en) * | 2004-10-01 | 2007-04-10 | Massachusetts Institute Of Technology | Strained gettering layers for semiconductor processes |
| KR101436313B1 (ko) * | 2007-07-04 | 2014-09-01 | 신에쯔 한도타이 가부시키가이샤 | 다층 실리콘 웨이퍼의 제작법 |
| FR2953640B1 (fr) * | 2009-12-04 | 2012-02-10 | S O I Tec Silicon On Insulator Tech | Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante |
| US8536021B2 (en) * | 2010-12-24 | 2013-09-17 | Io Semiconductor, Inc. | Trap rich layer formation techniques for semiconductor devices |
| FR2973158B1 (fr) | 2011-03-22 | 2014-02-28 | Soitec Silicon On Insulator | Procédé de fabrication d'un substrat de type semi-conducteur sur isolant pour applications radiofréquences |
| US8741739B2 (en) * | 2012-01-03 | 2014-06-03 | International Business Machines Corporation | High resistivity silicon-on-insulator substrate and method of forming |
| FR2999801B1 (fr) * | 2012-12-14 | 2014-12-26 | Soitec Silicon On Insulator | Procede de fabrication d'une structure |
| JP5978986B2 (ja) | 2012-12-26 | 2016-08-24 | 信越半導体株式会社 | 高周波半導体装置及び高周波半導体装置の製造方法 |
| US8951896B2 (en) * | 2013-06-28 | 2015-02-10 | International Business Machines Corporation | High linearity SOI wafer for low-distortion circuit applications |
| US9768056B2 (en) * | 2013-10-31 | 2017-09-19 | Sunedison Semiconductor Limited (Uen201334164H) | Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition |
| US9853133B2 (en) * | 2014-09-04 | 2017-12-26 | Sunedison Semiconductor Limited (Uen201334164H) | Method of manufacturing high resistivity silicon-on-insulator substrate |
| US10622247B2 (en) * | 2016-02-19 | 2020-04-14 | Globalwafers Co., Ltd. | Semiconductor on insulator structure comprising a buried high resistivity layer |
| CN108022934A (zh) * | 2016-11-01 | 2018-05-11 | 沈阳硅基科技有限公司 | 一种薄膜的制备方法 |
| US10468486B2 (en) * | 2017-10-30 | 2019-11-05 | Taiwan Semiconductor Manufacturing Company Ltd. | SOI substrate, semiconductor device and method for manufacturing the same |
-
2016
- 2016-02-26 FR FR1651642A patent/FR3048306B1/fr active Active
-
2017
- 2017-02-23 SG SG10201913216XA patent/SG10201913216XA/en unknown
- 2017-02-23 SG SG11201807197PA patent/SG11201807197PA/en unknown
- 2017-02-23 EP EP17710350.4A patent/EP3420583B1/fr active Active
- 2017-02-23 KR KR1020187025017A patent/KR102687932B1/ko active Active
- 2017-02-23 JP JP2018544865A patent/JP6981629B2/ja active Active
- 2017-02-23 US US16/080,279 patent/US11251265B2/en active Active
- 2017-02-23 CN CN201780013336.3A patent/CN109155276B/zh active Active
- 2017-02-23 WO PCT/FR2017/050400 patent/WO2017144821A1/fr not_active Ceased
- 2017-02-24 TW TW106106332A patent/TWI787172B/zh active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6225196B1 (en) * | 1996-07-01 | 2001-05-01 | Nec Corporation | High electron mobility transistor and method of fabricating the same |
| CN1856873A (zh) * | 2003-09-26 | 2006-11-01 | 卢万天主教大学 | 制造具有降低的欧姆损耗的多层半导体结构的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3420583B1 (fr) | 2021-08-04 |
| JP2019512870A (ja) | 2019-05-16 |
| KR20190013696A (ko) | 2019-02-11 |
| JP6981629B2 (ja) | 2021-12-15 |
| FR3048306B1 (fr) | 2018-03-16 |
| TW201742108A (zh) | 2017-12-01 |
| KR102687932B1 (ko) | 2024-07-25 |
| EP3420583A1 (fr) | 2019-01-02 |
| TWI787172B (zh) | 2022-12-21 |
| WO2017144821A1 (fr) | 2017-08-31 |
| SG10201913216XA (en) | 2020-02-27 |
| US11251265B2 (en) | 2022-02-15 |
| US20190058031A1 (en) | 2019-02-21 |
| CN109155276A (zh) | 2019-01-04 |
| SG11201807197PA (en) | 2018-09-27 |
| FR3048306A1 (fr) | 2017-09-01 |
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| GR01 | Patent grant | ||
| GR01 | Patent grant |