CN109075211B - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN109075211B
CN109075211B CN201680084787.1A CN201680084787A CN109075211B CN 109075211 B CN109075211 B CN 109075211B CN 201680084787 A CN201680084787 A CN 201680084787A CN 109075211 B CN109075211 B CN 109075211B
Authority
CN
China
Prior art keywords
layer
type
type semiconductor
semiconductor layer
anode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201680084787.1A
Other languages
English (en)
Other versions
CN109075211A (zh
Inventor
西井昭人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN109075211A publication Critical patent/CN109075211A/zh
Application granted granted Critical
Publication of CN109075211B publication Critical patent/CN109075211B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8618—Diodes with bulk potential barrier, e.g. Camel diodes, Planar Doped Barrier diodes, Graded bandgap diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623—Buried supplementary region, e.g. buried guard ring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/408—Electrodes ; Multistep manufacturing processes therefor with an insulating layer with a particular dielectric or electrostatic property, e.g. with static charges or for controlling trapped charges or moving ions, or with a plate acting on the insulator potential or the insulator charges, e.g. for controlling charges effect or potential distribution in the insulating layer, or with a semi-insulating layer contacting directly the semiconductor surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41766—Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/868—PIN diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

目的在于提供能够对恢复动作时的第一P型半导体层的电场集中进行抑制的技术。半导体装置具有漂移层、N型半导体层以及第一P型半导体层、第二P型半导体层、电极、以及绝缘层。N型半导体层以及第一P型半导体层以彼此横向相邻的状态配置于漂移层的下方。绝缘层以与第二P型半导体层以及电极接触的状态配置于第一P型半导体层的上方。

Description

半导体装置
技术领域
本发明涉及二极管等半导体装置。
背景技术
当前，就二极管等半导体装置而言，为了实现电极与漂移层或者缓冲层之间的欧姆接触，在阴极侧配置具有高浓度N型半导体层(以下记为“N型阴极层”)的背面构造。在这样的构造中，在恢复动作尾声时，存在由于电压的急剧上升给器件带来损伤的可能性。为了解决该问题，例如在专利文献1中，提出了在阴极侧配置有P型半导体层(以下记为“P型阴极层”)的结构。根据这样的结构，由于载流子被从阴极侧注入，因此能够缓和电场的变动，其结果，能够抑制电压的急剧上升。
专利文献1：日本特开2010－283132号公报
发明内容
但是，通过配置P型阴极层，由P型阴极层和阳极侧的P型半导体层(以下记为“P型阳极层”)形成寄生PNP晶体管。因此，存在以下问题，即，在恢复动作中，有时寄生PNP晶体管会进行动作，P型阴极的区域的电流密度升高，其结果，有时由于电流集中所引起的热而导致器件损伤。
因此，本发明是鉴于上述的问题而提出的，其目的在于，提供能够对恢复动作时的P型阴极区域等第一P型半导体层的电场集中进行抑制的技术。
本发明的第一技术方案涉及的半导体装置具有：漂移层；N型半导体层以及第一P型半导体层，它们以彼此横向相邻的状态配置于所述漂移层的下方；第二P型半导体层，其配置于所述漂移层之上；电极，其配置于所述第二P型半导体层之上；以及绝缘层，其以与所述第二P型半导体层以及所述电极接触的状态配置于所述第一P型半导体层的上方。
本发明的第二技术方案涉及的半导体装置具有：漂移层；N型半导体层以及第一P型半导体层，它们以彼此横向相邻的状态配置于所述漂移层的下方；第二P型半导体层，其配置于所述漂移层之上或者上方；电极，其配置于所述第二P型半导体层之上；第一N型缓冲层，其配置于所述N型半导体层的上方且位于所述漂移层之上，或者配置于所述N型半导体层之上且位于所述漂移层之下；以及第二N型缓冲层，其以与所述第一N型缓冲层横向相邻的状态配置于所述第一P型半导体层的上方且位于所述漂移层之上，或者配置于所述第一P型半导体层之上且位于所述漂移层之下，所述第二N型缓冲层的杂质浓度比所述第一N型缓冲层的杂质浓度高。
发明的效果
根据本发明，绝缘层或者比第一N型缓冲层的杂质浓度高的第二N型缓冲层配置于第一P型半导体层的上方。由此，能够对恢复动作时的第一P型半导体层的电场集中进行抑制。
本发明的目的、特征、方案以及优点通过以下的详细说明和附图变得更清楚。
附图说明
图1是表示相关二极管的结构的剖视图。
图2是表示恢复时的相关二极管的电流分布的模拟结果的图。
图3是表示实施方式1涉及的二极管的结构的剖视图。
图4是表示实施方式1的变形例涉及的二极管的结构的剖视图。
图5是表示实施方式1的变形例涉及的二极管的结构的剖视图。
图6是表示实施方式2涉及的二极管的结构的剖视图。
图7是表示实施方式2的变形例涉及的二极管的结构的剖视图。
图8是表示实施方式2的变形例涉及的二极管的结构的剖视图。
图9是表示实施方式3涉及的二极管的结构的剖视图。
具体实施方式
<实施方式1>
下面，对本发明涉及的半导体装置是在大于或等于600V的电压下使用的高耐压功率模块的二极管的情况进行详细说明。但是，本发明涉及的半导体装置不限定于二极管，还能够应用于IGBT(Insulated Gate Bipolar Transistor)等。
首先，在对本发明的实施方式1涉及的二极管进行说明之前，对与其相关的二极管(以下记为“相关二极管”)进行说明。
图1是表示相关二极管的结构的剖视图。此外，就图1及其以后的图以及说明而言，上下等方向只不过是为方便起见而规定的，根据装置的安装方向适当地变更。
图1的相关二极管具有漂移层1、N型阴极缓冲层2、N型阴极层(N型半导体层)3、P型阴极层(第一P型半导体层)4、阴极电极5、P型阳极层(第二P型半导体层)6、以及阳极电极(电极)7。
作为漂移层1，例如应用N型的半导体层。
N型阴极缓冲层2配置于漂移层1之下。此外，N型阴极缓冲层2的杂质浓度比漂移层1的杂质浓度高。
N型阴极层3以及P型阴极层4以彼此横向相邻的状态配置于N型阴极缓冲层2之下。即，N型阴极层3以及P型阴极层4配置于漂移层1的下方。此外，N型阴极层3的杂质浓度比N型阴极缓冲层2的杂质浓度高。
在N型阴极层3以及P型阴极层4之下以与它们欧姆接触的状态配置有阴极电极5。
P型阳极层6配置于漂移层1之上。该P型阳极层6例如通过使杂质扩散而形成。
在P型阳极层6之上以与其欧姆接触的状态配置有阳极电极7。
就以如上方式构成的相关二极管而言，由P型阴极层4、P型阳极层6以及它们之间的N型半导体层形成寄生PNP双极晶体管。这里，在恢复动作时，成为向相关二极管的阴极层侧施加高电压的反向偏置状态，与施加至阳极电极7和阴极电极5之间的电压相对应地，耗尽层从阳极侧的PN结不断向阴极侧延伸。
在该耗尽层到达背面侧的P型阴极层4的情况下，发生穿通。此时，由于在相关二极管的ON状态时在漂移层1内积蓄的载流子穿过发生了穿通的PNP双极晶体管的区域，因此，该区域的电流密度上升，发生电流集中。
图2是通过对恢复时的相关二极管内部的电流分布进行模拟而求出的结果。在图2中，以电流随着阴影点的密度增大而升高的方式图示了电流分布。根据图2可知，P型阴极层4的区域的电流升高。
存在有时由于这样的电流集中所引起的热量上升而导致相关二极管损伤的问题。与此相对，就本实施方式1涉及的二极管而言，能够抑制由于恢复动作时的电流集中而导致的热量上升。
图3是表示本实施方式1涉及的二极管的结构的剖视图。以下，对在本实施方式1中说明的结构要素中的与相关二极管相同或者类似的结构要素标注相同的参照标号，主要对不同的结构要素进行说明。
本实施方式1涉及的二极管除了相关二极管的结构要素之外还具有绝缘层8。绝缘层8以与P型阳极层6以及阳极电极7接触的状态配置于P型阴极层4的上方。在本实施方式1中，绝缘层8以埋设于阳极电极7的下表面的状态与P型阳极层6的上表面接触。
根据以上这样的本实施方式1涉及的二极管，由于绝缘层8，载流子变得难以从绝缘层8的下方的P型阴极层4逸出。因此，能够对恢复动作时的寄生PNP双极晶体管的不必要动作，即P型阴极层4的区域的电流集中进行抑制，因而能够提高破坏耐量。
此外，漂移层1等半导体层既可以由宽带隙半导体(例如：碳化硅、氮化镓、金刚石等)构成，也可以由除此之外的半导体(例如：硅)构成。在漂移层1等半导体层由宽带隙半导体构成的情况下，在高温下也能够实现稳定工作以及高速工作等。
<变形例>
在以上所说明的实施方式1中，绝缘层8以埋设于阳极电极7的下表面的状态与P型阳极层6的上表面接触，但是，不限定于该例子。
作为变形例1，例如如图4所示，绝缘层8也可以以埋设于P型阳极层6的上表面的状态与阳极电极7的下表面接触。这样的结构也能够得到与实施方式1相同的效果。
作为变形例2，例如如图5所示，在阳极电极7设置有沿厚度方向延伸的通孔7a的结构中，绝缘层8也可以以埋设于通孔7a内的状态与P型阳极层6的上表面接触。这样的结构也能够得到与实施方式1相同的效果。
<实施方式2>
图6是表示本发明的实施方式2涉及的二极管的结构的剖视图。以下，对在本实施方式2中说明的结构要素中的与实施方式1相同或者类似的结构要素标注相同的参照标号，主要对不同的结构要素进行说明。
在本实施方式2中，具有N型阳极缓冲层11、12以代替绝缘层8。并且，P型阳极层6配置于N型阳极缓冲层11、12之上，配置于漂移层1的上方。
这里，N型阳极缓冲层(第一N型缓冲层)11配置于N型阴极层3的上方且位于漂移层1之上。
N型阳极缓冲层(第二N型缓冲层)12以与N型阳极缓冲层11横向相邻的状态配置于P型阴极层4的上方且位于漂移层1之上。并且，N型阳极缓冲层12的杂质浓度比N型阳极缓冲层11的杂质浓度高。例如，N型阳极缓冲层12的杂质浓度比N型阳极缓冲层11的杂质浓度高出1个数量级以上。此外，在本实施方式2中，漂移层1的杂质浓度<N型阳极缓冲层11的杂质浓度<N型阳极缓冲层12的杂质浓度<P型阳极层6的杂质浓度。
根据以上这样的本实施方式2涉及的二极管，通过使P型阴极层4上方的N型阳极缓冲层12的杂质浓度升高，能够使该区域的耗尽层难以向阴极侧延伸。其结果，能够对恢复动作时的寄生PNP双极晶体管处的穿通乃至P型阴极层4的区域的电流集中进行抑制，因而能够提高破坏耐量。
<变形例>
也可以对实施方式2的结构进行各种变形。
例如，作为变形例1，如图7所示，也可以具有N型阴极缓冲层16、17以代替N型阴极缓冲层2。
这里，N型阴极缓冲层(第三N型缓冲层)16配置于N型阴极层3之上且位于漂移层1之下。
N型阴极缓冲层(第四N型缓冲层)17以与N型阴极缓冲层16横向相邻的状态配置于P型阴极层4之上且位于漂移层1之下。并且，N型阴极缓冲层17的杂质浓度比N型阴极缓冲层16的杂质浓度高。例如，N型阴极缓冲层17的杂质浓度比N型阴极缓冲层16的杂质浓度高出1个数量级以上。此外，在本变形例1中，漂移层1的杂质浓度<N型阴极缓冲层16的杂质浓度<N型阴极缓冲层17的杂质浓度。这样的结构也能够得到与实施方式2相同的效果。
另外，例如，作为变形例2，如图8所示，也可以在图7的结构中不具有N型阳极缓冲层11、12。即，N型阴极缓冲层(第一N型缓冲层)16配置于N型阴极层3之上且位于漂移层1之下，N型阴极缓冲层(第二N型缓冲层)17以与N型阴极缓冲层16横向相邻的状态配置于P型阴极层4之上且位于漂移层1之下。并且，N型阴极缓冲层17的杂质浓度比N型阴极缓冲层16的杂质浓度高。这样的结构也能够得到与实施方式2相同的效果。
<实施方式3>
图9是表示本发明的实施方式3涉及的二极管的结构的剖视图。以下，对在本实施方式3中说明的结构要素中的与实施方式1相同或者类似的结构要素标注相同的参照标号，主要对不同的结构要素进行说明。
本实施方式3涉及的二极管具有P型阳极层(第三P型半导体层)19以代替绝缘层8。该P型阳极层19以与P型阳极层6以及阳极电极7接触的状态配置于P型阴极层4的上方。并且，P型阳极层19的寿命τ1比P型阳极层6的寿命τ2短。即，τ1<τ2。此外，如果利用例如质子照射而使半导体层发生缺陷，则能够使该半导体层的寿命变短。但是，寿命的控制不限定于质子照射，当然也可以通过其他的手段进行。
根据以上这样的本实施方式3涉及的二极管，通过使P型阴极层4上方的P型阳极层19的寿命变短，从而使在寄生PNP双极晶体管发生穿通时流入到阳极侧的载流子的一部分，在P型阳极层19的区域消失。其结果，在恢复动作时，能够对P型阴极层4的区域的电流集中进行缓和，因而能够提高破坏耐量。
在多个实施方式之外，本发明能够在本发明的范围内对各实施方式及各变形例自由地进行组合，对各实施方式及各变形例适当地进行变形、省略。
对本发明进行了详细说明，但上述说明在所有方面均为例示，本发明不限定于此。可以理解为在不脱离本发明的范围的情况下能够想到未例示出的无数的变形例。
标号的说明
1漂移层，3N型阴极层，4P型阴极层，6、19P型阳极层，7阳极电极，7a通孔，8绝缘层，11、12N型阳极缓冲层，16、17N型阴极缓冲层。

Claims (4)

1.一种半导体装置，其具有：
漂移层；
N型半导体层以及第一P型半导体层，它们以彼此横向相邻的状态配置于所述漂移层的下方；
第二P型半导体层，其配置于所述漂移层之上；
电极，其配置于所述第二P型半导体层之上；以及
绝缘层，其以与所述第二P型半导体层以及所述电极接触的状态配置于所述第一P型半导体层的上方，
所述绝缘层在上下方向仅与所述第一P型半导体层的相应的部分重叠，
所述“之上”是指位于上侧且彼此接触，所述“上方”是指位于上侧且不彼此接触。
2.根据权利要求1所述的半导体装置，其中，
所述绝缘层埋设于所述电极的下表面。
3.根据权利要求1所述的半导体装置，其中，
所述绝缘层埋设于所述第二P型半导体层的上表面。
4.根据权利要求1所述的半导体装置，其中，
在所述电极设置有通孔，
所述绝缘层埋设于所述通孔内。
CN201680084787.1A 2016-04-25 2016-04-25 半导体装置 Active CN109075211B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2016/062898 WO2017187477A1 (ja) 2016-04-25 2016-04-25 半導体装置

Publications (2)

Publication Number Publication Date
CN109075211A CN109075211A (zh) 2018-12-21
CN109075211B true CN109075211B (zh) 2023-04-18

Family

ID=60160231

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680084787.1A Active CN109075211B (zh) 2016-04-25 2016-04-25 半导体装置

Country Status (5)

Country Link
US (1) US11004986B2 (zh)
JP (1) JP6537711B2 (zh)
CN (1) CN109075211B (zh)
DE (1) DE112016006787T5 (zh)
WO (1) WO2017187477A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7412246B2 (ja) * 2020-03-30 2024-01-12 三菱電機株式会社 半導体装置
DE102020119349A1 (de) 2020-07-22 2022-01-27 Infineon Technologies Austria Ag Diode und Verfahren zur Herstellung einer Diode

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158922A (ja) * 2007-12-05 2009-07-16 Denso Corp 半導体装置及びその製造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3321185B2 (ja) * 1990-09-28 2002-09-03 株式会社東芝 高耐圧半導体装置
JPH06151824A (ja) * 1992-11-05 1994-05-31 Fuji Electric Co Ltd 逆導通ｇｔｏサイリスタの製造方法
JP3807023B2 (ja) * 1997-05-27 2006-08-09 富士電機デバイステクノロジー株式会社 電力用ダイオード
US6545341B2 (en) * 2000-03-27 2003-04-08 Kabushiki Kaisha Toshiba Power transistor
JP4004357B2 (ja) 2002-08-29 2007-11-07 新電元工業株式会社 ダイオード
JP2005354031A (ja) * 2004-05-13 2005-12-22 Mitsubishi Electric Corp 半導体装置
JP2008244312A (ja) * 2007-03-28 2008-10-09 Sanyo Electric Co Ltd 半導体装置
JP2010283132A (ja) 2009-06-04 2010-12-16 Mitsubishi Electric Corp 半導体装置
JP4957840B2 (ja) * 2010-02-05 2012-06-20 株式会社デンソー 絶縁ゲート型半導体装置
JP5361808B2 (ja) * 2010-06-23 2013-12-04 三菱電機株式会社 電力用半導体装置
JP5605073B2 (ja) * 2010-08-17 2014-10-15 株式会社デンソー 半導体装置
JP2012059734A (ja) * 2010-09-03 2012-03-22 Panasonic Corp 半導体装置及びその製造方法
JP5634318B2 (ja) * 2011-04-19 2014-12-03 三菱電機株式会社 半導体装置
JP5737102B2 (ja) * 2011-09-19 2015-06-17 株式会社デンソー 半導体装置
JP5724887B2 (ja) * 2012-01-16 2015-05-27 トヨタ自動車株式会社 半導体装置
CN102569067B (zh) * 2012-02-17 2014-11-26 北京时代民芯科技有限公司 一种平面高压超快软恢复二极管的制造方法
JP2013201360A (ja) * 2012-03-26 2013-10-03 Toshiba Corp 半導体装置
US9299818B2 (en) * 2012-05-29 2016-03-29 Mitsubishi Electric Corporation Insulating gate-type bipolar transistor
JP2014075582A (ja) * 2012-09-12 2014-04-24 Fuji Electric Co Ltd 半導体装置および半導体装置の製造方法
US10074719B2 (en) * 2012-12-20 2018-09-11 Toyota Jidosha Kabushiki Kaisha Semiconductor device in which an insulated-gate bipolar transistor ( IGBT) region and a diode region are formed on one semiconductor substrate
JP5971414B2 (ja) * 2013-06-12 2016-08-17 三菱電機株式会社 半導体装置
JP2015008235A (ja) * 2013-06-25 2015-01-15 富士電機株式会社 半導体装置の製造方法
US10355142B2 (en) 2016-02-29 2019-07-16 Mitsubishi Electric Corporation Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158922A (ja) * 2007-12-05 2009-07-16 Denso Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
CN109075211A (zh) 2018-12-21
WO2017187477A1 (ja) 2017-11-02
US20190043998A1 (en) 2019-02-07
JP6537711B2 (ja) 2019-07-03
US11004986B2 (en) 2021-05-11
DE112016006787T5 (de) 2019-01-17
JPWO2017187477A1 (ja) 2018-07-05

Similar Documents

Publication Publication Date Title
US9478647B2 (en) Semiconductor device
US10559663B2 (en) Semiconductor device with improved current flow distribution
JP5787853B2 (ja) 電力用半導体装置
CN107039438B (zh) 半导体装置
US9711626B2 (en) Reverse-conducting IGBT
KR101534106B1 (ko) 반도체장치
CN109314143B (zh) 半导体装置
US9761582B2 (en) Semiconductor device and method of manufacturing semiconductor device
US9972618B2 (en) Semiconductor device
US10903202B2 (en) Semiconductor device
US8912632B2 (en) Semiconductor device
CN108417614B (zh) 半导体装置
JP2007184486A (ja) 半導体装置
US20160079369A1 (en) Semiconductor device
CN105122458A (zh) 半导体装置及其制造方法
KR20120121344A (ko) 반도체장치
CN107924940B (zh) 半导体装置
JP2017103456A (ja) 半導体装置
CN109075211B (zh) 半导体装置
JP2014187200A (ja) 半導体装置の製造方法
US9613951B2 (en) Semiconductor device with diode
US9496332B1 (en) Semiconductor device
US9634154B1 (en) Schottky diode having a well with peripherial cathod regions and center andoe region
JP6089733B2 (ja) 半導体装置
JP2014154849A (ja) 半導体装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant