JP7412246B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP7412246B2 JP7412246B2 JP2020059505A JP2020059505A JP7412246B2 JP 7412246 B2 JP7412246 B2 JP 7412246B2 JP 2020059505 A JP2020059505 A JP 2020059505A JP 2020059505 A JP2020059505 A JP 2020059505A JP 7412246 B2 JP7412246 B2 JP 7412246B2
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- 239000004065 semiconductor Substances 0.000 title claims description 135
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 229910052735 hafnium Inorganic materials 0.000 claims description 6
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 239000011733 molybdenum Substances 0.000 claims description 6
- 239000010936 titanium Substances 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 239000000126 substance Substances 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 6
- 239000004020 conductor Substances 0.000 description 4
- 238000011084 recovery Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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Description
また、本開示のさらに別の一態様によれば、第1の半導体層と、第1の半導体層の表面上に設けられ第1の半導体層と異なる導電型の第2の半導体層と、第2の半導体層の表面上に少なくとも選択的に設けられた導電性の緩衝層と、緩衝層の表面上に設けられた電極と、電極上に接合されている配線と、を備え、緩衝層のビッカース硬度は電極のビッカース硬度より高く、緩衝層は、平面視で配線と電極が接合されている領域を含む領域に設けられている、半導体装置、が提供される。
また、本開示の半導体装置は、さらに別の一態様においては、第2の半導体層の表面上に少なくとも選択的に設けられた導電性の緩衝層と、緩衝層の表面上に設けられた電極と、電極上に接合されている配線と、を備え、緩衝層のビッカース硬度は電極のビッカース硬度より高く、緩衝層は、平面視で配線と電極が接合されている領域を含む領域に設けられている。
<A-1.構成・動作>
図1は実施の形態1に係る半導体装置100の断面図を示す。
緩衝層5のビッカース硬度はアノード電極3のビッカース硬度より高く、緩衝層5は平面視で少なくとも1つの開口を持ち、少なくとも1つの開口それぞれは、幅wがw<Wthを満たす。これにより、外部配線4とアノード層2の間の抵抗を抑え、かつ、異物によってアノード層2にダメージが入る頻度を抑制することができる。
緩衝層5の平面視での形状は、<A-1.構成>で説明したメッシュ状のものに限られない。緩衝層5は平面視で少なくとも1つの開口を持ち、各開口の幅をwとした場合にw<Wthであるようなものであればよい。アノード電極3は、緩衝層5の少なくとも1つの開口を通ってアノード層2と接する。緩衝層5が少なくとも1つの開口を持つことで、外部配線4とアノード層2との間の抵抗を低減することができ、開口の幅wをw<Wthを満たすようにすることで、異物によるダメージの頻度を抑制できる。
<B-1.構成・動作>
本実施の形態に係る半導体装置101は、実施の形態1に係る半導体装置100と比べ、緩衝層5の代わりに、緩衝層6を備える。緩衝層6は、緩衝層5と比べ、素材が異なる。また、緩衝層6は、緩衝層5と異なる形状でもよく、それに伴い、半導体装置101では、半導体装置100と比べ、アノード電極3とアノード層2の接し方またはアノード電極3とアノード層2が接するかどうか、が異なってもよい。その他は、半導体装置101は半導体装置100と同じである。
半導体装置101は、アノード層2の表面上に少なくとも選択的に設けられた導電性の緩衝層6を備え、緩衝層6のビッカース硬度はアノード電極3のビッカース硬度より高い。これにより、外部配線4とアノード層2の間の抵抗を抑え、かつ、異物によってアノード層2にダメージが入る頻度を抑制することができる。
Claims (12)
- 第1の半導体層と、
前記第1の半導体層の表面上に設けられ前記第1の半導体層と異なる導電型の第2の半導体層と、
前記第2の半導体層の表面上に設けられ平面視で少なくとも1つの開口を持つ緩衝層と、
前記第2の半導体層および前記緩衝層の上側に設けられ前記少なくとも1つの開口を通って前記第2の半導体層と接する電極と、
を備え、
前記電極は前記少なくとも1つの開口の部分において前記第1の半導体層と接しておらず、
前記緩衝層のビッカース硬度は前記電極のビッカース硬度より高く、
前記緩衝層の厚さをs、前記電極の厚さをt、Wth=2×(s×t‐s2)0.5とした場合に、前記少なくとも1つの開口それぞれは、幅wがw<Wthを満たす、
半導体装置。 - 請求項1に記載の半導体装置であって、
平面視において前記少なくとも1つの開口および前記緩衝層からなる領域は、
平面視において前記第1の半導体層の表面の部分的な領域のみを占める、
半導体装置。 - 請求項1に記載の半導体装置であって、
平面視において前記少なくとも1つの開口および前記緩衝層からなる領域は、
平面視において前記第1の半導体層の表面の全面を占める、
半導体装置。 - 請求項1から3のいずれかに記載の半導体装置であって、
前記少なくとも1つの開口それぞれは、平面視において、各辺の長さがWthの矩形に内包される形状である、
半導体装置。 - 請求項1から4のいずれかに記載の半導体装置であって、
前記緩衝層は、平面視においてメッシュ状の形状を有する、
半導体装置。 - 請求項1から3のいずれかに記載の半導体装置であって、
前記少なくとも1つの開口それぞれは、幅がWth未満の線状である、
半導体装置。 - 請求項6に記載の半導体装置であって、
前記緩衝層は、平面視においてストライプ状の形状を有する、
半導体装置。 - 請求項6に記載の半導体装置であって、
前記緩衝層は、平面視において同心環状の形状を有する、
半導体装置。 - 請求項1から8のいずれかに記載の半導体装置であって、
前記緩衝層はシリコン酸化物またはシリコン窒化物を含む、
半導体装置。 - 第1の半導体層と、
前記第1の半導体層の表面上に設けられ前記第1の半導体層と異なる導電型の第2の半導体層と、
前記第2の半導体層の表面上に少なくとも選択的に設けられた導電性の緩衝層と、
前記緩衝層の表面上に設けられた電極と、
を備え、
前記緩衝層のビッカース硬度は前記電極のビッカース硬度より高く、
前記緩衝層は前記第2の半導体層の上の全面に設けられている、
半導体装置。 - 第1の半導体層と、
前記第1の半導体層の表面上に設けられ前記第1の半導体層と異なる導電型の第2の半導体層と、
前記第2の半導体層の表面上に少なくとも選択的に設けられた導電性の緩衝層と、
前記緩衝層の表面上に設けられた電極と、
前記電極上に接合されている配線と、
を備え、
前記緩衝層のビッカース硬度は前記電極のビッカース硬度より高く、
前記緩衝層は、平面視で前記配線と前記電極が接合されている領域を含む領域に設けられている、
半導体装置。 - 請求項10または11に記載の半導体装置であって、
前記緩衝層は、チタン、タングステン、モリブデン、ハフニウムのいずれかを含む、
半導体装置。
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