CN108598089B - Tft基板的制作方法及tft基板 - Google Patents

Tft基板的制作方法及tft基板 Download PDF

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CN108598089B
CN108598089B CN201810390114.XA CN201810390114A CN108598089B CN 108598089 B CN108598089 B CN 108598089B CN 201810390114 A CN201810390114 A CN 201810390114A CN 108598089 B CN108598089 B CN 108598089B
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CN108598089A (zh
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李立胜
宋德伟
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Abstract

本发明提供一种TFT基板的制作方法及TFT基板。本发明的TFT基板的制作方法，通过在有源层两端的源漏极接触区内分别设置接触区过孔，在缓冲层对应于所述接触区过孔下方形成缓冲层凹槽，并使缓冲层凹槽和有源层之间在接触区过孔处形成底切结构，从而使得透明导电层在接触区过孔处发生断裂，后续使得源漏极穿过绝缘层过孔和接触区过孔在缓冲层凹槽内从下方与有源层的源漏极接触区相接触，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极从下方直接与有源层的源漏极接触区形成欧姆接触，提高了TFT器件的电子迁移率。

Description

TFT基板的制作方法及TFT基板
技术领域
本发明涉及显示技术领域，尤其涉及一种TFT基板的制作方法及TFT基板。
背景技术
在显示技术领域，液晶显示器(Liquid Crystal Display，LCD)和有源矩阵驱动式有机电致发光(Active Matrix Organic Light-Emitting Diode，AMOLED)显示器等平板显示装置因具有机身薄、高画质、省电、无辐射等众多优点，得到了广泛的应用，如：移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本屏幕等。
薄膜晶体管(Thin Film Transistor，TFT)阵列(Array)基板是目前LCD装置和AMOLED装置中的主要组成部件，直接关系到高性能平板显示装置的发展方向，用于向显示器提供驱动电路，通常设置有数条栅极扫描线和数条数据线，该数条栅极扫描线和数条数据线限定出多个像素单元，每个像素单元内设置有薄膜晶体管和像素电极，薄膜晶体管的栅极与相应的栅极扫描线相连，当栅极扫描线上的电压达到开启电压时，薄膜晶体管的源极和漏极导通，从而将数据线上的数据电压输入至像素电极，进而控制相应像素区域的显示。通常阵列基板上薄膜晶体管的结构又包括层叠设置于衬底基板上的栅极、栅极绝缘层、有源层、源漏极、及绝缘保护层。
其中，低温多晶硅(Low Temperature Poly-Silicon，LTPS)薄膜晶体管与传统非晶硅(A-Si)薄膜晶体管相比，虽然制作工艺复杂，但因其具有更高的载流子迁移率，被广泛用于中小尺寸高分辨率的LCD和AMOLED显示面板的制作，低温多晶硅被视为实现低成本全彩平板显示的重要材料。
鉴于低温多晶硅技术的有源矩阵朝着不断缩小尺寸方向发展，随之而来的光刻技术进步导致了生产设备成本的激增。常见的导入内嵌式触控结构(In Cell Touch)是将具有触控功能的膜层穿插在正常显示的阵列制程中，为了满足显示与触控的功能同时可用，每一层都需要完成光罩、蚀刻形成一定的图案。导入内嵌式触控阵列基板需要使用12道光罩(mask)工艺进行制作，这样增加了阵列工艺中曝光机的使用，进而增加了阵列制程的复杂性，致使阵列基板整体的产能降低，为了降低制造成本，本行业内发明了9道光罩工艺进行阵列基板的制作，但是这还是不能满足对阵列基板日益增加的产能的需求。
在9Mask技术的基础上，通过将层间绝缘层(ILD)层和平坦层(PLN)共用一道光罩，并使公共电极层(BITO)与像素电极层(TITO)位置交换后，源漏极(SD)、触控线与像素电极共用一道半色调光罩(Half Tone Mask，HTM)制作形成，可省略两道Mask工艺，实现7道光光罩工艺技术，制作具有In Cell Touch功能的LTPS低温多晶硅阵列基板。但是7Mask工艺中，源漏极与像素电极共用光罩后，源漏极必须通过氧化铟锡(ITO)才能与有源层的源漏极接触区发生间接接触，多晶硅与氧化铟锡接触而出现的肖特基接触势垒，会产生限流效应，TFT器件迁移率大幅下降。
发明内容
本发明的目的在于提供一种TFT基板的制作方法，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极从下方直接与有源层的源漏极接触区形成欧姆接触，提高TFT器件的电子迁移率。
本发明的目的还在于提供一种TFT基板，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极从下方直接与有源层的源漏极接触区形成欧姆接触，提高TFT器件的电子迁移率。
为实现上述目的，本发明首先提供一种TFT基板的制作方法，包括如下步骤：
步骤S1、提供衬底基板，并在衬底基板上形成由下至上依次设置的缓冲层、有源层、栅极绝缘层、层间绝缘层及平坦层；
所述有源层具有位于两端的源漏极接触区及位于中间的沟道区，所述有源层在两端的源漏极接触区上分别设有一接触区过孔；
步骤S2、对所述平坦层进行曝光、显影，在所述平坦层上对应于所述接触区过孔的上方形成光阻过孔，以所述平坦层为遮蔽层，对层间绝缘层、栅极绝缘层及缓冲层进行第一次蚀刻，在所述层间绝缘层和栅极绝缘层上形成与接触区过孔连通的绝缘层过孔，在所述缓冲层上形成与接触区过孔连通的缓冲层凹槽；
步骤S3、对所述缓冲层进行第二次蚀刻，使得缓冲层在缓冲层凹槽处被横向蚀刻，使缓冲层凹槽和有源层之间在接触区过孔处形成底切结构；
步骤S4、在所述层间绝缘层上方依次沉积形成透明导电层和金属层，所述透明导电层在接触区过孔处发生断裂，所述金属层连续伸入缓冲层凹槽内并填充缓冲层凹槽，对所述透明导电层和金属层进行图案化处理，由金属层形成源漏极及触控线，由透明导电层形成像素电极，所述源漏极通过缓冲层凹槽从下方与所述有源层的源漏极接触区相接触。
所述的TFT基板的制作方法还包括步骤S5、在所述层间绝缘层上形成覆盖透明导电层和金属层的钝化层，在所述钝化层上沉积并图案化形成公共电极层。
所述透明导电层的材料为氧化铟锡。
所述缓冲层为氧化硅层与氮化硅层的组合，其中氧化硅层堆叠于氮化硅层之上，所述步骤S2中形成的缓冲层凹槽属于氧化硅层。
所述缓冲层中氧化硅层的折射率为。
所述步骤S2中，通过干法蚀刻对所述对层间绝缘层、栅极绝缘层及缓冲层进行第一次蚀刻，进行所述第一次蚀刻所使用的蚀刻气体包含四氟化碳。
所述步骤S3中，通过干法蚀刻对所述缓冲层进行第二次蚀刻，进行所述第二次蚀刻所使用的蚀刻气体包含五氟乙烷。
所述步骤S4具体包括如下步骤：
步骤S41、依次沉积形成透明导电层和金属层，在所述金属层表面涂布形成光阻层，使用半色调光罩对光阻层进行曝光，进而对所述光阻层进行显影，得到光阻图案；
步骤S42、以光阻图案为遮蔽层，对所述透明导电层和金属层进行第一次蚀刻，由透明导电层和金属层分别得到重叠的透明导电图案和金属图案，所述金属图案包括目标金属图案和待离金属图案，所述透明导电图案包括分别对应于所述目标金属图案和待离金属图案下方的保留导电图案和目标导电图案，所述目标金属图案包括源漏极及触控线，所述目标导电图案包括像素电极；
步骤S43、通过灰化工艺，去掉所述待离金属图案上方所对应的光阻图案，对所述金属层进行第二次蚀刻，去掉所述待离金属图案，露出所述目标导电图案。
本发明还提供一种TFT基板，包括衬底基板、在衬底基板上的缓冲层、在缓冲层上的有源层、在缓冲层上覆盖有源层的栅极绝缘层、在栅极绝缘层上的栅极、在栅极绝缘层上覆盖栅极的层间绝缘层、在层间绝缘层上方的透明导电层及在透明导电层上的金属层；
所述有源层具有位于两端的源漏极接触区及位于中间的沟道区，所述有源层在两端的源漏极接触区上分别设有一接触区过孔；
所述层间绝缘层和栅极绝缘层上设有与接触区过孔连通的绝缘层过孔，所述缓冲层上设有与接触区过孔连通的缓冲层凹槽，且缓冲层凹槽和有源层之间在接触区过孔处形成底切结构；
所述透明导电层在接触区过孔处发生断裂，所述金属层连续伸入缓冲层凹槽内并填充缓冲层凹槽，所述金属层包括源漏极及触控线，所述源漏极通过缓冲层凹槽从下方与所述有源层的源漏极接触区相接触。
所述的TFT基板还包括设于衬底基板和缓冲层之间的遮光层、覆盖透明导电层和金属层的钝化层、设于所述钝化层上的公共电极层；
所述透明导电的材料为氧化铟锡；
所述有源层为低温多晶硅半导体层。
本发明的有益效果：本发明的TFT基板的制作方法，通过在有源层两端的源漏极接触区内分别设置接触区过孔，在缓冲层对应于所述接触区过孔下方形成缓冲层凹槽，并使缓冲层凹槽和有源层之间在接触区过孔处形成底切结构，从而使得透明导电层在接触区过孔处发生断裂，后续使得源漏极穿过绝缘层过孔和接触区过孔在缓冲层凹槽内从下方与有源层的源漏极接触区相接触，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极从下方直接与有源层的源漏极接触区形成欧姆接触，提高了TFT器件的电子迁移率。本发明的TFT基板，有源层两端的源漏极接触区内分别设有接触区过孔，缓冲层对应于所述接触区过孔下方设有缓冲层凹槽，且缓冲层凹槽和有源层之间在接触区过孔处形成底切结构，使得透明导电层在接触区过孔处发生断裂，后续使得源漏极穿过绝缘层过孔和接触区过孔在缓冲层凹槽内从下方与有源层的源漏极接触区相接触，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极从下方直接与有源层的源漏极接触区形成欧姆接触，提高了TFT器件的电子迁移率。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为本发明的TFT基板的制作方法的流程示意图；
图2为本发明的TFT基板的制作方法的步骤S1的示意图；
图3为本发明的TFT基板的制作方法的步骤S1中所形成的有源层的平面示意图；
图4为本发明的TFT基板的制作方法的步骤S1中接触区过孔处的膜层结构示意图；
图5为本发明的TFT基板的制作方法的步骤S2的示意图；
图6为本发明的TFT基板的制作方法的步骤S2中接触区过孔处的膜层结构示意图；
图7为本发明的TFT基板的制作方法的步骤S3的示意图；
图8为本发明的TFT基板的制作方法的步骤S3中接触区过孔处的膜层结构示意图；
图9为本发明的TFT基板的制作方法的步骤S4的示意图；
图10为本发明的TFT基板的制作方法的步骤S4中透明导电层在接触区过孔处发生断裂的示意图；
图11为本发明的TFT基板的制作方法的步骤S4中源漏极在缓冲层凹槽内从下方接触有源层的示意图；
图12为本发明的TFT基板的制作方法的步骤S5的示意图暨本发明的TFT基板的结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1，本发明首先提供一种TFT基板的制作方法，包括如下步骤：
步骤S1、如图2所示，提供衬底基板10，并依次形成在衬底基板10上的遮光层15、在衬底基板10上覆盖遮光层15的缓冲层20、在缓冲层20上的有源层30、在缓冲层20上覆盖有源层30的栅极绝缘层40、在栅极绝缘层40上的栅极50、在栅极绝缘层40上覆盖栅极50的层间绝缘层60以及在层间绝缘层60上的平坦层70。
具体地，如图3-4所示，所述有源层30具有位于两端的源漏极接触区31及中间的位于两源漏极接触区31之间的沟道区32，所述有源层30在两端的源漏极接触区31上分别设有一接触区过孔35。
具体地，所述缓冲层20为氧化硅(SiOx)层和氮化硅(SiNx)层的组合，其中氧化硅层堆叠于氮化硅层之上。
具体地，所述栅极绝缘层40为氧化硅层；所述层间绝缘层60为氧化硅层和氮化硅层的组合。
具体地，所述有源层30为低温多晶硅半导体层。
步骤S2、如图5所示，对所述平坦层70进行曝光、显影，在所述平坦层70上对应于所述接触区过孔35的上方形成光阻过孔75，以所述平坦层70为遮蔽层，对层间绝缘层60、栅极绝缘层40及缓冲层20进行第一次蚀刻，如图6所示，对应于所述接触区过孔35的上方在所述层间绝缘层60和栅极绝缘层40上形成与接触区过孔35及光阻过孔75连通的绝缘层过孔65，对应于所述接触区过孔35的下方在所述缓冲层20上形成与接触区过孔35连通的缓冲层凹槽25。
具体地，所述步骤S2中，通过干法蚀刻对所述对层间绝缘层60、栅极绝缘层40及缓冲层20进行第一次蚀刻，进行所述第一次蚀刻所使用的蚀刻气体包含四氟化碳(CF4)。
具体地，所述步骤S2中形成的缓冲层凹槽25属于缓冲层20的氧化硅层
步骤S3、如图7所示，对所述缓冲层20进行第二次蚀刻，使得缓冲层20在缓冲层凹槽25处被横向蚀刻，如图8所示，使得缓冲层凹槽25的宽度增大，进而使缓冲层凹槽25和有源层30之间在接触区过孔35处形成底切(Under Cut)结构。
具体地，所述步骤S3中通过干法蚀刻对所述缓冲层20进行第二次蚀刻。
具体地，所述步骤S1中形成的缓冲层20的氧化硅层为疏松结构，其折射率为1.40-1.47，而正常结构的氧化硅层的折射率通常大于1.49，例如层间绝缘层60为氧化硅层；并且在所述步骤S3中进行所述第二次蚀刻所使用的蚀刻气体对缓冲层20具有选择蚀刻性，该蚀刻气体包含五氟乙烷，使得缓冲层20在缓冲层凹槽25处能够被横向蚀刻，进而使得缓冲层凹槽25和有源层30之间形成底切结构
步骤S4、如图9所示，在所述层间绝缘层60上方依次沉积形成透明导电层7和金属层8，如图10所示，所述透明导电层7在接触区过孔35处发生断裂，所述金属层8连续伸入缓冲层凹槽25内并填充缓冲层凹槽25，对所述透明导电层7和金属层8进行图案化处理，由金属层8形成源漏极81及触控线82，由透明导电层7形成像素电极71，如图11所示，所述源漏极81通过缓冲层凹槽25从下方与所述有源层30的源漏极接触区31相接触。
具体地，所述透明导电层7的材料为氧化铟锡。
需要解释的是，9mask技术中的层间绝缘层60和平坦层70的制备需要采用两道光罩工艺，但是在本发明的7mask技术中通过将平坦层70作为层间绝缘层60的光阻层使用，在步骤S3对层间绝缘层60进行图案化处理后，所述步骤S4在沉积形成所述透明导电层7和金属层8之前，将平坦层70剥离，仅通过一道光罩工艺便可以完成层间绝缘层70的制备，进而相对于9mask工艺节省了一道光罩制程；所述透明导电层7和金属层8形成在所述层间绝缘层60表面上。除此之外，所述步骤S4中也可以将平坦层70保留，所述透明导电层7和金属层8形成在所述平坦层70表面上。
具体地，所述步骤S4采用半色调光罩对所述透明导电层7和金属层8进行图案化处理，所述步骤S4具体包括如下步骤：
步骤S41、依次沉积形成透明导电层7和金属层8，在所述金属层8表面涂布形成光阻层，使用半色调光罩对光阻层进行曝光，进而对所述光阻层进行显影，得到光阻图案。
步骤S42、以光阻图案为遮蔽层，对所述透明导电层7和金属层8进行第一次蚀刻，由透明导电层7和金属层8分别得到重叠的透明导电图案和金属图案，所述金属图案包括目标金属图案和待离金属图案，所述透明导电图案包括分别对应于所述目标金属图案和待离金属图案下方的保留导电图案和目标导电图案，其中，所述目标金属图案包括源漏极81及触控线82，所述目标导电图案包括像素电极71，且所述待离金属图案上方的光阻图案的厚度小于目标金属图案上方的光阻图案的厚度。
步骤S43、通过灰化工艺，去掉所述待离金属图案上方所对应的光阻图案，对所述金属层8进行第二次蚀刻，去掉所述待离金属图案，露出所述目标导电图案。
步骤S5、如图12所示，在所述层间绝缘层60上形成覆盖透明导电层7和金属层8的钝化层90，在所述钝化层90上沉积并图案化形成公共电极层95。
本发明的TFT基板的制作方法，通过在有源层30两端的源漏极接触区31内分别设置接触区过孔35，在缓冲层20对应于所述接触区过孔35下方形成缓冲层凹槽25，并使缓冲层凹槽25和有源层30之间在接触区过孔35处形成底切结构，从而使得透明导电层7在接触区过孔35处发生断裂，后续使得源漏极81穿过绝缘层过孔65和接触区过孔35在缓冲层凹槽25内从下方与有源层30的源漏极接触区31相接触，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极81从下方直接与有源层30的源漏极接触区31形成欧姆接触，提高了TFT器件的电子迁移率。
基于上述的TFT基板的制作方法，本发明还提供一种TFT基板，包括衬底基板10、在衬底基板10上的遮光层15，在衬底基板10上覆盖遮光层15的缓冲层20、在缓冲层20上的有源层30、在缓冲层20上覆盖有源层30的栅极绝缘层40、在栅极绝缘层40上的栅极50、在栅极绝缘层40上覆盖栅极50的层间绝缘层60、在层间绝缘层60上方的透明导电层7、在透明导电层7上的金属层8、覆盖透明导电层7和金属层8的钝化层90及设于所述钝化层90上的公共电极层95；
所述有源层30具有位于两端的源漏极接触区31及位于中间的沟道区32，所述有源层30在两端的源漏极接触区31上分别设有一接触区过孔35；
在所述层间绝缘层60和栅极绝缘层40上设有与接触区过孔35连通的绝缘层过孔65，所述缓冲层20上设有与接触区过孔35连通的缓冲层凹槽25，且缓冲层凹槽25和有源层30之间在接触区过孔35处形成底切结构；
所述透明导电层7在接触区过孔35处发生断裂，所述透明导电层7包括像素电极71，所述金属层8连续伸入缓冲层凹槽25内并填充缓冲层凹槽25，所述金属层8包括源漏极81及触控线82，所述源漏极81通过缓冲层凹槽25从下方与所述有源层30的源漏极接触区31相接触。
具体地，所述透明导电层7的材料为氧化铟锡。
具体地，所述有源层30为低温多晶硅半导体层。
本发明的TFT基板，有源层30两端的源漏极接触区31内分别设有接触区过孔35，缓冲层20对应于所述接触区过孔35下方设有缓冲层凹槽25，且缓冲层凹槽25和有源层30之间在接触区过孔35处形成底切结构，使得透明导电层7在接触区过孔处35发生断裂，后续使得源漏极81穿过绝缘层过孔65和接触区过孔35在缓冲层凹槽25内从下方与有源层30的源漏极接触区31相接触，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极81从下方直接与有源层30的源漏极接触区31形成欧姆接触，提高了TFT器件的电子迁移率。
综上所述，本发明的TFT基板的制作方法，通过在有源层两端的源漏极接触区内分别设置接触区过孔，在缓冲层对应于所述接触区过孔下方形成缓冲层凹槽，并使缓冲层凹槽和有源层之间在接触区过孔处形成底切结构，从而使得透明导电层在接触区过孔处发生断裂，后续使得源漏极穿过绝缘层过孔和接触区过孔在缓冲层凹槽内从下方与有源层的源漏极接触区相接触，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极从下方直接与有源层的源漏极接触区形成欧姆接触，提高了TFT器件的电子迁移率。本发明的TFT基板，有源层两端的源漏极接触区内分别设有接触区过孔，缓冲层对应于所述接触区过孔下方设有缓冲层凹槽，且缓冲层凹槽和有源层之间在接触区过孔处形成底切结构，使得透明导电层在接触区过孔处发生断裂，后续使得源漏极穿过绝缘层过孔和接触区过孔在缓冲层凹槽内从下方与有源层的源漏极接触区相接触，避开了7Mask技术中多晶硅与氧化铟锡接触而出现的肖特基接触势垒，使得源漏极从下方直接与有源层的源漏极接触区形成欧姆接触，提高了TFT器件的电子迁移率。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种TFT基板的制作方法，其特征在于，包括如下步骤：
步骤S1、提供衬底基板(10)，并在衬底基板(10)上形成由下至上依次设置的缓冲层(20)、有源层(30)、栅极绝缘层(40)、层间绝缘层(60)及平坦层(70)；
所述有源层(30)具有位于两端的源漏极接触区(31)及位于中间的沟道区(32)，所述有源层(30)在两端的源漏极接触区(31)上分别设有一接触区过孔(35)；
步骤S2、在所述平坦层(70)上对应于所述接触区过孔(35)的上方图案化形成光阻过孔(75)，以所述平坦层(70)为遮蔽层，对层间绝缘层(60)、栅极绝缘层(40)及缓冲层(20)进行第一次蚀刻，在所述层间绝缘层(60)和栅极绝缘层(40)上形成与接触区过孔(35)连通的绝缘层过孔(65)，在所述缓冲层(20)上形成与接触区过孔(35)连通的缓冲层凹槽(25)；
步骤S3、对所述缓冲层(20)进行第二次蚀刻，使得缓冲层(20)在缓冲层凹槽(25)处被横向蚀刻，使缓冲层凹槽(25)和有源层(30)之间在接触区过孔(35)处形成底切结构；
步骤S4、在所述层间绝缘层(60)上方依次沉积形成透明导电层(7)和金属层(8)，所述透明导电层(7)在接触区过孔(35)处发生断裂，所述金属层(8)连续伸入缓冲层凹槽(25)内并填充缓冲层凹槽(25)，对所述透明导电层(7)和金属层(8)进行图案化处理，由金属层(8)形成源漏极(81)及触控线(82)，由透明导电层(7)形成像素电极(71)，所述源漏极(81)通过缓冲层凹槽(25)从下方与所述有源层(30)的源漏极接触区(31)相接触。
2.如权利要求1所述的TFT基板的制作方法，其特征在于，还包括步骤S5、形成覆盖透明导电层(7)和金属层(8)的钝化层(90)，在所述钝化层(90)上沉积并图案化形成公共电极层(95)。
3.如权利要求1所述的TFT基板的制作方法，其特征在于，所述透明导电层(7)的材料为氧化铟锡；
所述有源层(30)为低温多晶硅半导体层；
所述步骤S1还包括在形成缓冲层(20)之前，在衬底基板(10)上形成遮光层(15)。
4.如权利要求1所述的TFT基板的制作方法，其特征在于，所述缓冲层(20)为氧化硅层与氮化硅层的组合，其中氧化硅层堆叠于氮化硅层之上，所述步骤S2中形成的缓冲层凹槽(25)属于氧化硅层。
5.如权利要求4所述的TFT基板的制作方法，其特征在于，所述缓冲层(20)中氧化硅层的折射率为1.40-1.47。
6.如权利要求1所述的TFT基板的制作方法，其特征在于，所述步骤S2中，通过干法蚀刻对所述对层间绝缘层(60)、栅极绝缘层(40)及缓冲层(20)进行第一次蚀刻，进行所述第一次蚀刻所使用的蚀刻气体包含四氟化碳。
7.如权利要求1所述的TFT基板的制作方法，其特征在于，所述步骤S3中，通过干法蚀刻对所述缓冲层(20)进行第二次蚀刻，进行所述第二次蚀刻所使用的蚀刻气体包含五氟乙烷。
8.如权利要求1所述的TFT基板的制作方法，其特征在于，所述步骤S4具体包括如下步骤：
步骤S41、依次沉积形成透明导电层(7)和金属层(8)，在所述金属层(8)表面涂布形成光阻层，使用半色调光罩对光阻层进行曝光，进而对所述光阻层进行显影，得到光阻图案；
步骤S42、以光阻图案为遮蔽层，对所述透明导电层(7)和金属层(8)进行第一次蚀刻，由透明导电层(7)和金属层(8)分别得到重叠的透明导电图案和金属图案，所述金属图案包括目标金属图案和待离金属图案，所述透明导电图案包括分别对应于所述目标金属图案和待离金属图案下方的保留导电图案和目标导电图案，所述目标金属图案包括源漏极(81)及触控线(82)，所述目标导电图案包括像素电极(71)；
步骤S43、通过灰化工艺，去掉所述待离金属图案上方所对应的光阻图案，对所述金属层(8)进行第二次蚀刻，去掉所述待离金属图案，露出所述目标导电图案。
9.一种TFT基板，其特征在于，包括衬底基板(10)、在衬底基板(10)上的缓冲层(20)、在缓冲层(20)上的有源层(30)、在缓冲层(20)上覆盖有源层(30)的栅极绝缘层(40)、在栅极绝缘层(40)上的栅极(50)、在栅极绝缘层(40)上覆盖栅极(50)的层间绝缘层(60)、在层间绝缘层(60)上方的透明导电层(7)及在透明导电层(7)上的金属层(8)；
所述有源层(30)具有位于两端的源漏极接触区(31)及位于中间的沟道区(32)，所述有源层(30)在两端的源漏极接触区(31)上分别设有一接触区过孔(35)；
在所述层间绝缘层(60)和栅极绝缘层(40)上设有与接触区过孔(35)连通的绝缘层过孔(65)，所述缓冲层(20)上设有与接触区过孔(35)连通的缓冲层凹槽(25)，且缓冲层凹槽(25)和有源层(30)之间在接触区过孔(35)处形成底切结构；
所述透明导电层(7)在接触区过孔(35)处发生断裂，所述金属层(8)连续伸入缓冲层凹槽(25)内并填充缓冲层凹槽(25)，所述金属层(8)包括源漏极(81)及触控线(82)，所述源漏极(81)通过缓冲层凹槽(25)从下方与所述有源层(30)的源漏极接触区(31)相接触。
10.如权利要求9所述的TFT基板，其特征在于，还包括设于衬底基板(10)和缓冲层(20)之间的遮光层(15)、覆盖透明导电层(7)和金属层(8)的钝化层(90)、设于所述钝化层(90)上的公共电极层(95)；
所述透明导电层(7)的材料为氧化铟锡；
所述有源层(30)为低温多晶硅半导体层。
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