CN107039351A - Tft基板的制作方法及tft基板 - Google Patents
Tft基板的制作方法及tft基板 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 79
- 238000002360 preparation method Methods 0.000 title claims abstract description 33
- 239000010410 layer Substances 0.000 claims abstract description 187
- 239000012212 insulator Substances 0.000 claims abstract description 58
- 239000011229 interlayer Substances 0.000 claims abstract description 57
- 229910052751 metal Inorganic materials 0.000 claims abstract description 50
- 239000002184 metal Substances 0.000 claims abstract description 50
- 238000000034 method Methods 0.000 claims abstract description 34
- 150000002500 ions Chemical class 0.000 claims description 39
- 239000000463 material Substances 0.000 claims description 34
- 229920002120 photoresistant polymer Polymers 0.000 claims description 24
- 238000002161 passivation Methods 0.000 claims description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- 239000011521 glass Substances 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 229910001080 W alloy Inorganic materials 0.000 claims description 6
- 239000004411 aluminium Substances 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims description 6
- 238000009413 insulation Methods 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 229920005591 polysilicon Polymers 0.000 claims description 6
- 229910000838 Al alloy Inorganic materials 0.000 claims description 4
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 4
- 229910001182 Mo alloy Inorganic materials 0.000 claims description 4
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 230000003139 buffering effect Effects 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 3
- 229910003978 SiClx Inorganic materials 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 11
- 238000005530 etching Methods 0.000 abstract description 8
- 230000015572 biosynthetic process Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 13
- 239000004973 liquid crystal related substance Substances 0.000 description 13
- 229910004205 SiNX Inorganic materials 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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Abstract
本发明提供一种TFT基板的制作方法及TFT基板。本发明的TFT基板的制作方法,先蚀刻栅极绝缘层形成两第一过孔,并在两第一过孔内形成与两跨接金属块,再蚀刻层间介电层形成分别与两第一过孔连通的两第二过孔,源极和漏极分别通过两第二过孔与两跨接金属块接触,通过将传统的一次蚀刻工艺制作出栅极绝缘层与层间介电层的过孔结构改进为两次蚀刻工艺,能够提升有源层的均一性,降低制程难度,避免因蚀刻厚度较厚而造成的蚀刻停止的问题,提升产品品质。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种TFT基板的制作方法及TFT基板。
背景技术
随着显示技术的发展,液晶显示器(Liquid Crystal Display,LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点,而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品,成为显示装置中的主流。
现有市场上的液晶显示装置大部分为背光型液晶显示器,其包括液晶显示面板及背光模组(backlight module)。液晶显示面板的工作原理是在两片平行的玻璃基板当中放置液晶分子,两片玻璃基板中间有许多垂直和水平的细小电线,通过通电与否来控制液晶分子改变方向,将背光模组的光线折射出来产生画面。
通常液晶显示面板由彩膜(CF,Color Filter)基板、薄膜晶体管(TFT,Thin FilmTransistor)基板、夹于彩膜基板与薄膜晶体管基板之间的液晶(LC,Liquid Crystal)及密封胶框(Sealant)组成。其中,TFT基板是液晶显示面板中的主要驱动元件,直接关系到高性能液晶显示装置的发展方向。
如图1至图3所示,现有的TFT基板的制作方法包括如下步骤:
步骤1、如图1所示,提供衬底基板100,在所述衬底基板100上从下到上依次制作缓冲层200、有源层300、栅极绝缘层400、栅极500、及层间介电层600;
步骤2、如图2所示,对所述层间介电层600与栅极绝缘层400同时进行蚀刻,在所述层间介电层600与栅极绝缘层400上形成分别对应于有源层300两端的通孔;
步骤3、如图3所示,在所述层间介电层600上从下到上依次制作源极700与漏极800、平坦层900、公共电极1000、钝化层1100、及像素电极1200。
上述TFT基板的制作方法的步骤2中,由于所述层间介电层600与栅极绝缘层400的总厚度较大,因此对二者同时进行蚀刻的制程比较难以控制,容易出现通孔未刻穿或者通孔过蚀刻导致有源层300损失量不一致的情况,造成产品异常。因此有必要提供一种改进的TFT基板的制作方法,以解决上述问题。
发明内容
本发明的目的在于提供一种TFT基板的制作方法,能够提升有源层的均一性,降低制程难度,避免因蚀刻厚度较厚而造成的蚀刻停止的问题,提升产品品质。
本发明的目的还在于提供一种TFT基板,能够提升有源层的均一性,降低制程难度,避免因蚀刻厚度较厚而造成的蚀刻停止的问题,提升产品品质。
为实现上述目的,本发明首先提供一种TFT基板的制作方法,包括如下步骤:
步骤1、提供衬底基板,在所述衬底基板上从下到上依次制作缓冲层与有源层;对所述有源层两端进行离子掺杂,形成两离子重掺杂区;在所述有源层与缓冲层上形成栅极绝缘层;
步骤2、在所述栅极绝缘层上形成光阻层,采用半色调光罩对所述光阻层进行曝光、显影,在所述光阻层中形成第一凹槽和两第一通孔;所述第一凹槽位于所述两离子重掺杂区之间待形成的沟道区的上方,所述两第一通孔分别位于所述两离子重掺杂区的上方;
步骤3、以剩余光阻层为遮挡,对所述栅极绝缘层进行蚀刻,在所述栅极绝缘层分别对应于所述两第一通孔下方的区域形成两第一过孔;
步骤4、对所述光阻层进行整体薄化处理,使得所述第一凹槽转化为第二通孔;
以剩余的光阻层为遮挡,对所述有源层进行离子掺杂,在有源层对应位于所述第二通孔下方的区域形成沟道区;
步骤5、剥离剩余的光阻层,在所述栅极绝缘层上沉积第一金属层,对所述第一金属层进行图形化处理,得到对应于所述沟道区上方的栅极、以及分别位于两第一过孔内的两跨接金属块;
步骤6、以所述栅极为遮挡对有源层进行离子掺杂,得到分别位于沟道区与两离子重掺杂区之间的两离子轻掺杂区;
步骤7、在所述栅极绝缘层上形成层间介电层,对所述层间介电层进行蚀刻,在所述层间介电层上形成分别位于所述两跨接金属块上方的两第二过孔;
步骤8、在所述层间介电层上沉积第二金属层,对所述第二金属层进行图形化处理,得到间隔分布于所述层间介电层上并分别通过两第二过孔与两跨接金属块接触的源极与漏极;
步骤9、在所述层间介电层上从下到上依次制作平坦层、公共电极、钝化层及像素电极。
所述步骤3中对所述栅极绝缘层和所述步骤7中对所述层间介电层进行蚀刻的方法均为干蚀刻。
所述步骤4中,采用光阻灰化的方法对所述光阻层进行整体薄化处理。
所述像素电极通过贯穿所述平坦层和钝化层中的第三过孔与所述漏极接触。
所述衬底基板为玻璃基板;所述缓冲层、栅极绝缘层、层间介电层、钝化层的材料为氮化硅和氧化硅中的一种或多种的组合;所述有源层的材料为多晶硅;所述栅极与跨接金属块的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述平坦层的材料为透明有机绝缘材料;所述公共电极与像素电极的材料均为氧化铟锡。
本发明还提供一种TFT基板,包括:衬底基板、覆盖于所述衬底基板上的缓冲层、设于所述缓冲层上的有源层、覆盖于所述有源层和缓冲层上的栅极绝缘层、贯穿所述栅极绝缘层的两第一过孔、分别位于两第一过孔内的两跨接金属块、设于所述栅极绝缘层上的栅极、覆盖于所述栅极以及栅极绝缘层上的层间介电层、贯穿所述层间介电层的两第二过孔、间隔分布于所述层间介电层上的源极与漏极、以及设于所述源极、漏极和层间介电层上自下而上层叠设置的平坦层、公共电极、钝化层和像素电极;
所述有源层包括:沟道区、分别位于沟道区两侧的两离子重掺杂区和分别位于沟道区与两离子重掺杂区之间的两离子轻掺杂区;
所述两第一过孔分别位于两离子重掺杂区的上方,所述两跨接金属块分别与两离子重掺杂区接触,所述栅极位于沟道区上的栅极绝缘层上;
所述两第二过孔分别与两第一过孔连通,所述源极和漏极分别通过两第二过孔与两跨接金属块接触。
所述像素电极通过贯穿所述平坦层和钝化层中的第三过孔与所述漏极接触。
所述第一过孔通过对栅极绝缘层单独进行干蚀刻得到,所述第二过孔通过对层间介电层单独进行干蚀刻得到。
所述衬底基板为玻璃基板;所述缓冲层、栅极绝缘层、层间介电层、钝化层的材料为氮化硅和氧化硅中的一种或多种的组合;所述有源层的材料为多晶硅;所述栅极与跨接金属块的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述平坦层的材料为透明有机绝缘材料;所述公共电极与像素电极的材料均为氧化铟锡。
本发明的有益效果:本发明提供一种TFT基板的制作方法,先蚀刻栅极绝缘层形成两第一过孔,并在两第一过孔内形成与两跨接金属块,再蚀刻层间介电层形成分别与两第一过孔连通的两第二过孔,源极和漏极分别通过两第二过孔与两跨接金属块接触,通过将传统的一次蚀刻工艺制作出栅极绝缘层与层间介电层的过孔结构改进为两次蚀刻工艺,能够提升有源层的均一性,降低制程难度,避免因蚀刻厚度较厚而造成的蚀刻停止的问题,提升产品品质。本发明还提供一种TFT基板,能够提升有源层的均一性,降低制程难度,避免因蚀刻厚度较厚而造成的蚀刻停止的问题,提升产品品质。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1为现有的TFT基板的制作方法的步骤1的示意图;
图2为现有的TFT基板的制作方法的步骤2的示意图;
图3为现有的TFT基板的制作方法的步骤3的示意图;
图4为本发明的TFT基板的制作方法的流程图;
图5为本发明的TFT基板的制作方法的步骤1的示意图;
图6为本发明的TFT基板的制作方法的步骤2的示意图;
图7为本发明的TFT基板的制作方法的步骤3的示意图;
图8为本发明的TFT基板的制作方法的步骤4的示意图;
图9为本发明的TFT基板的制作方法的步骤5的示意图;
图10为本发明的TFT基板的制作方法的步骤6的示意图;
图11为本发明的TFT基板的制作方法的步骤7的示意图;
图12为本发明的TFT基板的制作方法的步骤8的示意图;
图13为本发明的TFT基板的制作方法的步骤9的示意图暨本发明的TFT基板的结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图4,本发明提供一种TFT基板的制作方法,包括如下步骤:
步骤1、如图5所示,提供衬底基板10,在所述衬底基板10上从下到上依次制作缓冲层20与有源层30;
对所述有源层30两端进行离子掺杂,形成两离子重掺杂区31;
在所述有源层30与缓冲层20上形成栅极绝缘层40。
具体地,所述衬底基板10为玻璃基板。
具体地,所述缓冲层20的材料分别为氮化硅(SiNx)和氧化硅(SiOx)中的一种或多种的组合。
具体地,所述有源层30的材料为多晶硅。
具体地,所述步骤1中,采用一道光罩对所述有源层30两端进行离子掺杂。
步骤2、如图6所示,在所述栅极绝缘层40上形成光阻层50,采用半色调光罩对所述光阻层50进行曝光、显影,在所述光阻层50中形成第一凹槽51和两第一通孔52;所述第一凹槽51位于所述两离子重掺杂区31之间待形成的沟道区的上方,所述两第一通孔52分别位于所述两离子重掺杂区31的上方;
具体地,所述栅极绝缘层40的材料分别为氮化硅和氧化硅中的一种或多种的组合。
步骤3、如图7所示,以剩余的光阻层50为遮挡,对所述栅极绝缘层40进行蚀刻,在所述栅极绝缘层40分别对应于所述两第一通孔52下方的区域形成两第一过孔41。
具体地,所述步骤3中,对所述栅极绝缘层40进行蚀刻的方法为干蚀刻。
具体地,由于栅极绝缘层厚度较薄,进行蚀刻的制程容易控制,制程均一性较佳,不容易出现过孔未刻穿或者过孔过蚀刻导致有源层30损失量不一致的问题,提升了产品品质。
步骤4、如图8所示,对所述光阻层50进行整体薄化处理,使得所述第一凹槽51转化为第二通孔53;
以剩余的光阻层50为遮挡,对所述有源层30进行离子掺杂,在有源层30对应位于所述第二通孔53下方的区域形成沟道区32。
具体地,所述步骤4中,采用光阻灰化的方法对所述光阻层50进行整体薄化处理。
步骤5、如图9所示,剥离剩余的光阻层50,在所述栅极绝缘层40上沉积第一金属层,对所述第一金属层进行图形化处理,得到对应于所述沟道区32上方的栅极60、以及分别位于所述两第一过孔41内的两跨接金属块61。
具体的,所述栅极60与两跨接金属块61的材料包括钼(Mo)、铝(Al)、铜(Cu)、钛(Ti)、钨(W)、及以上金属的合金中的至少一种。
步骤6、如图10所示,在不采用光罩的情况下,以所述栅极60为遮挡对整个有源层30进行离子掺杂,得到位于沟道区32与两离子重掺杂区31之间的两离子轻掺杂区34。
步骤7、如图11所示,在所述栅极绝缘层40上形成层间介电层70,对所述层间介电层70进行蚀刻,在所述层间介电层70形成分别位于所述两跨接金属块61上方的两第二过孔71。
具体地,所述步骤7中,对所述层间介电层70进行蚀刻的方法为干蚀刻。
具体地,由于所述第二过孔71的底层为跨接金属块61,因此在蚀刻的时候不用担心底层有源层30损失量(Loss),制程界限(Window)较大,可有效降低制程难度,避免因蚀刻厚度较厚而造成蚀刻停止的问题,提升产品品质。
具体地,所述层间介电层70的材料分别为氮化硅(SiNx)和氧化硅(SiOx)中的一种或多种的组合。
步骤8、如图12所示,在所述层间介电层70上沉积第二金属层,对所述第二金属层进行图形化处理,得到间隔分布于所述层间介电层70上并分别通过两第二过孔71与两跨接金属块61接触的源极81与漏极82。
步骤9、如图13所示,在所述层间介电层70上从下到上依次制作平坦层90、公共电极101、钝化层110及像素电极102。
具体地,所述步骤9中,在所述钝化层110以及平坦层90上形成位于所述漏极82的上方的第三过孔111,所述像素电极102通过所述第三过孔111与漏极82接触。
具体地,所述平坦层90的材料为透明有机绝缘材料。
具体地,所述公共电极101与像素电极102的材料均为氧化铟锡。
具体地,所述钝化层110的材料分别为氮化硅(SiNx)和氧化硅(SiOx)中的一种或多种的组合。
上述TFT基板的制作方法,将传统的一次蚀刻工艺制作出栅极绝缘层40与层间介电层70的过孔结构改进为两次蚀刻工艺,先蚀刻栅极绝缘层40,由于栅极绝缘层40厚度较薄,制程均一性较佳,可有效避免因蚀刻造成的有源层30损失不均,再蚀刻层间介电层70,其第二过孔71的底部为跨接金属块61,避免了蚀刻对有源层30的影响,制程界限较大,可有效降低制程难度,避免因蚀刻厚度较厚而造成蚀刻停止的问题,提升产品品质。
请参阅图13,基于上述TFT基板的制作方法,本发明还提供一种TFT基板,包括:衬底基板10、覆盖于所述衬底基板10上的缓冲层20、设于所述缓冲层20上的有源层30、覆盖于所述有源层30和缓冲层20上的栅极绝缘层40、贯穿所述栅极绝缘层40的两第一过孔41、分别位于两第一过孔41内的两跨接金属块61、设于所述栅极绝缘层40上的栅极60、覆盖于所述栅极60以及栅极绝缘层40上的层间介电层70、贯穿所述层间介电层70的两第二过孔71、间隔分布于所述层间介电层70上的源极81与漏极82、以及设于所述源极81、漏极82和层间介电层70上自下而上层叠设置的平坦层90、公共电极101、钝化层110和像素电极102;
所述有源层30包括:沟道区32、分别位于沟道区32两侧的两离子重掺杂区31和分别位于沟道区32与两离子重掺杂区31之间的两离子轻掺杂区34;
所述两第一过孔41分别位于两离子重掺杂区31的上方,所述两跨接金属块61分别与两离子重掺杂区31接触,所述栅极60位于沟道区32上的栅极绝缘层40上;
所述两第二过孔71分别与两第一过孔41连通,所述源极81和漏极82分别通过两第二过孔71与两跨接金属块61接触。
具体地,所述第一过孔41通过对栅极绝缘层40单独进行干蚀刻得到。
具体地,所述第二过孔71通过对层间介电层70单独进行干蚀刻得到。
具体地,所述像素电极102通过贯穿所述钝化层110以及平坦层90的第三过孔111与漏极82接触。
具体地,所述衬底基板10为玻璃基板。
具体地,所述缓冲层20、栅极绝缘层40、层间介电层70、钝化层110的材料分别为氮化硅(SiNx)和氧化硅(SiOx)中的一种或多种的组合。
具体地,所述有源层30的材料为多晶硅。
具体地,所述栅极60与跨接金属块61的材料包括钼(Mo)、铝(Al)、铜(Cu)、钛(Ti)、钨(W)、及以上金属的合金中的至少一种。
具体地,所述平坦层90的材料为透明有机绝缘材料。
具体地,所述公共电极101与像素电极102的材料均为氧化铟锡。
上述TFT基板,将传统的栅极绝缘层40与层间介电层70的一过孔结构分为两个过孔结构,先蚀刻栅极绝缘层40,由于栅极绝缘层40厚度较薄,制程均一性较佳,可有效避免因蚀刻造成的有源层30损失不均,再蚀刻层间介电层70,其第二过孔71的底部为跨接金属块61,避免了蚀刻对有源层30的影响,制程界限较大,可有效降低制程难度,避免因蚀刻厚度较厚而造成蚀刻停止的问题,提升产品品质。
综上所述,本发明的TFT基板的制作方法及TFT基板,先蚀刻栅极绝缘层形成两第一过孔,并在两第一过孔内形成与两跨接金属块,再蚀刻层间介电层形成分别与两第一过孔连通的两第二过孔,源极和漏极分别通过两第二过孔与两跨接金属块接触,通过将传统的一次蚀刻工艺制作出栅极绝缘层与层间介电层的过孔结构改进为两次蚀刻工艺,能够提升有源层的均一性,降低制程难度,避免因蚀刻厚度较厚而造成的蚀刻停止的问题,提升产品品质。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (9)
1.一种TFT基板的制作方法,其特征在于,包括如下步骤:
步骤1、提供衬底基板(10),在所述衬底基板(10)上从下到上依次制作缓冲层(20)与有源层(30);对所述有源层(30)两端进行离子掺杂,形成两离子重掺杂区(31);在所述有源层(30)与缓冲层(20)上形成栅极绝缘层(40);
步骤2、在所述栅极绝缘层(40)上形成光阻层(50),采用半色调光罩对所述光阻层(50)进行曝光、显影,在所述光阻层(50)中形成第一凹槽(51)和两第一通孔(52);所述第一凹槽(51)位于所述两离子重掺杂区(31)之间待形成的沟道区的上方,所述两第一通孔(52)分别位于所述两离子重掺杂区(31)的上方;
步骤3、以剩余的光阻层(50)为遮挡,对所述栅极绝缘层(40)进行蚀刻,在所述栅极绝缘层(40)分别对应于所述两第一通孔(52)下方的区域形成两第一过孔(41);
步骤4、对所述光阻层(50)进行整体薄化处理,使得所述第一凹槽(51)转化为第二通孔(53);
以剩余的光阻层(50)为遮挡,对所述有源层(30)进行离子掺杂,在有源层(30)对应位于所述第二通孔(53)下方的区域形成沟道区(32);
步骤5、剥离剩余的光阻层(50),在所述栅极绝缘层(40)上沉积第一金属层,对所述第一金属层进行图形化处理,得到对应于所述沟道区(32)上方的栅极(60)、以及分别位于两第一过孔(41)内的两跨接金属块(61);
步骤6、以所述栅极(60)为遮挡对有源层(30)进行离子掺杂,得到分别位于沟道区(32)与两离子重掺杂区(31)之间的两离子轻掺杂区(34);
步骤7、在所述栅极绝缘层(40)上形成层间介电层(70),对所述层间介电层(70)进行蚀刻,在所述层间介电层(70)上形成分别位于所述两跨接金属块(61)上方的两第二过孔(71);
步骤8、在所述层间介电层(70)上沉积第二金属层,对所述第二金属层进行图形化处理,得到间隔分布于所述层间介电层(70)上并分别通过两第二过孔(71)与两跨接金属块(61)接触的源极(81)与漏极(82);
步骤9、在所述层间介电层(70)上从下到上依次制作平坦层(90)、公共电极(101)、钝化层(110)及像素电极(102)。
2.如权利要求1所述的TFT基板的制作方法,其特征在于,所述步骤3中对所述栅极绝缘层(40)和所述步骤7中对所述层间介电层(70)进行蚀刻的方法均为干蚀刻。
3.如权利要求1所述的TFT基板的制作方法,其特征在于,所述步骤4中,采用光阻灰化的方法对所述光阻层(50)进行整体薄化处理。
4.如权利要求1所述的TFT基板的制作方法,其特征在于,所述像素电极(102)通过贯穿所述平坦层(90)和钝化层(110)中的第三过孔(111)与所述漏极(82)接触。
5.如权利要求1所述的TFT基板的制作方法,其特征在于,所述衬底基板(10)为玻璃基板;所述缓冲层(20)、栅极绝缘层(40)、层间介电层(70)、钝化层(110)的材料为氮化硅和氧化硅中的一种或多种的组合;所述有源层(30)的材料为多晶硅;所述栅极(60)与跨接金属块(61)的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述平坦层(90)的材料为透明有机绝缘材料;所述公共电极(101)与像素电极(102)的材料均为氧化铟锡。
6.一种TFT基板,其特征在于,包括:衬底基板(10)、覆盖于所述衬底基板(10)上的缓冲层(20)、设于所述缓冲层(20)上的有源层(30)、覆盖于所述有源层(30)和缓冲层(20)上的栅极绝缘层(40)、贯穿所述栅极绝缘层(40)的两第一过孔(41)、分别位于两第一过孔(41)内的两跨接金属块(61)、设于所述栅极绝缘层(40)上的栅极(60)、覆盖于所述栅极(60)以及栅极绝缘层(40)上的层间介电层(70)、贯穿所述层间介电层(70)的两第二过孔(71)、间隔分布于所述层间介电层(70)上的源极(81)与漏极(82)、以及设于所述源极(81)、漏极(82)和层间介电层(70)上自下而上层叠设置的平坦层(90)、公共电极(101)、钝化层(110)和像素电极(102);
所述有源层(30)包括:沟道区(32)、分别位于沟道区(32)两侧的两离子重掺杂区(31)和分别位于沟道区(32)与两离子重掺杂区(31)之间的两离子轻掺杂区(34);
所述两第一过孔(41)分别位于两离子重掺杂区(31)的上方,所述两跨接金属块(61)分别与两离子重掺杂区(31)接触,所述栅极(60)位于沟道区(32)上的栅极绝缘层(40)上;
所述两第二过孔(71)分别与两第一过孔(41)连通,所述源极(81)和漏极(82)分别通过两第二过孔(71)与两跨接金属块(61)接触。
7.如权利要求6所述的TFT基板,其特征在于,所述像素电极(102)通过贯穿所述平坦层(90)和钝化层(110)中的第三过孔(111)与所述漏极(82)接触。
8.如权利要求6所述的TFT基板,其特征在于,所述第一过孔(41)通过对栅极绝缘层(40)单独进行干蚀刻得到,所述第二过孔(71)通过对层间介电层(70)单独进行干蚀刻得到。
9.如权利要求6所述的TFT基板,其特征在于,所述衬底基板(10)为玻璃基板;所述缓冲层(20)、栅极绝缘层(40)、层间介电层(70)、钝化层(110)的材料为氮化硅和氧化硅中的一种或多种的组合;所述有源层(30)的材料为多晶硅;所述栅极(60)与跨接金属块(61)的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述平坦层(90)的材料为透明有机绝缘材料;所述公共电极(101)与像素电极(102)的材料均为氧化铟锡。
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108598089A (zh) * | 2018-04-27 | 2018-09-28 | 武汉华星光电技术有限公司 | Tft基板的制作方法及tft基板 |
CN111627933A (zh) * | 2019-12-10 | 2020-09-04 | 友达光电股份有限公司 | 主动元件基板及其制造方法 |
CN116544244A (zh) * | 2023-06-21 | 2023-08-04 | 惠科股份有限公司 | 阵列基板以及显示面板 |
Families Citing this family (3)
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7064021B2 (en) * | 2003-07-02 | 2006-06-20 | Au Optronics Corp. | Method for fomring a self-aligned LTPS TFT |
CN104637874A (zh) * | 2015-03-16 | 2015-05-20 | 京东方科技集团股份有限公司 | 阵列基板及其制作方法 |
CN105489480A (zh) * | 2014-09-16 | 2016-04-13 | 中芯国际集成电路制造(上海)有限公司 | 采用双重图形化技术形成栅极的方法 |
CN105895581A (zh) * | 2016-06-22 | 2016-08-24 | 武汉华星光电技术有限公司 | Tft基板的制作方法 |
US20170014439A1 (en) * | 2014-03-31 | 2017-01-19 | Robert M. Brewster | Flavonoid compositions and uses thereof |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4730994B2 (ja) | 1999-06-04 | 2011-07-20 | 株式会社半導体エネルギー研究所 | 電気光学装置及びその作製方法並びに電子装置 |
KR100307456B1 (ko) * | 1999-12-08 | 2001-10-17 | 김순택 | 박막 트랜지스터의 제조 방법 |
US6995048B2 (en) * | 2001-05-18 | 2006-02-07 | Sanyo Electric Co., Ltd. | Thin film transistor and active matrix type display unit production methods therefor |
JP4275346B2 (ja) * | 2002-03-08 | 2009-06-10 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4677713B2 (ja) * | 2003-11-25 | 2011-04-27 | セイコーエプソン株式会社 | 電気光学装置用基板、電気光学装置用基板の製造方法、電気光学装置および電子機器 |
TWI401802B (zh) | 2005-06-30 | 2013-07-11 | Samsung Display Co Ltd | 薄膜電晶體板及其製造方法 |
KR20070117269A (ko) * | 2006-06-08 | 2007-12-12 | 삼성전자주식회사 | 표시 장치 및 그 제조 방법 |
KR101002665B1 (ko) * | 2008-07-02 | 2010-12-21 | 삼성모바일디스플레이주식회사 | 박막트랜지스터, 그의 제조방법 및 그를 포함하는유기전계발광표시장치 |
JP2010272691A (ja) * | 2009-05-21 | 2010-12-02 | Sharp Corp | 薄膜トランジスタ基板の製造方法、薄膜トランジスタ基板、及び表示装置 |
KR101284287B1 (ko) * | 2010-12-21 | 2013-07-08 | 엘지디스플레이 주식회사 | 액정 표시장치와 이의 제조방법 |
KR102207063B1 (ko) * | 2012-12-12 | 2021-01-25 | 엘지디스플레이 주식회사 | 박막 트랜지스터, 박막 트랜지스터 제조 방법 및 박막 트랜지스터를 포함하는 표시 장치 |
US10642116B2 (en) * | 2013-05-01 | 2020-05-05 | Apple Inc. | Display pixels with improved storage capacitance |
KR102136992B1 (ko) * | 2013-07-12 | 2020-07-24 | 삼성디스플레이 주식회사 | 박막 트랜지스터와 이를 포함하는 박막 트랜지스터 표시판 및 유기 발광 표시 장치 |
-
2017
- 2017-04-05 CN CN201710218699.2A patent/CN107039351B/zh active Active
- 2017-05-16 WO PCT/CN2017/084601 patent/WO2018184279A1/zh active Application Filing
- 2017-05-16 KR KR1020197032764A patent/KR102314509B1/ko active IP Right Grant
- 2017-05-16 EP EP17904463.1A patent/EP3608950A4/en not_active Withdrawn
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7064021B2 (en) * | 2003-07-02 | 2006-06-20 | Au Optronics Corp. | Method for fomring a self-aligned LTPS TFT |
US20170014439A1 (en) * | 2014-03-31 | 2017-01-19 | Robert M. Brewster | Flavonoid compositions and uses thereof |
CN105489480A (zh) * | 2014-09-16 | 2016-04-13 | 中芯国际集成电路制造(上海)有限公司 | 采用双重图形化技术形成栅极的方法 |
CN104637874A (zh) * | 2015-03-16 | 2015-05-20 | 京东方科技集团股份有限公司 | 阵列基板及其制作方法 |
CN105895581A (zh) * | 2016-06-22 | 2016-08-24 | 武汉华星光电技术有限公司 | Tft基板的制作方法 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108598089A (zh) * | 2018-04-27 | 2018-09-28 | 武汉华星光电技术有限公司 | Tft基板的制作方法及tft基板 |
CN108598089B (zh) * | 2018-04-27 | 2020-09-29 | 武汉华星光电技术有限公司 | Tft基板的制作方法及tft基板 |
CN111627933A (zh) * | 2019-12-10 | 2020-09-04 | 友达光电股份有限公司 | 主动元件基板及其制造方法 |
CN111627933B (zh) * | 2019-12-10 | 2023-04-18 | 友达光电股份有限公司 | 主动元件基板及其制造方法 |
CN116544244A (zh) * | 2023-06-21 | 2023-08-04 | 惠科股份有限公司 | 阵列基板以及显示面板 |
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