CN108475672A - 半导体模块 - Google Patents

半导体模块 Download PDF

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Publication number
CN108475672A
CN108475672A CN201680078362.XA CN201680078362A CN108475672A CN 108475672 A CN108475672 A CN 108475672A CN 201680078362 A CN201680078362 A CN 201680078362A CN 108475672 A CN108475672 A CN 108475672A
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China
Prior art keywords
semiconductor module
substrate
conductor layer
electrode
wall portion
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Granted
Application number
CN201680078362.XA
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CN108475672B (zh
Inventor
池田康亮
森永雄司
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Shindengen Electric Manufacturing Co Ltd
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Shindengen Electric Manufacturing Co Ltd
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Publication of CN108475672A publication Critical patent/CN108475672A/zh
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Abstract

本发明的半导体模块1包括：第一基板10，具有第一绝缘基板11以及第一导电体层12；功率元件部20，具有第一电极21、第二电极22以及栅电极23；第二基板30，具有第二绝缘基板31、第二导电体层32以及第三导电体层35，第二绝缘基板31具有孔36，第二导电体层32具有接合部33以及围绕壁部34；内侧树脂部40；控制IC50；以及外侧树脂部60，并且按照第1基板10、功率元件部20、第二基板30以及控制IC50的顺序来叠层，孔36的内侧配置有连接构件70，栅电极23通过连接构件70与控制IC50的控制信号输出端子52电气连接。本发明的半导体模块1是一种即便是在具备有用于控制功率元件部的控制IC的情况下，也能够满足产品的小型化要求的半导体模块。

Description

半导体模块
技术领域
本发明涉及一种半导体模块。
背景技术
以往，具备基板和半导体元件的半导体模块已被普遍认知(例如，参照专利文献1)。
以往的半导体模块8如图9所示，包括：基板810，具有绝缘基板811、设置在绝缘基板811的一个主面上的导电体层812以及设置在与导电体层812隔开的位置上的导电体层813、814；元件(Device)部(半导体元件)820，其一个面(图9中下侧的面)上具有第一电极821，另一个面(图9中上侧的面)上具有两个第二电极822、823，并且第一电极821与导电体层812接合；壁部816，沿绝缘基板811的外周形成；树脂部860，通过在由绝缘基板811和壁部816所构成的上升空间中配置树脂后形成；树脂制的盖部862，配置在树脂部860的上端面；以及外部连接用的端子874、876，其一端与导电体层813、814电气连接，并且，从该一端经由树脂部860以及盖部862向外部(铅直上方)延出。
半导体元件820的两个第二电极822、823中，第二电极822经由焊线(Wire)870以及导电体层813与端子874电气连接，第二电极823经由焊线872与端子876电气连接。
以往的半导体模块8由于具备树脂部860，该树脂部860是通过在由绝缘基板811和壁部816所构成的上升空间中配置树脂后形成，因此该半导体模块8是一种具有耐冲击性的半导体模块。
然而，近年来在半导体模块技术领域中，行业普遍需求能够容易地形成用于树脂封装的结构的半导体模块。
因此，本发明的发明人想到了这种能够容易地形成用于树脂封装的结构的半导体模块，并且已在先申请了PCT/JP2015/051655(以下简称为在先申请)。
在先申请涉及的半导体模块9如图10所示，包括：第一基板910，具有第一绝缘基板911以及设置在第一绝缘基板911的至少一个面上的第一导电体层912；元件部(半导体元件)920，其一个面上具有第一电极921，其另一个面上具有第二电极922，并且第一电极921与第一导电体层912接合；第二基板930，具有第二绝缘基板931以及设置在第二绝缘基板931的至少一个面上的第二导电体层932，并且第二导电体层932具有与第二电极922接合的接合部933以及从平面看在将接合部933包围的位置上以上端面比接合部933与第二电极922之间的接合面更突出的状态下形成的围绕壁部934，第二基板930通过围绕壁部934与第一基板910相接触；以及树脂部940，由配置在通过围绕壁部934来划分的，并且，被第一绝缘基板911以及第二绝缘基板931夹住的空间中的树脂所构成。
在先申请涉及的半导体模块9中，从平面看元件部920被配置为整体位于通过围绕壁部934划分的区域的内侧。
根据在先申请涉及的半导体模块9，由于第二导电体层932具有从平面看在将接合部933包围的位置上以上端面比接合部933与第二电极922之间的接合面更突出的状态下形成的围绕壁部934，因此就没有必要再另行准备用于形成树脂封装结构的构件(例如，以往的半导体模块8中的壁部816)，从而就能够容易地形成用于树脂封装的结构。
另外，根据在先申请涉及的半导体模块9，由于元件部920的第二电极922与配置在第二绝缘基板931的一个面上的第二导电体层932接合，因此不仅能够将元件部920处产生的热量在通过第一导电体层912以及第一绝缘基板911散热至外部，还能够通过第二导电体层932以及第二绝缘基板931散热至外部。所以，先申请涉及的半导体模块9是一种比以往具有更高散热性的半导体模块。
【先行技术文献】
【专利文献1】特开2006-134990号公报
近年来，在半导体模块的技术领域中，对能够满足产品小型化要求的半导体模块有着很高的需求。然而，在这种半导体模块中，当使用具有栅电极的功率元件部(功率半导体元件)来作为元件部，并将控制功率软件部的控制IC设置在第一绝缘基板的一个面侧时，就有必要确保用于在第一绝缘基板的一个面侧设置控制IC所需的区域，这样就会增大占用面积，导致无法成为能够满足产品小型化的半导体模块。
因此，本发明鉴于上述课题，目的是提供一种半导体模块，其即便是在具备有用于控制功率元件部的控制IC的情况下，也能够满足产品的小型化要求。
发明内容
【1】本发明的半导体模块，包括：第一基板，具有第一绝缘基板以及设置在所述第一绝缘基板的一个面上的第一导电体层；功率元件部，其一个面上具有第一电极，其另一个面上具有第二电极以及栅电极，并且所述第一电极与所述第一导电体层电气连接；第二基板，具有第二绝缘基板、设置在所述第二绝缘基板的一个面上的第二导电体层以及设置在所述第二绝缘基板的另一个面上的第三导电体层，所述第二绝缘基板具有配置在与所述栅电极相对应的位置上的孔，所述第二导电体层具有与所述第二电极接合的接合部以及从平面看在将所述接合部包围的位置上以上端面比所述第二电极与所述接合部之间的接合面更突出的状态下形成的围绕壁部，并且通过所述围绕壁部与所述第一基板相接触；内侧树脂部，由配置在通过所述围绕壁部划分的，并且，被所述第一绝缘基板以及所述第二绝缘基板夹住的空间中的树脂所构成；控制IC，配置在所述第三导电体层上；以及外侧树脂部，由在所述第一基板的一个面侧的，被配置为覆盖所述第二基板以及所述控制IC的树脂所构成，按照所述第一基板、所述功率元件部、所述第二基板以及所述控制IC的顺序叠层，其特征在于：所述第二绝缘基板的孔的内侧配置有连接构件，所述栅电极通过所述连接构件与所述控制IC的控制信号输出端子电气连接。
在本说明书中，“在将接合部包围的位置上……的状态下形成的围绕壁部”不仅包含了在包围接合部的整个周围的位置上形成有围绕壁部的情况，还包含有仅在包围接合部的位置中的规定部分上形成有围绕壁部的情况。
【2】在本发明的半导体模块中，理想的情况是：所述围绕壁部形成在从平面看将所述接合部整周包围的位置上。
【3】在本发明的半导体模块中，理想的情况是：所述围绕壁部仅形成在从平面看将所述接合部包围的位置中的规定部分上。
【4】在本发明的半导体模块中，理想的情况是：所述围绕壁部在与所述接合部相连续的状态下形成，所述第一基板进一步具有在所述第一绝缘基板的一个面上的与所述第一导电体层隔开的位置上与所述围绕壁部接合的第四导电体层，所述第四导电体层通过所述围绕壁部以及所述接合部与所述第二电极电气连接。
在本说明书中，“围绕壁部在与接合部相连续的状态下形成”不仅包含了围绕壁部与接合部相邻的情况，还包含有围绕壁部与接合部之间夹有其他件的情况。
【5】在本发明的半导体模块中，理想的情况是：所述第四导电体层上形成有用于嵌合所述围绕壁部的槽部。
【6】在本发明的半导体模块中，理想的情况是：所述围绕壁部在与所述接合部隔开的状态下形成。
【7】在本发明的半导体模块中，理想的情况是：所述第一基板进一步具有在所述第一绝缘基板的一个面上的与所述第一导电体层隔开的位置上与所述围绕壁部接合的第四导电体层，所述第四导电体层上形成有用于嵌合所述围绕壁部的槽部。
【8】在本发明的半导体模块中，理想的情况是：所述功率元件部由一个半导体元件构成，所述一个半导体元件的一个面上具有第一电极，另一个面上具有第二电极以及栅电极。
【9】在本发明的半导体模块中，理想的情况是：所述功率元件部具有多个半导体元件叠层的结构，所述多个半导体元件中的至少一个半导体元件的一个面上具有第一电极，另一个面上具有第二电极以及栅电极。
在本说明书中，当两个以上的半导体元件具有栅电极时，半导体元件在各个栅电极相互错开并能够分别与连接构件电气连接的状态下被叠层的。
【10】在本发明的半导体模块中，理想的情况是：所述功率元件部具有多个半导体元件叠层的结构，所述第一基板进一步具有被配置在与所述第一导电体层隔开的位置上的第五导电体层，所述半导体模块的一端被夹在所述多个半导体元件中的两个半导体元件之间，并且，另一端上进一步具有与所述第五导电体层电气连接的第二连接构件。
【11】在本发明的半导体模块中，理想的情况是：所述功率元件部具有多个半导体元件叠层的结构，所述多个半导体元件中的至少两个半导体元件均为一个面上具有第一电极，另一个面上具有第二电极以及栅电极的结构，所述至少两个半导体元件均被叠层为使半导体元件整体位于从平面看通过所述围绕壁部划分的区域的内侧。
【12】在本发明的半导体模块中，理想的情况是：所述功率元件部具有多个半导体元件叠层的结构，所述多个半导体元件中的至少两个半导体元件均为一个面上具有第一电极，另一个面上具有第二电极以及栅电极的结构，所述至少两个半导体元件中的至少一个被叠层为使半导体元件的所述栅电极位于从平面看通过所述围绕壁部划分的区域的外侧。
【13】在本发明的半导体模块中，理想的情况是：所述接合部以及所述围绕壁部由单个铜层形成
发明效果
根据本发明的半导体模块，由于是按照第一基板、功率元件部、第二基板以及控制IC的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC的情况下，也能够在不需要在第一绝缘基板的一个面上确保用于设置控制IC所需的空间的情况下，将占用面积减小至比在第一绝缘基板的一个面上将控制IC与功率元件部并排配置时更小的程度。其结果就是，本发明的半导体模块是一种能够满足产品小型化要求的半导体模块。
另外，根据本发明的半导体模块，由于第二绝缘基板具有配置在与栅电极相对应的位置上的孔，在第二绝缘基板的孔的内侧配置有连接构件，并且栅电极通过连接构件与控制IC的控制信号输出端子电气连接，因此即便是在控制IC被配置在第三导电体层上时，也能够在不受第二绝缘基板影响的情况下利用控制IC来控制功率元件部。
另外，根据本发明的半导体模块，由于在第二绝缘基板的孔的内侧配置有连接构件，并且栅电极通过连接构件与控制IC的控制信号输出端子电气连接，因此就能够缩短功率元件部的栅电极与控制IC的控制信号输出端子之间布线的长度(连接构件的长度)，从而不易受到来自于外部的噪声影响。
另外，根据本发明的半导体模块，由于第二导电体层具有形成在从平面看将接合部包围的位置上的围绕壁部，因此即便是在因功率元件部处被施加过大的负荷后产生发热导致内侧树脂部着火的情况下，也能够通过围绕壁部发挥防火墙的作用来防止火势向周围蔓延。
另外，根据本发明的半导体模块，由于第二导电体层具有形成在从平面看将接合部包围的位置上的围绕壁部，因此就能够利用围绕壁部将功率元件部与外部屏蔽，从而就能够防止功率元件部因外部的噪声而产生振动或失灵，其结果就是，本发明的半导体模块是一种很少出现因振动或失灵而导致故障的半导体模块。
附图说明
图1是实施方式一涉及的半导体模块1的展示图。图1(a)是半导体模块1的截面图，图1(b)是图1(a)的A-A平截面图。
图2是第二基板30的说明展示图。图2(a)是第二基板30的平面图，图2(b)是图2(a)的B-B截面图。
图3是实施方式二涉及的半导体模块2的展示图。图3(a)是半导体模块2的截面图，图3(b)是图3(a)的C-C平截面图。
图4是实施方式三涉及的半导体模块3的截面图。
图5是实施方式四涉及的半导体模块4的截面图。图5(a)是半导体模块4的截面图，图5(b)是图5(a)的D-D平截面图。
图6是实施方式五涉及的半导体模块5的展示图。图6(a)是半导体模块5的截面图，图6(b)是图6(a)的E-E平截面图。
图7是实施方式六涉及的半导体模块6的展示图。图7(a)是半导体模块6的截面图，图7(b)是图7(a)的F-F平截面图。
图8是实施方式七涉及的半导体模块7的截面图。
图9是以往的半导体模块8的截面图。其中，符号815表示基板810的散热用导电体层。
图10是在先申请涉及的半导体模块9的截面图。其中，符号913表示第三导电体层，符号915表示基板910的散热用导电体层，符号916表示槽部，符号935表示第二基板930的散热用导电体层，符号937表示平坦部，符号S表示焊锡。
具体实施方式
以下，将依据附图中所示的实施方式，对本发明的半导体模块进行说明。【实施方式一】
1.实施方式一涉及的半导体模块1的构成
实施方式一涉及的半导体模块1如图1所示，包括：第一基板10、功率元件部、第二基板30、内侧树脂部40、控制IC50、外侧树脂部60、以及连接件(连接构件)70，并按照第一基板10、功率元件部、第二基板30以及控制IC50的顺序叠层。
第一基板10为安装基板，其具有：第一绝缘基板11；配置在第一绝缘基板11的一个面上的第一导电体层12；在与第一导电体层12隔开的位置上与后述的围绕壁部34接合的第四导电体层13；配置在与第一导电体层12以及第四导电体层13隔开的位置上的外部连接用导电体层14；以及配置在第一绝缘基板11的另一个面上的散热用导电体层15。
第一基板10上的第一绝缘基板11由陶瓷(例如，氧化铝)构成，第一导电体层12、第四导电体层13、外部连接用导电体层14、以及散热用导电体层15由金属(例如铜)构成。第一基板10是第一绝缘基板11与各导电体层共晶接合的DCB(Direct Cupper Bonding)基板。通过这样的构成，就能够成为了一种具有高散热性的半导体模块。
第四导电体层13上形成有用于嵌合后述的围绕壁部34的槽部16。槽部16通过对第四导电体层蚀刻后形成。外部连接用导电体层14通过一部分未被外侧树脂部60覆盖或与外部连接用的端子(未图示)相连接，从而与外部电路(未图示)相连接。外部连接用导电体层14还通过后述的第三导电体层35以及焊线80与控制IC50的输入端子(或控制信号输出端子)电气连接。
功率元件部由一个半导体元件20构成，其一个面(图1中的下侧)上具有第一电极21，其另一个面(图1中的上侧)上具有第二电极22以及栅电极23。功率元件部被配置为使半导体元件20整体位于从平面看被围绕壁部34划分的区域的内侧。半导体元件20是一个三端子的半导体元件(例如，IGBT)。
栅电极23通过连接件70与控制IC50的输出端子52电气连接。第一电极21与第一导电体层12、以及第二电极22与后述的第二基板30分别通过接合材料S(例如，焊锡)接合从而实现电气连接。
第二基板30如图1以及图2所示，具有第二绝缘基板31、配置在第二绝缘基板31的一个面上的第二导电体层32、以及配置在第二绝缘基板31的另一个面上的第三导电体层35。第二基板30上的第二绝缘基板31由陶瓷(例如，氧化铝)构成，第二导电体层32以及第三导电体层35由金属(例如铜)构成。第二基板30是第二绝缘基板31与各导电体层共晶接合的DCB基板。
第二绝缘基板31(以及第二导电体层32以及第三导电体层35)如图2所示，具有配置在与栅电极23的位置相对应的位置上的孔36。
第二导电体层32如图1以及图2所示，具有与第二电极22接合的接合部33、从平面看在将接合部33包围的位置上以上端面比第二电极22与接合部33之间的接合面更突出的状态下形成的围绕壁部34以及平坦部37。第二基板30通过围绕壁部34与第一基板10的第四导电体层13相接触。接合部33以及围绕壁部34是通过对单个铜层蚀刻而形成的。通过这样的构成，就能够高精度地形成接合部33以及围绕壁部34。
围绕壁部34形成在从平面看将接合部33整周包围的位置上(参照图1(b))。即，围绕壁部34的形状从平面看呈“口”字形。
围绕壁部34是在通过第二导电体层32的平坦部37与接合部33相连续的状态下形成的。围绕壁部34嵌合在第一基板10的第四导电体层13的槽部16中，并通过接合材料(例如焊锡)接合。通过这样，第二电极22与第四导电体层13就通过接合部33以及围绕壁部34来实现电气连接。
从第二绝缘基板31与第二导电体层32之间的界面至围绕壁部34的上端面的长度例如在0.2～1.0mm范围内。接合部33的厚度例如在0.15～0.5mm范围内。
内侧树脂部40如图1所示，由配置在“通过围绕壁部34划分的，并且，被第一绝缘基板11以及第二绝缘基板31夹住的空间”中的树脂所构成。可以使用合适的树脂(例如，环氧树脂)来构成内侧树脂部40。
控制IC50通过控制功率元件部的栅电极23的开启关闭(ON/OFF)，从而对功率元件部的驱动进行控制。控制IC50配置在第三导电体层35上。控制IC50具有规定的控制信号输出端子52，该控制信号输出端子52与栅电极23通过后述的连接件70电气连接。
外侧树脂部60由在第一基板10的一个面侧的，被配置为至少覆盖第二基板30以及控制IC50的树脂所构成。可以使用与内侧树脂部40相同或不同的树脂来构成外侧树脂部60。
连接件(连接构件)70被配置在第二绝缘基板31的孔36的内侧。连接件70呈细长的柱状，其一端与功率元件部的栅电极23电气连接，另一端与控制IC50的控制信号输出端子52电气连接。连接件70是通过对金属板进行冲压·折弯加工后形成的。金属板可以选用合适的材料(例如铝)。
2.实施方式一涉及的半导体模块1的效果
根据实施方式一涉及的半导体模块1，由于是按照第一基板10、功率元件部(半导体元件20)、第二基板30以及控制IC50的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC的情况下，也能够在不需要在第一绝缘基板11的一个面上确保用于设置控制IC50所需的空间的情况下，将占用面积减小至比在第一绝缘基板11的一个面上将控制IC50与功率元件部并排配置时更小的程度。其结果就是，实施方式一涉及的半导体模块1是一种能够满足产品小型化要求的半导体模块。
另外，根据实施方式一涉及的半导体模块1，由于第二绝缘基板31具有配置在与栅电极23相对应的位置上的孔36，在第二绝缘基板31的孔36的内侧配置有连接件70，并且栅电极23通过连接件70与控制IC50的控制信号输出端子52电气连接，因此即便是在控制IC50被配置在第三导电体层35上时，也能够在不受第二绝缘基板31影响的情况下利用控制IC50来控制功率元件部。
另外，根据实施方式一涉及的半导体模块1，由于在第二绝缘基板31的孔36的内侧配置有连接件70，并且栅电极23通过连接件70与控制IC50的控制信号输出端子52电气连接，因此就能够缩短功率元件部的栅电极23与控制IC50的控制信号输出端子52之间布线的长度(连接件70的长度)，从而不易受到来自于外部的噪声影响。
另外，根据实施方式一涉及的半导体模块1，由于第二导电体层32具有形成在从平面看将接合部33包围的位置上的围绕壁部34，因此即便是在因功率元件部处被施加过大的负荷后产生发热导致内侧树脂部40着火的情况下，也能够通过围绕壁部34发挥防火墙的作用来防止火势向周围蔓延。
另外，根据实施方式一涉及的半导体模块1，由于第二导电体层32具有形成在从平面看将接合部33包围的位置上的围绕壁部34，因此就能够利用围绕壁部34将功率元件部与外部屏蔽，从而就能够防止功率元件部因外部的噪声而产生振动或失灵，其结果就是，实施方式一涉及的半导体模块1是一种很少出现因振动或失灵而导致故障的半导体模块。
另外，根据实施方式一涉及的半导体模块1，由于围绕壁部34形成在从平面看将接合部33整周包围的位置上，因此即便是在因功率元件部处被施加过大的负荷后产生发热导致内侧树脂部40着火的情况下，也能够因围绕壁部34将内侧树脂部40完全包围从而防止火势向周围蔓延。另外，由于围绕壁部34能够从外部将功率元件部完全屏蔽，因此还能够切实防止来自于功率元件部外部的噪声导致功率元件部产生振动或失灵。
在实施方式一涉及的半导体模块1中，围绕壁部34在与接合部33相连续的状态下形成，第一基板10进一步具有在第二绝缘基板31的一个面上的与第一导电体层12隔开的位置上与围绕壁部34接合的第四导电体层13，第四导电体层13通过围绕壁部34以及接合部33与第二电极22电气连接。
通过这样的构成，功率元件部的第二电极22就能够通过接合部33、围绕壁部34以及第四导电体层13与外部电气连接。并且，由于接合部33、围绕壁部34以及第四导电体层13均截面积比焊线更大且电阻更低，因此在半导体模块流通大电流时就不易产生故障，所以实施方式一涉及的半导体模块1是一种具有更高可靠性的半导体模块。
另外，根据实施方式一涉及的半导体模块1，由于具有上述构成，因此能够将功率元件部产生的热量通过接合部33、围绕壁部34以及第四导电体层13散热脂外部，所以实施方式一涉及的半导体模块1是一种具有更高散热性的半导体模块。
另外，根据实施方式一涉及的半导体模块1，由于第四导电体层13上形成有用于嵌合围绕壁部34的槽部16，因此在半导体模块的制造过程中，在将第二基板30搭载于第一基板10上时，通过将第二基板30的围绕壁部34嵌入第四导电体层13的槽部16就能够轻易地完成定位。
另外，根据实施方式一涉及的半导体模块1，由于功率元件部由一个半导体元件20构成，半导体元件20的一个面上具有第一电极21，另一个面上具有第二电极22以及栅电极23，因此是其一种布线设计简便的半导体模块。
另外，根据实施方式一涉及的半导体模块1，由于接合部33以及围绕壁部34是由单个铜层形成的，因此在半导体模块的制造过程中，即便是为了将接合材料(例如焊锡)溶融而投入高温炉中，围绕壁部34的长度也几乎不会发生变化。这样一来，由于第二基板30的重量就会被围绕壁部34分散掉，从而就不会使第二基板30的重量集中在功率元件部上。其所带来的结果就是，由于在半导体模块的制造过程中功率元件部变得不易损坏，所以实施方式一涉及的半导体模块1不仅是一种投入产出率高的半导体模块，而且也是一种即便是为了将接合材料(例如焊锡)溶融而投入高温炉中，也能够防止接合材料的厚度发生变化的高可靠性半导体模块。
另外，根据实施方式一涉及的半导体模块1，由于接合部33以及围绕壁部34是由单个铜层形成的，因此围绕壁部34就不会产生倾斜，这样一来，在半导体模块的制造过程中，第二基板30从平面看就不会朝θ方向转动，因此能够将第二基板30正确地定位。
【实施方式二】
实施方式二涉及的半导体模块2基本上与实施方式一涉及的半导体模块1具有同样的构成，但是其在围绕壁部的结构上不同于实施方式一涉及的半导体模块1。即，在实施方式二涉及的半导体模块2中，功率元件部如图3所示，围绕壁部34仅形成在从平面看将接合部33包围的位置中的规定部分上(在四分之三周上包围接合部33的位置上(参照图3(b))。即，围绕壁部34的形状从平面看呈“コ”字形。
像这样，实施方式二涉及的半导体模块2虽然在围绕壁部的结构上不同于实施方式一涉及的半导体模块1，但是其和实施方式一涉及的半导体模块1一样，由于是按照第一基板10、功率元件部(半导体元件20)、第二基板30a以及控制IC50的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC50的情况下，也能够在不需要在第一绝缘基板11的一个面上确保用于设置控制IC50所需的空间的情况下，将占用面积减小至比在第一绝缘基板11的一个面上将控制IC50与功率元件部并排配置时更小的程度。其结果就是，实施方式二涉及的半导体模块2同样是一种能够满足产品小型化要求的半导体模块。
另外，根据实施方式二涉及的半导体模块2，由于围绕壁部34a仅形成在从平面看将接合部33包围的位置中的规定部分上，因此在形成内侧树脂部40时，就能够经由“从平面看在包围接合部33的位置中未形成有围绕壁部34的位置上的被第一绝缘基板11与第二绝缘基板31夹住的空间”来注入树脂。
另外，由于实施方式二涉及的半导体模块2在围绕壁部的结构以外，具有与实施方式一涉及的半导体模块1同样的构成，因此也同样具有实施方式一涉及的半导体模块1所具有的相关效果。
【实施方式三】
实施方式三涉及的半导体模块3基本上与实施方式一涉及的半导体模块1具有同样的构成，但是其在功率元件部的结构上不同于实施方式一涉及的半导体模块1。即，在实施方式三涉及的半导体模块3中，功率元件部如图4所示，具有两个半导体元件20a、20b叠层的结构。
形成在三端子的半导体元件20a的一个面(下侧面)上的第一电极21a与半导体元件20b的第二电极21b电气连接，形成在另一个面(上侧面)上的第二电极22a与三端子的接合部33a电气连接，栅电极23a通过连接件70与控制IC50的控制信号输出端子52电气连接。
形成在两端子的半导体元件20b的一个面(下侧面)上的第一电极21b与第一导电体层12电气连接，形成在另一个面(上侧面)上的第二电极22b与三端子的半导体元件20a的第一电极21a电气连接。
像这样，实施方式三涉及的半导体模块3虽然在功率元件部的结构上不同于实施方式一涉及的半导体模块1，但是其和实施方式一涉及的半导体模块1一样，由于是按照第一基板10、功率元件部(半导体元件20a、半导体元件20b)、第二基板30以及控制IC50的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC50的情况下，也能够在不需要在第一绝缘基板11的一个面上确保用于设置控制IC50所需的空间的情况下，将占用面积减小至比在第一绝缘基板11的一个面上将控制IC50与功率元件部并排配置时更小的程度。其结果就是，实施方式三涉及的半导体模块3同样是一种能够满足产品小型化要求的半导体模块。
另外，根据实施方式三涉及的半导体模块3，由于功率元件部具有两个半导体元件20a、20b叠层的结构，因此与将两个半导体元件20a、20b并排配置在第一绝缘基板11的一个面上相比，就能够缩减占用面积。其结果就是，实施方式三涉及的半导体模块3是一种能够以高标准来满足产品小型化要求的半导体模块。
另外，由于实施方式三涉及的半导体模块3在功率元件部的结构以外，具有与实施方式一涉及的半导体模块1同样的构成，因此也同样具有实施方式一涉及的半导体模块1所具有的相关效果。
【实施方式四】
实施方式四涉及的半导体模块4基本上与实施方式三涉及的半导体模块3具有同样的构成，但是其在具备第二连接构件这一点上不同于实施方式三涉及的半导体模块3。即，如图5所示，实施方式四涉及的半导体模块4具备第二连接构件82，其一端被夹在两个半导体元件20a、20b之间，其另一端与后述的第五导电体层17电气连接。
第二连接构件82是通过对金属板(例如铝板)进行冲压·折弯加工后形成的。第二连接构件82的一端从平面看比两个半导体元件20a、20b大一圈，并且一端的上侧(第二基板侧)通过接合材料(焊锡)与半导体元件20a的第一电极21a接合，而一段的下侧(第一基板侧)则通过接合材料(焊锡)与半导体元件20b的第二电极22b接合。
第一基板10进一步具有被配置在与第一导电体层12以及外部连接用导电体层14中的任何一个隔开的位置上的第五导电体层17。第五导电体层17通过一部分未被外侧树脂部60覆盖或与外部连接用的端子(未图示)相连接，从而与外部电路(未图示)相连接。外部连接用导电体层14还通过后述的第三导电体层35以及焊线80与控制IC50的输入端子(或控制信号输出端子)电气连接。
围绕壁部34b仅形成在从平面看将接合部33b包围的位置中的规定部分上(在四分之三周上包围接合部33的位置上(参照图5(b))。即，围绕壁部34b的形状从平面看呈“コ”字形。第二连接构件82被形成为穿过“从平面看将接合部33b包围的位置中的未形成有围绕壁部34b的位置上的被第一绝缘基板11以及第二绝缘基板31b夹住的空间”。
像这样，实施方式四涉及的半导体模块4虽然在具备第二连接构件这一点上不同于实施方式三涉及的半导体模块3，但是其和实施方式三涉及的半导体模块3一样，由于是按照第一基板10、功率元件部(半导体元件20a、半导体元件20b)、第二基板30b以及控制IC50的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC50的情况下，也能够在不需要在第一绝缘基板11的一个面上确保用于设置控制IC50所需的空间的情况下，将占用面积减小至比在第一绝缘基板11的一个面上将控制IC50与功率元件部并排配置时更小的程度。其结果就是，实施方式四涉及的半导体模块4同样是一种能够满足产品小型化要求的半导体模块。
另外，根据实施方式四涉及的半导体模块4，由于所具备的第二连接构件82的一端被夹在两个半导体元件20a、20b之间，另一端与第五导电体层17电气连接，因此其是一种设计自由度很高的半导体模块。
另外，由于实施方式四涉及的半导体模块4在具备第二连接构件这一点以外，具有与实施方式三涉及的半导体模块3同样的构成，因此也同样具有实施方式三涉及的半导体模块3所具有的相关效果。
【实施方式五】
实施方式五涉及的半导体模块5基本上与实施方式三涉及的半导体模块3具有同样的构成，但是其在功率元件部的构成上不同于实施方式三涉及的半导体模块3。即，如图6所示，在实施方式五涉及的半导体模块5中，两个半导体元件20a、20c(第二基板侧的半导体元件20a、第一基板侧的半导体元件20c)均为：在一个面上具有第一电极21a、21c，在另一个面上具有第二电极22a、22c以及两个栅电极23a、23c的结构。
两个半导体元件20a、20c均被叠层为从平面看使半导体元件整体位于被围绕壁部34所划分的区域的内侧。
第二绝缘基板31具有分别对应两个半导体元件20a、20c的栅电极23a、23c的孔，并且在各个孔的内侧配置有连接件70a、70c。
像这样，实施方式五涉及的半导体模块5虽然在功率元件部的构成上不同于实施方式三涉及的半导体模块3，但是其和实施方式三涉及的半导体模块3一样，由于是按照第一基板10、功率元件部(半导体元件20a、20c)、第二基板30以及控制IC50的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC50的情况下，也能够在不需要在第一绝缘基板11的一个面上确保用于设置控制IC50所需的空间的情况下，将占用面积减小至比在第一绝缘基板11的一个面上将控制IC50与功率元件部并排配置时更小的程度。其结果就是，实施方式五涉及的半导体模块5同样是一种能够满足产品小型化要求的半导体模块。
另外，根据实施方式五涉及的半导体模块5，由于两个半导体元件20a、20c均被叠层为从平面看使半导体元件整体位于被围绕壁部34所划分的区域的内侧，因此就能够通过围绕壁部34从外部将功率元件部完全屏蔽，其结果就是，能够切实防止来自于功率元件部外部的噪声导致两个半导体元件20a、20c产生振动或失灵。
另外，由于实施方式五涉及的半导体模块5在功率元件部的结构以外，具有与实施方式三涉及的半导体模块3同样的构成，因此也同样具有实施方式三涉及的半导体模块3所具有的相关效果。
【实施方式六】
实施方式六涉及的半导体模块6基本上与实施方式五涉及的半导体模块5具有同样的构成，但是其在功率元件部的构成上不同于实施方式五涉及的半导体模块5。即，如图7所示，在实施方式六涉及的半导体模块6中，两个半导体元件中的一个(下侧的半导体元件20c)被叠层为从平面看使半导体元件20c的栅电极23c位于被围绕壁部34c所划分的区域的外侧。
实施方式六涉及的半导体模块6进一步包括第二连接构件82，其一端被夹在两个半导体元件20a、20c之间，另一端与第五导电体层17电气连接。第二连接构件82的一端从平面看比半导体元件20a、20b大一圈，并且一端的上侧(第二基板侧)通过接合材料(焊锡)与半导体元件20a的第一电极21a接合，而一端的下侧(第一基板侧)则通过接合材料(焊锡)与半导体元件20c的第二电极22c接合。
围绕壁部34c仅形成在从平面看将接合部33c包围的位置中的规定位置上(从平面看在半周上将接合部33包围的位置上(参照图7(b))。即，围绕壁部34c的形状从平面看呈“L”字形。
(下侧的)半导体元件20c的栅电极23c通过焊线80与被配置在与围绕壁部34c隔开的位置上的控制IC50b的控制信号输出端子52b电气连接。
在与围绕壁部34c的外边缘相垂直的规定方向上，栅电极23c最好被配置为：与从平面看被围绕壁部34c所划分的区域的外边缘隔开栅电极23c在该规定方向上的宽度的三倍的距离。通过这样的构成，将栅电极23c与控制IC50b的控制信号输出端子52c连接的焊线80与围绕壁部34c之间的直线距离就会对延长，从而不易发生短路。
像这样，实施方式六涉及的半导体模块6虽然在功率元件部的构成上不同于实施方式五涉及的半导体模块5，但是其和实施方式五涉及的半导体模块5一样，由于是按照第一基板10、功率元件部(半导体元件20a、20c)、第二基板30c以及控制IC50a的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC50a的情况下，也能够在不需要在第一绝缘基板11的一个面上确保用于设置控制IC50a所需的空间的情况下，将占用面积减小至比在第一绝缘基板11的一个面上将控制IC50a与功率元件部并排配置时更小的程度。其结果就是，实施方式六涉及的半导体模块6同样是一种能够满足产品小型化要求的半导体模块。
另外，根据实施方式六涉及的半导体模块6，由于被叠层为从平面看使半导体元件20c的栅电极23c位于被围绕壁部34c所划分的区域的外侧，因此即便是在功率元件部的大部分上具备有第二基板30c的情况下，也能够通过线径较小的焊线80来连接功率元件部的栅电极23c与控制IC50b的输出端子52b。其结果就是，实施方式六涉及的半导体模块6是一种能够通过控制IC50b来控制功率元件部(功率元件部的下侧的半导体元件20b)的半导体模块。
另外，由于实施方式六涉及的半导体模块6在功率元件部的结构以外，具有与实施方式五涉及的半导体模块5同样的构成，因此也同样具有实施方式五涉及的半导体模块5所具有的相关效果。
【实施方式七】
实施方式七涉及的半导体模块7基本上与实施方式一涉及的半导体模块1具有同样的构成，但是其在围绕壁部的构成上不同于实施方式一涉及的半导体模块1。即，如图8所示，在实施方式七涉及的半导体模块7中，围绕壁部34d是在与接合部33d隔开的状态下被形成的。
第一基板10进一步具有第四导电体层13，其在与第一绝缘基板11的一个面上的第一导电体层12隔开的位置上与围绕壁部34d接合，第四导电体层13上还形成有用于与围绕壁部34d嵌合的槽部16。
像这样，实施方式七涉及的半导体模块7虽然在围绕壁部的构成上不同于实施方式一涉及的半导体模块1，但是其和实施方式一涉及的半导体模块1一样，由于是按照第一基板10、功率元件部(半导体元件20)、第二基板30d以及控制IC50的顺序来叠层的，因此即便是在具备用于控制功率元件部的控制IC50的情况下，也能够在不需要在第一绝缘基板11的一个面上确保用于设置控制IC50所需的空间的情况下，将占用面积减小至比在第一绝缘基板11的一个面上将控制IC50与功率元件部并排配置时更小的程度。其结果就是，实施方式七涉及的半导体模块7同样是一种能够满足产品小型化要求的半导体模块。
另外，根据实施方式七涉及的半导体模块7，由于围绕壁部34d是在与接合部33d隔开的状态下被形成的，因此就能够通过围绕壁部34d来防止与其他导电体层或半导体元件之间发生短路，从而实施方式七涉及的半导体模块7也一种不易被击穿的半导体模块。
另外，由于实施方式七涉及的半导体模块7在围绕壁部的结构以外，具有与实施方式一涉及的半导体模块1同样的构成，因此也同样具有实施方式一涉及的半导体模块1所具有的相关效果。
以上，基于上述实施方式对本发明进行了说明，本发明并不仅限于上述实施方式。本发明能够在不脱离本发明主旨的范围内在各种各样的形态下实施，例如，可以为如下的变形。
(1)上述实施方式中所记载的构成要素的数量、材质、形状、位置、大小等仅为示例，因此能够在不损害本发明效果的范围内进行变更。
(2)在上述实施方式三至七中，虽然功率元件部具有两个半导体元件叠层的结构，但是本发明不仅限于此。例如，功率元件部也可以具有三个及以上的半导体元件叠层的结构。
(3)在上述实施方式二中，虽然两个半导体元件以错开90°的状态叠层，但是本发明不仅限于此。也可以是两个半导体元件以错开90°以外的角度的状态下叠层
(4)在上述各实施方式中，虽然第一基板为DCB基板，但是本发明不仅限于此。例如，第一基板也可以是一般的印刷基板或铝基板。
(5)在上述各实施方式中，虽然第二基板为DCB基板，但是本发明不仅限于此。例如，第二基板也可以是一般的印刷基板或铝基板。
(6)在上述各实施方式中，虽然第一基板的另一个面侧配置有散热用导电体层，但是本发明不仅限于此。也可以不配置散热用导电体层。
(7)在上述各实施方式中，虽然接合部以及围绕壁部是通过对单个导电体层进行蚀刻来形成的，但是本发明不仅限于此。也可以是另行形成接合部以及围绕壁部，并且将其与第二绝缘基板31接合从而最终形成接合部以及围绕壁部。
(8)在上述各实施方式中，虽然在第四导电体层上形成有用于嵌合围绕壁部的槽部，但是本发明不仅限于此。第四导电体层上也可以不形成有槽部。
符号说明
1、2、3、4、5、6、7、8、9…半导体模块；10…第一基板；11…第一绝缘基板；12…第一导电体层；13…第四导电体层；14…外部连接用导电体层；15…散热用导电体层；16…槽部；17…第五导电体层；20、20a、20c…(三端子的)半导体元件；20b…(两端子的)半导体元件；21、21a、21b、21c…第一电极；22、22a、22b、22c…第二电极；23、23a、23c…栅电极；30、30a、30b、30c、30d…第二基板；31…第二绝缘基板；32、32a、32b、32c、32d…第二导电体层；33、33a、33b、33c、33d…接合部；34、34a、34b、34c、34d…围绕壁部；35…第三导电体层；36…孔；37…平坦部；40…内侧树脂部；50、50a、50b…控制IC；52、52a、52b…控制信号输出端子；60…外侧树脂部；70…(栅电极连接用的)连接件；80…焊线；82…第二连接构件；S…接合材料。

Claims (13)

1.一种半导体模块，包括：
第一基板，具有第一绝缘基板以及设置在所述第一绝缘基板的一个面上的第一导电体层；
功率元件部，其一个面上具有第一电极，其另一个面上具有第二电极以及栅电极，并且所述第一电极与所述第一导电体层电气连接；
第二基板，具有第二绝缘基板、设置在所述第二绝缘基板的一个面上的第二导电体层以及设置在所述第二绝缘基板的另一个面上的第三导电体层，所述第二绝缘基板具有配置在与所述栅电极相对应的位置上的孔，所述第二导电体层具有与所述第二电极接合的接合部以及从平面看在将所述接合部包围的位置上以上端面比所述第二电极与所述接合部之间的接合面更突出的状态下形成的围绕壁部，并且通过所述围绕壁部与所述第一基板相接触；
内侧树脂部，由配置在通过所述围绕壁部划分的，并且，被所述第一绝缘基板以及所述第二绝缘基板夹住的空间中的树脂所构成；
控制IC，配置在所述第三导电体层上；以及
外侧树脂部，由在所述第一基板的一个面侧的，被配置为覆盖所述第二基板以及所述控制IC的树脂所构成，
按照所述第一基板、所述功率元件部、所述第二基板以及所述控制IC的顺序叠层，
其特征在于：
所述第二绝缘基板的孔的内侧配置有连接构件，
所述栅电极通过所述连接构件与所述控制IC的控制信号输出端子电气连接。
2.根据权利要求1所述的半导体模块，其特征在于：
其中，所述围绕壁部形成在从平面看将所述接合部整周包围的位置上。
3.根据权利要求1所述的半导体模块，其特征在于：
其中，所述围绕壁部仅形成在从平面看将所述接合部包围的位置中的规定部分上。
4.根据权利要求1至3中任意一项所述的半导体模块，其特征在于：
其中，所述围绕壁部在与所述接合部相连续的状态下形成，
所述第一基板进一步具有在所述第一绝缘基板的一个面上的与所述第一导电体层隔开的位置上与所述围绕壁部接合的第四导电体层，
所述第四导电体层通过所述围绕壁部以及所述接合部与所述第二电极电气连接。
5.根据权利要求4所述的半导体模块，其特征在于：
其中，所述第四导电体层上形成有用于嵌合所述围绕壁部的槽部。
6.根据权利要求1至3中任意一项所述的半导体模块，其特征在于
其中，所述围绕壁部在与所述接合部隔开的状态下形成。
7.根据权利要求6所述的半导体模块，其特征在于：
其中，所述第一基板进一步具有在所述第一绝缘基板的一个面上的与所述第一导电体层隔开的位置上与所述围绕壁部接合的第四导电体层，
所述第四导电体层上形成有用于嵌合所述围绕壁部的槽部。
8.根据权利要求1至7中任意一项所述的半导体模块，其特征在于：
其中，所述功率元件部由一个半导体元件构成，
所述一个半导体元件的一个面上具有第一电极，另一个面上具有第二电极以及栅电极。
9.根据权利要求1至7中任意一项所述的半导体模块，其特征在于：
其中，所述功率元件部具有多个半导体元件叠层的结构，
所述多个半导体元件中的至少一个半导体元件的一个面上具有第一电极，另一个面上具有第二电极以及栅电极。
10.根据权利要求1至7中任意一项所述的半导体模块，其特征在于：
其中，所述功率元件部具有多个半导体元件叠层的结构，
所述第一基板进一步具有被配置在与所述第一导电体层隔开的位置上的第五导电体层，
所述半导体模块的一端被夹在所述多个半导体元件中的两个半导体元件之间，并且，另一端上进一步具有与所述第五导电体层电气连接的第二连接构件。
11.根据权利要求1至7中任意一项所述的半导体模块，其特征在于：
其中，所述功率元件部具有多个半导体元件叠层的结构，
所述多个半导体元件中的至少两个半导体元件均为一个面上具有第一电极，另一个面上具有第二电极以及栅电极的结构，
所述至少两个半导体元件均被叠层为使半导体元件整体位于从平面看通过所述围绕壁部划分的区域的内侧。
12.根据权利要求1至7中任意一项所述的半导体模块，其特征在于：
其中，所述功率元件部具有多个半导体元件叠层的结构，
所述多个半导体元件中的至少两个半导体元件均为一个面上具有第一电极，另一个面上具有第二电极以及栅电极的结构，
所述至少两个半导体元件中的至少一个被叠层为使半导体元件的所述栅电极位于从平面看通过所述围绕壁部划分的区域的外侧。
13.根据权利要求1至12中任意一项所述的半导体模块，其特征在于：
其中，所述接合部以及所述围绕壁部由单个铜层形成。
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