CN107527791B - 半导体装置的制造方法和半导体制造装置 - Google Patents

半导体装置的制造方法和半导体制造装置 Download PDF

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CN107527791B
CN107527791B CN201710469560.5A CN201710469560A CN107527791B CN 107527791 B CN107527791 B CN 107527791B CN 201710469560 A CN201710469560 A CN 201710469560A CN 107527791 B CN107527791 B CN 107527791B
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gas
roughness
silicon
film
silicon film
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CN107527791A (zh
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冈田充弘
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Tokyo Electron Ltd
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Abstract

提供一种半导体装置的制造方法和半导体制造装置。在向表面形成有凹部的被处理体供给含有硅的成膜气体来用硅填充凹部内以形成硅层时，能够防止硅层中含有空隙或形成接缝。向被处理体(晶圆W)供给成膜气体，来在被处理体的表面的凹部(42)内形成硅膜(44)。接着，向被处理体供给包含卤素气体和粗糙抑制气体的处理气体，对处理气体提供热能使其活性化，对形成于凹部(42)的侧壁的硅膜(44)进行蚀刻来扩大凹部(42)的开口宽度，其中，卤素气体用于对硅膜(44)进行蚀刻，粗糙抑制气体用于抑制被卤素气体蚀刻后的硅膜(44)的表面粗糙。然后，向被处理体供给成膜气体，使硅堆积于残留在凹部(42)内的硅膜上来填充硅。

Description

半导体装置的制造方法和半导体制造装置
技术领域
本发明涉及一种向被处理体供给含有硅的成膜气体来在形成于该被处理体的表面的凹部内填充硅的技术领域。
背景技术
有时例如为了形成半导体装置的逻辑元件而进行以下处理：通过向作为基板的半导体晶圆(以下记载为晶圆)的表面供给含硅的成膜气体，来对在该晶圆的表面朝向下方形成的凹部内填充硅，由此形成硅层。
存在以下情况：上述的凹部形成为，内侧的侧壁的顶部鼓出，凹部内的靠上部侧的开口宽度比靠下部侧的开口宽度小。当针对这种形状的凹部比较长时间地供给上述的成膜气体时，在硅向凹部内的填充结束之前凹部的上部就被堵塞，由此有可能导致在形成于凹部内的硅层中含有空隙，因此有时通过被称为DED(Deposition Etch Deposition：沉积蚀刻沉积)的方式来向凹部填充硅。在该方式中，依次进行第一次的基于成膜气体的供给的成膜处理、基于蚀刻气体的供给的蚀刻处理、第二次的基于成膜气体的供给的成膜处理。此外，专利文献1中记载了如下处理：使作为氯气和溴化氢气体的混合气体的蚀刻气体等离子化来对晶圆表面的硅进行蚀刻。
专利文献1：日本特许第3093445号(第0022段)
发明内容
发明要解决的问题
当更详细地说明上述的DED方式时，第一次的成膜处理在上述凹部的上部的堵塞发生之前结束，成为在凹部内形成有硅膜的状态。进行接下来的蚀刻处理，以扩大凹部内的靠上部侧的开口宽度且在凹部内残留硅膜。在这样进行蚀刻之后的第二次的成膜处理中，抑制上述空隙的形成并在凹部内填充硅。
为了进行如上述那样的蚀刻处理，使用对硅的反应性比较大的气体、例如氯气来作为蚀刻气体，以使得在到达凹部的下方侧之前在凹部的上部侧就与硅膜发生反应。但是，由于利用该氯气进行蚀刻而硅膜表面的粗糙变得比较大。由于在发明的实施方式的项目中详细地记述，因此在此简单地进行说明，当在第二次的成膜处理时在像这样粗糙比较大的硅膜的表面堆积硅时，担心在形成于凹部内的硅层中含有微小的空隙或形成接缝。而且，在对该硅层进行各向异性蚀刻时，形成有空隙、接缝的部位与其它部位相比硅的密度低，因此导致大幅地进行蚀刻。
本发明是在这种背景下完成的，其目的在于提供一种在向表面形成有凹部的被处理体供给含有硅的成膜气体来用硅填充凹部内以形成硅层时能够防止该硅层中含有空隙或形成接缝的技术。
用于解决问题的方案
本发明的半导体装置的制造方法的特征在于，包括以下工序：向被处理体供给含有硅的成膜气体，来在形成于该被处理体的表面的凹部内形成硅膜；接着，向所述被处理体供给包含卤素气体和粗糙抑制气体的处理气体，所述卤素气体用于对所述硅膜进行蚀刻，所述粗糙抑制气体用于抑制被该卤素气体蚀刻后的硅膜的表面粗糙；蚀刻工序，对该处理气体提供热能使其活性化，对形成于所述凹部的侧壁的所述硅膜进行蚀刻来扩大该凹部的开口宽度；以及然后，向所述被处理体供给所述成膜气体，使硅堆积于残留在所述凹部内的所述硅膜上，来对该凹部内填充硅。
本发明的半导体制造装置的特征在于，具备：真空容器，其用于收纳被处理体；加热部，其对所述被处理体进行加热；成膜气体供给部，其向所述处理容器内供给含有硅的成膜气体；蚀刻气体供给部，其向所述处理容器内供给用于对硅膜进行蚀刻的卤素气体；粗糙抑制气体供给部，其供给粗糙抑制气体，该粗糙抑制气体用于抑制被该卤素气体蚀刻后的硅膜的表面粗糙；以及控制部，其输出控制信号以实施以下步骤：向被处理体供给所述成膜气体，来在形成于该被处理体的表面的凹部内形成硅膜；接着，向所述被处理体供给包含所述卤素气体和所述粗糙抑制气体的处理气体；蚀刻步骤，对该处理气体提供热能使其活性化，对形成于所述凹部的侧壁的所述硅膜进行蚀刻来扩大该凹部的开口宽度；然后，向所述被处理体供给所述成膜气体，使硅堆积于残留在所述凹部内的所述硅膜上，来对该凹部内填充硅。
发明的效果
根据本发明，对包含作为蚀刻气体的卤素气体和用于使蚀刻后的膜的表面平坦化的粗糙抑制气体的处理气体供给热能，来对形成于被处理体的凹部内的硅膜进行蚀刻，之后供给成膜气体使硅堆积于所残留的硅膜上来对凹部内填充硅。由此，能够提高在该凹部内生长的硅膜的表面的平坦性。其结果，能够抑制由该硅膜形成的硅层包含空隙或者在该硅层形成接缝。
附图说明
图1是本发明的半导体制造装置所涉及的纵型热处理装置的纵剖侧视图。
图2是被所述纵型热处理装置处理的晶圆的纵剖侧视图。
图3是被所述纵型热处理装置处理的晶圆的纵剖侧视图。
图4是被所述纵型热处理装置处理的晶圆的纵剖侧视图。
图5是被所述纵型热处理装置处理的晶圆的纵剖侧视图。
图6是被所述纵型热处理装置处理的晶圆的纵剖侧视图。
图7是被所述纵型热处理装置处理的晶圆的纵剖侧视图。
图8是接受比较例的处理后的晶圆的纵剖侧视图。
图9是接受比较例的处理后的晶圆的纵剖侧视图。
图10是接受比较例的处理后的晶圆的纵剖侧视图。
图11是示出评价试验的结果的曲线图。
图12是示出评价试验的结果的曲线图。
图13是示出评价试验的结果的曲线图。
附图标记说明
W：晶圆；1：纵型热处理装置；11：反应管；19：加热器；21、31：气体导入管；23A～23E、32：气体供给源；24A～24E、33：气体供给机构；27：阀；30：控制部。
具体实施方式
参照图1的纵剖侧视图来说明作为本发明所涉及的半导体制造装置的一个实施方式的纵型热处理装置1。该纵型热处理装置1为了在作为基板的晶圆W形成半导体装置的逻辑元件，进行在背景技术的项目以及发明要解决的问题的项目中说明的DED。也就是说，针对晶圆W进行成膜处理和蚀刻处理。该成膜处理是基于热CVD(Chemical VaporDeposition：化学气相沉积)的处理，蚀刻处理是向蚀刻气体供给热能来进行的反应性气体蚀刻。
纵型热处理装置1具备反应管11，该反应管11是长边方向朝向垂直方向的呈大致圆筒状的真空容器。反应管11具有由内管12和有顶的外管13构成的双层管构造，该外管13形成为覆盖该内管12并且与内管12之间具有固定的间隔。内管12和外管13由耐热材料、例如石英形成。
在外管13的下方配置有形成为筒状的由不锈钢(SUS)形成的歧管14。歧管14与外管13的下端气密性地连接。另外，内管12被支承于支承环15，该支承环15从歧管14的内壁突出并且与歧管14一体地形成。
在歧管14的下方配置盖体16，盖体16以通过舟升降机10而在上升位置与下降位置之间升降自如的方式构成。在图1中，示出了位于上升位置的状态的盖体16，在该上升位置处，盖体16将反应管11的靠歧管14的下方侧的开口部17封闭，使该反应管11内成为气密状态。在盖体16上载置有例如由石英形成的晶圆舟3。晶圆舟3构成为能够将作为被处理体的很多个晶圆W在垂直方向上隔开规定距离地水平保持。在反应管11的周围以包围反应管11的方式设置隔热体18，在隔热体18的内壁面例如设置有作为加热部的由电阻发热体形成的加热器19，能够对反应管11内进行加热。
在歧管14上，在上述的支承环15的下方侧的位置贯通有处理气体导入管21和吹扫气体导入管31，各气体导入管21、31的下游端被配设为能够向内管12内的晶圆W供给气体。例如处理气体导入管21的上游侧以分支方式形成分支路径22A～22E，分支路径22A的上游端与二丙基氨基硅烷(DIPAS)气体的供给源23A相连接，分支路径22B的上游端与乙硅烷(Si2H6)气体的供给源23B相连接，分支路径22C的上游端与甲硅烷(SiH4)气体的供给源23C相连接，分支路径22D的上游端与氯(Cl2)气体的供给源23D相连接，分支路径22E的上游端与溴化氢(HBr)气体的供给源23E相连接。而且，在分支路径22A～22E上分别设置有气体供给机构24A～24E。气体供给机构24A～24E各自具备阀、质量流量控制器，构成为能够分别对从气体供给源23A～23E向处理气体导入管21供给的处理气体的流量进行控制。
SiH4气体是用于在晶圆W上形成硅(Si)膜的成膜气体，气体供给源23C和气体供给机构24C构成成膜气体供给部。Cl2气体是用于对Si膜进行蚀刻的蚀刻气体，气体供给源23D和气体供给机构24D构成蚀刻气体供给部。HBr气体是用于提高该被蚀刻的Si膜的表面的平坦性的粗糙抑制气体，气体供给源23E和气体供给机构24E构成粗糙抑制气体供给部。
另外，吹扫气体导入管31的上游侧与作为吹扫气体的氮(N2)气体的供给源32相连接。在吹扫气体导入管31上设置有气体供给机构33。气体供给机构33与气体供给机构24A～24E同样地构成，用于控制向导入管31的下游侧流过的吹扫气体的流量。
另外，在歧管14上，在支承环15的上方的侧面形成有排气口25，内管12中产生的废气等通过在内管12与外管13之间形成的空间向该排气口25排出。排气口25与排气管26气密性地连接。在排气管26上，从其上游侧起依次设置有阀27和真空泵28。通过调整阀27的开度，反应管11内的压力被控制为期望的压力。
对该纵型热处理装置1设置有由计算机构成的控制部30，控制部30具备程序。该程序嵌入有步骤群使得能够对纵型热处理装置1的各部输出控制信号来控制该各部的动作，以能够对晶圆W进行后述的一系列的处理动作。具体地说，输出控制信号，以控制利用舟升降机10进行的盖体16的升降、加热器19的输出(即晶圆W的温度)、阀27的开度、利用气体供给机构24A～24E、33向反应管11内供给各气体的供给流量等。该程序例如以保存在硬盘、软盘、光盘、磁光盘(MO)、存储卡等存储介质中的状态保存到控制部30中。
接着，参照图2的纵剖侧视图来说明在该纵型热处理装置1中被处理的晶圆W的表面部。晶圆W的表面部具备硅(Si)层41。在该Si层41形成有很多的凹部42，构成各凹部42的侧壁的顶部沿横向鼓出。因而，凹部42的靠上部侧的开口宽度L2比靠下部侧(底部侧)的开口宽度L1小。另外，Si层41的表层被氧化而构成为氧化硅膜43。而且，在图中，将凹部42内的高度设为H1来表示，凹部42的纵横比(高度H1/靠上部侧的开口宽度L2)例如为2以上。
接着，参照示出晶圆W的纵剖侧面变化的情形的图3～图6来说明由纵型热处理装置1实施的处理。首先，图2中说明的晶圆W通过未图示的搬送机构被搬送至晶圆舟3并被保持于晶圆舟3。之后，晶圆舟3被配置在位于下降位置的盖体16上。然后，盖体16朝向上升位置上升，晶圆舟3被搬入到反应管11内，反应管11的开口部17被盖体16封闭，从而该反应管11内成为气密状态。接着，在向反应管11内供给吹扫气体的同时对反应管11内进行排气而成为规定压力的真空环境，并且由加热器19进行加热以使得晶圆W成为规定的温度。
之后，停止供给吹扫气体，向反应管11内供给DIPAS气体。该DIPAS气体在晶圆W的氧化硅膜43的表面堆积，以覆盖氧化硅膜43的方式形成第一晶种层。然后，停止供给DIPAS气体，向反应管11内供给吹扫气体来从反应管11内吹扫DIPAS气体，之后向反应管11内供给Si2H6气体。该Si2H6气体在第一晶种层上堆积，以覆盖该第一晶种层的方式形成第二晶种层。之后，停止供给Si2H6气体，向反应管11内供给吹扫气体，来从反应管11内吹扫Si2H6气体。
之后，停止供给吹扫气体，向反应管11内供给SiH4气体。SiH4气体在第二晶种层上堆积，Si膜44以覆盖第二晶种层的方式形成于晶圆W的整个表面。然后，继续堆积SiH4气体，来使Si膜44生长。也就是说，Si膜44的膜厚上升。而且，在例如图3所示那样凹部42内的上部侧被该Si膜44封闭之前，停止供给SiH4气体。此外，关于第一晶种层和第二晶种层，由于其厚度微小，因此在包括该图3在内的各图中省略了表示。
在停止供给上述的SiH4气体之后，向反应管11内供给吹扫气体来从反应管11内吹扫SiH4气体。进行该吹扫，另一方面，例如使晶圆W的温度成为250℃～450℃、例如400℃，并且使反应管11内的压力例如成为2Pa(0.15Torr)～5.33×103Pa(4Torr)。然后，向处理气体导入管21供给Cl2气体和HBr气体，Cl2气体和HBr气体在该处理气体导入管21内被混合后向反应管11内的晶圆W供给(图3)。为了同时可靠地得到后述的利用Cl2气体的蚀刻效果和利用HBr气体抑制Si膜44的粗糙的抑制效果，例如以HBr气体的流量/Cl2气体的流量为1/4以上的方式进行供给。更具体地说，例如以Cl2气体为1000sccm、HBr气体为250sccm～1000sccm分别向反应管11内供给Cl2气体和HBr气体(图4)。
Cl2气体为Si膜44的蚀刻气体，通过在反应管11内被加热而被供给热能，从而产生Cl的自由基等活性种。关于该活性种，由于对Si的反应性比较高，因此在到达晶圆W的凹部42内的下部之前就与凹部42的外侧的Si及凹部42内的靠上部侧的Si发生反应而产生SiCl4(四氯化硅)，从而Si膜44被蚀刻。因而，以凹部42内的靠上部侧的Si膜44的膜厚的减少比凹部42内的靠下部侧的Si膜44的膜厚的减少大的方式进行蚀刻，从而凹部42内的靠上部侧的开口宽度扩大。另外，从1摩尔的Cl2生成2摩尔的Cl自由基。也就是说生成比较多的活性种，因此能够使该开口宽度的扩大以比较大的速度进行。
另外，HBr气体是用于使被该Cl2气体蚀刻的Si膜44的表面平坦化的平坦化用的处理气体。如在发明要解决的问题的项目中记述的那样，当向晶圆W供给HBr气体和Cl2气体中的Cl2气体进行蚀刻时，蚀刻结束后的Si膜44的表面粗糙比较大，但是如在后述的评价试验中说明的那样，通过向晶圆W供给HBr气体和Cl2气体进行蚀刻，能够抑制Si膜44的表面粗糙。认为能够像这样抑制Si膜44的表面粗糙是由于加热后的HBr气体本身对Si膜44产生作用、或者HBr气体被加热而产生的H自由基和Br自由基中的H自由基与从上述Cl2气体产生的Cl自由基发生反应所生成的HCl(盐酸)对Si膜44产生作用。
然后，停止向反应管11内供给Cl2气体和HBr气体来结束蚀刻处理(图5)。如上述那样，在蚀刻处理中，在凹部42内的下部侧，Si膜44的蚀刻被抑制，因此在该蚀刻结束时，如图5所示，在凹部42内残留有Si膜44。而且，如上述的那样，这样残留的Si膜44的表面的平坦性比较高。
供给吹扫气体来从反应管11中去除混合气体，另一方面，使晶圆W的温度成为规定的温度并且使反应管11内成为规定的真空压力。然后，停止供给吹扫气体，向反应管11内供给SiH4气体并在Si膜44上堆积SiH4气体，来使Si膜44生长。由于对平坦性比较高的Si膜44的表面像上述那样堆积气体，因此如图6所示那样生长中的Si膜44的表面的平坦性也比较高。Si膜44的生长进一步进行，在凹部42内从该凹部的侧面生长的Si膜44的表面彼此接合而形成Si层45(图7)。相互接合的Si膜44的表面的平坦性比较高，因此能够抑制该接合部包含空隙或形成接缝。
之后，停止向反应管11内供给SiH4气体来结束成膜处理。然后，供给吹扫气体来从反应管11中去除SiH4气体。另外，另一方面，使晶圆W降温。接着，在使盖体16下降而将晶圆舟3从反应管11搬出之后，通过未图示的搬送机构将晶圆W从晶圆舟3中取出。在用于制造半导体装置的逻辑元件的后面的工艺中，例如形成于凹部42内的Si层45被朝向下方进行各向异性蚀刻而被去除。以例如构成凹部42的底部的Si层41不被蚀刻的方式进行该Si层45的蚀刻。而且，在进行该Si层45的蚀刻时，在Si层45没有形成空隙和接缝，因此通过在各部均一性高地进行该Si层45的蚀刻，能够防止Si层41被蚀刻。
为了明确地示出通过上述的图3～图7说明的处理(以下有时记载为实施例的处理)所得到的效果，使用示出晶圆W的纵剖侧面变化的情形的图8～图10来说明比较例的处理。在该比较例的处理中，在进行Si膜44的蚀刻时，向晶圆W只供给Cl2气体来代替向晶圆W供给Cl2气体和HBr气体的混合气体，除此以外是与实施例的处理相同的处理。首先，在形成上述的第一晶种层和第二晶种层之后形成Si膜44。然后，向晶圆W供给Cl2气体来对Si膜44进行蚀刻。图8示出该蚀刻结束时的晶圆W，如已经记述的那样，残留的Si膜44的表面粗糙比较大。此外，在该图5和上述的图8中，在箭头前端的虚线的圆框内示出了放大后的Si膜44的剖面。
之后，向晶圆W供给SiH4气体，在残留于凹部42内的Si膜44的表面堆积SiH4气体，来使该Si膜44生长，但是由于生长前的Si膜44的粗糙大，因此如图9所示那样生长中的Si膜44的表面的平坦性也变得比较低。其结果，当从凹部42内的侧面生长的Si膜44的表面彼此接合而在凹部42内形成了Si层45时，在该接合部形成微小的空隙46和接缝(图10)。
如参照以上的比较例的处理而明确可知的那样，根据上述实施例的处理，通过向晶圆W供给Cl2气体和HBr气体进行蚀刻，能够提高凹部42内残留的Si膜44的平坦性。由此，在使SiH4气体堆积于Si膜44上来在凹部42内形成Si层45时，能够抑制Si层45中形成空隙和接缝。
将在通过上述实施例的处理而如图5所示那样进行蚀刻之后且向凹部42内嵌入硅之前的Si膜44的表面粗糙度Ra设为A1。另外，将在通过比较例的处理而如图8所示那样进行蚀刻之后且向凹部42内嵌入硅之前的Si膜44的表面粗糙度Ra设为B1。例如A1/B1优选为0.8以下。此外，根据进行某个实验所得到的结果，A1为0.18nm，B1为0.25nm。也就是说，A1/B1为0.72。
此外，本发明并不限于上述实施例的处理，能够以各种变形方式进行。例如在上述实施例的处理中，Cl2气体和HBr气体在向反应管11供给之前相互混合，但是也可以是，Cl2气体和HBr气体被从不同的路径供给至反应管11内，并且这些气体在晶圆W表面混合。另外，在上述的处理中，在氧化硅膜43上进行成膜处理而形成了Si膜44之后，通过将蚀刻处理、成膜处理各进行一次来将硅嵌入凹部42，但是也可以在形成Si膜44之后，通过重复多次进行蚀刻处理和成膜处理来将硅嵌入凹部42。
并且，在通过已经记述的HCl的作用来使Si膜44的表面平坦化的情况下，也可以代替HBr气体而将该HCl气体作为粗糙抑制气体供给到反应管11内，来利用Cl2气体进行蚀刻处理。另外，HI(碘化氢)气体与HBr气体同样，是由卤素和氢构成的化合物，Br(溴)、I(碘)的各电负性示出彼此相近的值，因此HBr气体、HI气体示出相互近似的性质。因而，认为用该HI气体代替HBr气体供给到反应管11内也能够得到与供给HBr气体的情况同样的效果，因此能够将HI气体作为粗糙抑制气体来供给。另外，作为蚀刻所使用的卤素气体，不限于Cl2气体，例如也可以是F2(氟)气体、Br2(溴)气体。
(评价试验)
对与本发明关联地进行的评价试验进行说明。使用上述的纵型热处理装置1对形成于晶圆W的表面的Si膜44进行了与上述实施例的处理中的蚀刻处理同样的蚀刻处理。作为处理条件，将晶圆W的温度设定为400℃，将反应管11内的压力设定为26.6Pa，将Cl2气体的流量设定为1000sccm。而且，在每次进行处理时，将HBr气体的流量在0sccm～1000sccm的范围内进行了变更。针对被进行了蚀刻处理后的各晶圆W，测定了Si膜44的蚀刻率((每单位时间内的蚀刻量))、晶圆W上残留的Si膜44的表面的Haze(雾度)、WinW。
通过对由暗视野检查装置向晶圆W照射激光并由该装置内的受光部接收散射的光而生成的低频信号进行测定，来进行了上述雾度的测定。另外，通过在晶圆W的面内的多个部位测定蚀刻率并按照下述的式1进行计算，来计算上述的WinW，该WinW的值的绝对值越低则表示晶圆W的面内的蚀刻的均一性越高。
WinW(±％)＝±(蚀刻率的最大值-蚀刻率的最小值)/(蚀刻率的平均值)×100/2···式1
图11～图13是示出评价试验的结果的曲线图。各图的曲线图均是横轴表示HBr气体的流量(单位：sccm)。图11的曲线图的纵轴表示蚀刻率(单位：
Figure BDA0001326756560000102
Figure BDA0001326756560000103
)，图12的曲线图的纵轴表示雾度(单位：ppm)，图13的曲线图的纵轴表示WinW(单位：±％)。如图11的曲线图所示，在被设定为HBr气体的流量的0sccm～1000sccm的范围内，HBr气体的流量越大则蚀刻率越低。但是，HBr气体为0sccm时的蚀刻率为
Figure BDA0001326756560000101
HBr气体为1000sccm时的蚀刻率为
Figure BDA0001326756560000111
这些蚀刻率之间观测不到大的差。也就是说，可知即使将HBr气体与Cl2气体一同供给，Cl2气体对Si膜44的蚀刻作用也不会受到大的影响。
另外，根据图12的曲线图可知，HBr气体的流量越大则雾度的值示出越小的值。即，HBr气体的流量越大，则蚀刻后的Si膜44的平坦性越高。具体地说，HBr气体的流量为0sccm时的雾度为0.809ppm，HBr气体的流量为1000sccm时的蚀刻率为0.440ppm。因而，根据该评价试验的结果确认出，通过将HBr气体与Cl2气体一同供给进行蚀刻，能够提高Si膜44的平坦性。另外，根据曲线图，在HBr气体的流量为250sccm以上、也就是说HBr气体的流量/Cl2气体的流量为1/4以上的范围内，雾度的值不会大幅地变化，为0.5ppm以下。也就是说，在该范围内，能够将雾度抑制得特别低。
如上所述，在该评价试验中，HBr气体的流量为0sccm时的雾度为大致0.8ppm，HBr气体的流量为250sccm～1000sccm时的雾度为大致0.5ppm。基于该结果，当将在上述实施例的处理中Si膜44的蚀刻处理结束后的该Si膜44的表面的雾度设为Appm、并且将在比较例的处理中第一次的Si膜44的成膜处理和Si膜44的蚀刻处理结束后的该Si膜44的表面的雾度设为Bppm时，A/B＝0.5/0.8＝0.625，此时Si膜44的表面粗糙被抑制得达到大致界限，因此在A/B为0.8以下时，可以说充分地抑制了Si膜44的表面的粗糙度，在A/B为0.7以下时，可以说进一步充分地抑制了Si膜44的表面的粗糙度。在上述实施例的处理中，更优选的是供给HBr气体以成为上述那样的值。
还如图13的曲线图所示，供给了HBr气体的情况下的WinW的值比HBr气体的流量为0sccm的情况下、也就是说不供给HBr气体的情况下的WinW的值小。也就是说，通过供给HBr气体，蚀刻的面内的均一性有所提高。具体地说，HBr气体为0sccm时的WinW为3.19％，HBr气体为1000sccm时的WinW为2.58％。因而，确认出通过将HBr气体与Cl2气体一同供给到晶圆W进行蚀刻，除了得到抑制Si膜44的粗糙的效果以外，还能够得到蚀刻的面内均一性也提高的效果。

Claims (7)

1.一种半导体装置的制造方法，其特征在于，包括以下工序：
向被处理体供给含有硅的成膜气体，来在形成于该被处理体的表面的凹部内形成硅膜；
接着，向所述被处理体供给包含卤素气体和粗糙抑制气体的处理气体，所述卤素气体用于对所述硅膜进行蚀刻，所述粗糙抑制气体用于抑制被该卤素气体蚀刻后的硅膜的表面粗糙；
蚀刻工序，加热该处理气体使其活性化，对形成于所述凹部的侧壁的所述硅膜进行蚀刻来扩大该凹部的开口宽度；以及
然后，向所述被处理体供给所述成膜气体，使硅堆积于残留在所述凹部内的所述硅膜上，来对该凹部内填充硅，
其中，所述粗糙抑制气体是由氢和卤素构成的化合物，通过加热后的所述粗糙抑制气体对硅膜产生作用、或者所述粗糙抑制气体被加热而产生的氢自由基与从所述卤素气体产生的卤素自由基发生反应所生成的反应产物对硅膜产生作用，来抑制被所述卤素气体蚀刻后的硅膜的表面粗糙。
2.根据权利要求1所述的半导体装置的制造方法，其特征在于，
所述卤素气体是氯气。
3.根据权利要求1或2所述的半导体装置的制造方法，其特征在于，
所述蚀刻工序包含将所述被处理体加热至250℃～450℃的工序。
4.根据权利要求1或2所述的半导体装置的制造方法，其特征在于，
在所述处理气体中，以所述粗糙抑制气体的流量/所述卤素气体的流量为1/4以上的方式包含该粗糙抑制气体和卤素气体。
5.根据权利要求1或2所述的半导体装置的制造方法，其特征在于，
所述粗糙抑制气体是溴化氢气体。
6.根据权利要求1或2所述的半导体装置的制造方法，其特征在于，
通过所述蚀刻工序蚀刻后的所述硅膜的表面的雾度值/将构成所述处理气体的卤素气体和粗糙抑制气体中的仅所述卤素气体供给至所述被处理体来进行所述蚀刻工序时的所述硅膜的表面的雾度值为0.8以下。
7.一种半导体制造装置，其特征在于，具备：
真空容器，其用于收纳被处理体；
加热部，其对所述被处理体进行加热；
成膜气体供给部，其向处理容器内供给含有硅的成膜气体；
蚀刻气体供给部，其向所述处理容器内供给用于对硅膜进行蚀刻的卤素气体；
粗糙抑制气体供给部，其供给粗糙抑制气体，该粗糙抑制气体用于抑制被该卤素气体蚀刻后的硅膜的表面粗糙；以及
控制部，其输出控制信号以实施以下步骤：向被处理体供给所述成膜气体，来在形成于该被处理体的表面的凹部内形成硅膜；接着，向所述被处理体供给包含所述卤素气体和所述粗糙抑制气体的处理气体；蚀刻步骤，加热该处理气体使其活性化，对形成于所述凹部的侧壁的所述硅膜进行蚀刻来扩大该凹部的开口宽度；然后，向所述被处理体供给所述成膜气体，使硅堆积于残留在所述凹部内的所述硅膜上，来对该凹部内填充硅，
其中，所述粗糙抑制气体是由氢和卤素构成的化合物，通过加热后的所述粗糙抑制气体对硅膜产生作用、或者所述粗糙抑制气体被加热而产生的氢自由基与从所述卤素气体产生的卤素自由基发生反应所生成的反应产物对硅膜产生作用，来抑制被所述卤素气体蚀刻后的硅膜的表面粗糙。
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KR102199233B1 (ko) 2021-01-06
CN107527791A (zh) 2017-12-29
JP6693292B2 (ja) 2020-05-13

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