CN107195532A - 半导体制造方法 - Google Patents
半导体制造方法 Download PDFInfo
- Publication number
- CN107195532A CN107195532A CN201710128639.1A CN201710128639A CN107195532A CN 107195532 A CN107195532 A CN 107195532A CN 201710128639 A CN201710128639 A CN 201710128639A CN 107195532 A CN107195532 A CN 107195532A
- Authority
- CN
- China
- Prior art keywords
- semiconductor wafer
- metal film
- semiconductor
- washer
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 99
- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 68
- 229910052751 metal Inorganic materials 0.000 claims abstract description 68
- 238000004140 cleaning Methods 0.000 claims abstract description 47
- 238000007747 plating Methods 0.000 claims abstract description 40
- 230000002093 peripheral effect Effects 0.000 claims abstract description 17
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 13
- 239000007788 liquid Substances 0.000 claims abstract description 10
- 239000007921 spray Substances 0.000 claims description 15
- 239000012530 fluid Substances 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 238000005507 spraying Methods 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 47
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 47
- 239000010410 layer Substances 0.000 description 33
- 239000000758 substrate Substances 0.000 description 18
- 238000002347 injection Methods 0.000 description 14
- 239000007924 injection Substances 0.000 description 14
- 238000003475 lamination Methods 0.000 description 14
- 238000003780 insertion Methods 0.000 description 9
- 230000037431 insertion Effects 0.000 description 9
- 239000011229 interlayer Substances 0.000 description 8
- 239000004020 conductor Substances 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 206010021036 Hyponatraemia Diseases 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000008400 supply water Substances 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 239000003643 water by type Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B08—CLEANING
- B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
- B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
- B08B3/02—Cleaning by the force of jets or sprays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
- H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
- H01L21/67051—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016050105A JP2017168528A (ja) | 2016-03-14 | 2016-03-14 | 半導体製造方法 |
JP2016-050105 | 2016-03-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107195532A true CN107195532A (zh) | 2017-09-22 |
CN107195532B CN107195532B (zh) | 2020-09-18 |
Family
ID=59787984
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710128639.1A Active CN107195532B (zh) | 2016-03-14 | 2017-03-06 | 半导体制造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9941165B2 (zh) |
JP (1) | JP2017168528A (zh) |
CN (1) | CN107195532B (zh) |
TW (1) | TWI673828B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111383950A (zh) * | 2018-12-25 | 2020-07-07 | 胜高股份有限公司 | 半导体晶片的清洗槽及清洗方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019145737A (ja) * | 2018-02-23 | 2019-08-29 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置および半導体装置の製造方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010023166A1 (en) * | 1999-07-20 | 2001-09-20 | Huynh Cuc Kim | Wafer carrier rinsing mechanism |
CN1833314A (zh) * | 2003-08-07 | 2006-09-13 | 株式会社荏原制作所 | 基片处理装置、基片处理方法和基片固定装置 |
CN1900358A (zh) * | 2005-07-06 | 2007-01-24 | 应用材料公司 | 用于将金属无电镀沉积到半导体衬底上的装置 |
CN202307830U (zh) * | 2011-10-20 | 2012-07-04 | 中芯国际集成电路制造(上海)有限公司 | 单片晶圆湿法刻蚀装置 |
CN103707179A (zh) * | 2012-10-03 | 2014-04-09 | 株式会社荏原制作所 | 基板清洗装置及研磨装置 |
CN105312268A (zh) * | 2014-07-29 | 2016-02-10 | 盛美半导体设备(上海)有限公司 | 晶圆清洗装置 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6238747B1 (en) * | 1999-09-07 | 2001-05-29 | Advanced Micro Devices, Inc. | Mechanism for dispensing liquid onto an integrated circuit wafer with minimized back-splash |
US6659116B1 (en) * | 2000-06-26 | 2003-12-09 | Lam Research Corporation | System for wafer carrier in-process clean and rinse |
JP2002305174A (ja) | 2001-04-06 | 2002-10-18 | Seiko Epson Corp | 半導体ウェハの洗浄方法 |
US8177993B2 (en) * | 2006-11-05 | 2012-05-15 | Globalfoundries Singapore Pte Ltd | Apparatus and methods for cleaning and drying of wafers |
US7767025B2 (en) * | 2007-09-30 | 2010-08-03 | Intel Corporation | Nozzle array configuration to facilitate deflux process improvement in chip attach process |
KR20100020718A (ko) | 2008-08-13 | 2010-02-23 | 삼성전자주식회사 | 반도체 칩, 그 스택 구조 및 이들의 제조 방법 |
KR101732975B1 (ko) | 2010-12-03 | 2017-05-08 | 삼성전자주식회사 | 반도체 장치의 제조 방법 |
JP5972537B2 (ja) | 2011-07-27 | 2016-08-17 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体装置及びその製造方法 |
JP2014107304A (ja) * | 2012-11-22 | 2014-06-09 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
US10083893B2 (en) | 2014-01-30 | 2018-09-25 | Toshiba Memory Corporation | Semiconductor device and semiconductor device manufacturing method |
US9613864B2 (en) * | 2014-10-15 | 2017-04-04 | Micron Technology, Inc. | Low capacitance interconnect structures and associated systems and methods |
-
2016
- 2016-03-14 JP JP2016050105A patent/JP2017168528A/ja not_active Abandoned
- 2016-08-08 US US15/231,717 patent/US9941165B2/en active Active
-
2017
- 2017-02-08 TW TW106104038A patent/TWI673828B/zh active
- 2017-03-06 CN CN201710128639.1A patent/CN107195532B/zh active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010023166A1 (en) * | 1999-07-20 | 2001-09-20 | Huynh Cuc Kim | Wafer carrier rinsing mechanism |
CN1833314A (zh) * | 2003-08-07 | 2006-09-13 | 株式会社荏原制作所 | 基片处理装置、基片处理方法和基片固定装置 |
CN1900358A (zh) * | 2005-07-06 | 2007-01-24 | 应用材料公司 | 用于将金属无电镀沉积到半导体衬底上的装置 |
CN202307830U (zh) * | 2011-10-20 | 2012-07-04 | 中芯国际集成电路制造(上海)有限公司 | 单片晶圆湿法刻蚀装置 |
CN103707179A (zh) * | 2012-10-03 | 2014-04-09 | 株式会社荏原制作所 | 基板清洗装置及研磨装置 |
CN105312268A (zh) * | 2014-07-29 | 2016-02-10 | 盛美半导体设备(上海)有限公司 | 晶圆清洗装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111383950A (zh) * | 2018-12-25 | 2020-07-07 | 胜高股份有限公司 | 半导体晶片的清洗槽及清洗方法 |
CN111383950B (zh) * | 2018-12-25 | 2023-06-27 | 胜高股份有限公司 | 半导体晶片的清洗槽及清洗方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2017168528A (ja) | 2017-09-21 |
TW201806079A (zh) | 2018-02-16 |
US9941165B2 (en) | 2018-04-10 |
US20170263499A1 (en) | 2017-09-14 |
CN107195532B (zh) | 2020-09-18 |
TWI673828B (zh) | 2019-10-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11195748B2 (en) | Interconnect structures and methods for forming same | |
KR100907896B1 (ko) | 시스템 인 패키지의 금속 전극 형성방법 | |
US7345350B2 (en) | Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias | |
CN1321437C (zh) | 半导体器件的制造方法、半导体器件、电路基板和电子设备 | |
US8294273B2 (en) | Methods for fabricating and filling conductive vias and conductive vias so formed | |
TWI497643B (zh) | 用於半導體裝置的超填隙金屬接觸貫穿孔 | |
TWI544597B (zh) | 積體電路元件以及半導體製程 | |
US7586175B2 (en) | Semiconductor wafer having embedded electroplating current paths to provide uniform plating over wafer surface | |
US20090243038A1 (en) | Method of manufacturing semiconductor device and semiconductor device | |
KR101302564B1 (ko) | 비아 형성 방법 및 이를 이용하는 적층 칩 패키지의 제조 방법 | |
JP5998459B2 (ja) | 半導体装置およびその製造方法、電子部品 | |
US10410793B2 (en) | Thin film capacitor and method of manufacturing the same | |
KR101078738B1 (ko) | 반도체 소자의 구리배선 및 그 형성방법 | |
CN103460820A (zh) | 布线板及其制造方法 | |
CN103904050A (zh) | 封装基板、封装基板制作方法及封装结构 | |
CN107195532A (zh) | 半导体制造方法 | |
CN109564902A (zh) | 基于玻璃的电子件封装及其形成方法 | |
CN103367290A (zh) | 具有密集通孔阵列的接合焊盘结构 | |
JP4584700B2 (ja) | 配線基板の製造方法 | |
JP5219612B2 (ja) | 半導体貫通電極形成方法 | |
JP4996125B2 (ja) | めっき方法およびこれを用いた半導体装置の製造方法、ならびにめっき装置 | |
US8030781B2 (en) | Bond pad structure having dummy plugs and/or patterns formed therearound | |
JP2007214437A (ja) | 受動素子内蔵配線基板およびその製造方法 | |
TW202437287A (zh) | 包含去耦電容器之層疊式封裝總成 | |
KR100440468B1 (ko) | 반도체 소자 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP01 | Change in the name or title of a patent holder |
Address after: Tokyo Patentee after: Kaixia Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. Address after: Tokyo Patentee after: TOSHIBA MEMORY Corp. Address before: Tokyo Patentee before: Pangea Co.,Ltd. |
|
CP01 | Change in the name or title of a patent holder | ||
TR01 | Transfer of patent right |
Effective date of registration: 20220130 Address after: Tokyo Patentee after: Pangea Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. |
|
TR01 | Transfer of patent right |