CN107112248B - 芯片接合装置以及芯片接合方法 - Google Patents

芯片接合装置以及芯片接合方法 Download PDF

Info

Publication number
CN107112248B
CN107112248B CN201680004693.9A CN201680004693A CN107112248B CN 107112248 B CN107112248 B CN 107112248B CN 201680004693 A CN201680004693 A CN 201680004693A CN 107112248 B CN107112248 B CN 107112248B
Authority
CN
China
Prior art keywords
bonding apparatus
gas
cover
heating
chip bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201680004693.9A
Other languages
English (en)
Other versions
CN107112248A (zh
Inventor
中村照幸
关野章良
谷口英广
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Publication of CN107112248A publication Critical patent/CN107112248A/zh
Application granted granted Critical
Publication of CN107112248B publication Critical patent/CN107112248B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0235—Method for mounting laser chips
    • H01S5/02355—Fixing laser chips on mounts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/1039—Details on the cavity length
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/751—Means for controlling the bonding environment, e.g. valves, vacuum pumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75272—Oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/7528—Resistance welding electrodes, i.e. for ohmic heating
    • H01L2224/75281—Resistance welding electrodes, i.e. for ohmic heating in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75283—Means for applying energy, e.g. heating means by infrared heating, e.g. infrared heating lamp
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75744—Suction holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75754—Guiding structures
    • H01L2224/75756—Guiding structures in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/758—Means for moving parts
    • H01L2224/75801—Lower part of the bonding apparatus, e.g. XY table
    • H01L2224/75804—Translational mechanism
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/758—Means for moving parts
    • H01L2224/75821—Upper part of the bonding apparatus, i.e. bonding head
    • H01L2224/75824—Translational mechanism
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H01L2224/83048—Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053—Bonding environment
    • H01L2224/83054—Composition of the atmosphere
    • H01L2224/83055—Composition of the atmosphere being oxidating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053—Bonding environment
    • H01L2224/83054—Composition of the atmosphere
    • H01L2224/83065—Composition of the atmosphere being reducing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053—Bonding environment
    • H01L2224/83054—Composition of the atmosphere
    • H01L2224/83075—Composition of the atmosphere being inert
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/8321—Applying energy for connecting using a reflow oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/8322—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/8322—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/8323—Polychromatic or infrared lamp heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83401—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/83411—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83444—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/83815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1011—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

一种芯片接合装置，其向第一部件接合第二部件，其特征在于，具备：载置台，其将第一部件载置于载置区域；加热器，其设置在所述载置台的下侧；侧壁，其设置为包围所述载置台的载置区域；盖，其具有能够供第一部件以及第二部件通过的大小的孔，且载置于侧壁；夹头，其能够利用前端部对第二部件进行真空夹紧，从而对第二部件进行保持；移动机构，其使夹头移动，以使夹头保持的第二部件通过孔而与第一部件接合；以及气体供给管，其设置于侧壁，向由侧壁与盖形成的加热空间供给加热气体，盖包括能够对由加热器以及加热气体产生的红外线辐射进行反射、或吸收‑再辐射的材料。

Description

芯片接合装置以及芯片接合方法
技术领域
本发明涉及芯片接合装置以及芯片接合方法。
背景技术
芯片接合装置用于向支承基材等第一部件接合半导体元件的芯片等第二部件(参照专利文献1、2)。在芯片接合装置中，通常，对第一部件进行加热使涂敷于其表面的焊料熔融，或者在加热器上向第一部件供给焊料并通过加热而使其熔融，使第二部件与之接触从而进行接合。接合中使用的焊料例如为钎料、导电性粘接剂。
在先技术文献
专利文献
专利文献1：日本专利第4935491号公报
专利文献2：日本特开2009-81218号公报
发明内容
发明所要解决的课题
然而，在即将进行接合之前的第二部件的温度比第一部件的表面的焊料的温度低的情况下，在接合时焊料在短时间内固化，存在在焊料与第二部件的浸润性不足的情况下完成接合的可能性。在该情况下，存在第一部件与第二部件的热阻增大，而可能使第二部件的特性以及可靠性降低这样的问题。另外，在第二部件如长谐振器型的半导体激光器元件的芯片、半导体激光器呈矩阵状排列而成的激光棒元件的芯片等那样尺寸较大的情况下，有时在芯片的长度方向上产生翘曲从而在局部存在浸润性不足的部位的情况下完成接合。在该情况下，也存在可能使芯片的特性以及可靠性降低的这样的问题。
本发明是鉴于上述而完成的，其目的在于提供不会降低部件的特性以及可靠性而能够实施适当的接合的芯片接合装置以及芯片接合方法。
用于解决课题的方案
为了解决上述的课题并实现目的，本发明的一方式所涉及的芯片接合装置向第一部件接合第二部件，其特征在于，具备：载置台，其将所述第一部件载置于载置区域；加热器，其设置在所述载置台的下侧；侧壁，其设置为包围所述载置台的载置区域；盖，其具有能够供所述第一部件以及第二部件通过的大小的孔，且载置于所述侧壁；夹头，其能够利用前端部对所述第二部件进行真空夹紧，从而对所述第二部件进行保持；移动机构，其使所述夹头移动，以使所述夹头保持的所述第二部件通过所述孔而与所述第一部件接合；以及气体供给管，其设置于所述侧壁，向由所述侧壁与所述盖形成的加热空间供给加热气体，所述盖包括能够对由所述加热器以及所述加热气体产生的红外线辐射进行反射、或吸收-再辐射的材料。
本发明的一方式所涉及的芯片接合装置的特征在于，所述盖由所述材料构成。
本发明的一方式所涉及的芯片接合装置的特征在于，所述盖包括由所述材料构成的层。
本发明的一方式所涉及的芯片接合装置的特征在于，所述材料是金属、陶瓷、耐热树脂以及碳中的至少一方。
本发明的一方式所涉及的芯片接合装置的特征在于，所述侧壁具有多层构造。
本发明的一方式所涉及的芯片接合装置的特征在于，所述气体供给管设置为，向从所述盖侧观察时避开所述盖的孔的方向喷射所述加热气体。
本发明的一方式所涉及的芯片接合装置的特征在于，所述气体供给管设置为，朝向所述载置台侧喷射所述加热气体。
本发明的一方式所涉及的芯片接合装置的特征在于，所述加热气体是非活性气体、还原性气体、或者非活性气体与还原性气体的混合气体。
本发明的一方式所涉及的芯片接合装置的特征在于，所述夹头的进行真空夹紧的面积比所述第二部件被真空夹紧的面的面积小。
本发明的一方式所涉及的芯片接合装置的特征在于，所述夹头是圆夹头。
本发明的一方式所涉及的芯片接合装置的特征在于，所述夹头的前端部由树脂构成。
本发明的一方式所涉及的芯片接合装置的特征在于，所述第二部件的长度方向上的尺寸为4mm以上。
本发明的一方式所涉及的芯片接合方法向第一部件接合第二部件，其特征在于，包括：载置工序，将所述第一部件载置于载置台的载置区域；加热工序，通过加热器对所述第一部件进行加热；气体供给工序，向加热空间供给加热气体，所述加热空间由所述载置台、设置为包围所述载置台的载置区域的侧壁、以及具有能够供所述第一部件以及第二部件通过的大小的孔且载置于所述侧壁的盖形成；以及接合工序，使由夹头保持的所述第二部件通过所述盖的孔并向所述加热空间内导入，使所述第二部件与所述第一部件接触而进行接合，所述盖包括能够对由所述加热器以及所述加热气体产生的红外线辐射进行反射、或吸收-再辐射的材料。
本发明的一方式所涉及的芯片接合方法的特征在于，在所述加热空间内使所述第二部件以第一速度移动，之后，使所述第二部件以比所述第一速度快的第二速度移动并与所述第一部件接触。
本发明的一方式所涉及的芯片接合方法的特征在于，在所述加热空间内使所述第二部件停止，之后，使所述第二部件移动并与所述第一部件接触。
本发明的一方式所涉及的芯片接合方法的特征在于，所述第二部件的长度方向上的尺寸为4mm以上。
发明效果
根据本发明，具有能够不降低部件的特性以及可靠性而实施适当的接合的效果。
附图说明
图1是实施方式所涉及的芯片接合装置的示意性的局部剖切侧视图。
图2是图1所示的芯片接合装置的示意性的俯视图。
图3是对使用图1所示的芯片接合装置的芯片接合方法进行说明的示意图。
图4是对使用图1所示的芯片接合装置的芯片接合方法进行说明的示意图。
图5是对半导体芯片与夹头的前端部之间的关系进行说明的示意图。
图6是对气体供给管的配置例1进行说明的示意图。
图7是对气体供给管的配置例2进行说明的示意图。
图8是对夹头的其他结构例进行说明的示意图。
图9是对盖的其他结构例进行说明的示意图。
具体实施方式
以下，参照附图对本发明的实施方式进行详细说明。需要说明的是，并不通过该实施方式来限定本发明。
(实施方式)
图1是实施方式所涉及的芯片接合装置的示意性的局部剖切侧视图。图2是图1所示的芯片接合装置的示意性的俯视图。如后述那样，芯片接合装置100向作为第一部件的副基座接合作为第二部件的半导体激光器元件的芯片(以下，有时记载为半导体芯片)，从而制造带有芯片的副基座。
芯片接合装置100具备载置台1、加热器2、侧壁3、盖4、夹头(collet)5、夹头5的移动机构6、气体供给管7、以及位置调整用臂8、9。
载置台1由不锈钢构成，但也可以由铜等其他金属材料构成。载置台1在表面具有供副基座载置的载置区域1a。另外，在载置台1的载置区域1a形成有与真空泵相连的吸引孔1b。
加热器2设置在载置台1的载置区域1a的下侧。侧壁3设置为包围载置台1的载置区域1a，具有由分离地配置的金属板材3a与金属板材3b这两层构成的多层构造。金属板材3a、3b由不锈钢构成，但也可以由铜等其他金属材料构成。
盖4载置于侧壁3。盖4是由不锈钢构成的板状构件，但也可以是由铜等其他金属材料构成的板状构件。盖4具有能够供副基座以及半导体芯片通过的大小的孔4a。侧壁3与盖4形成加热空间HS。需要说明的是，盖4未固定于侧壁3，能够装卸。由此，容易卸下盖4，对加热空间HS进行维护(清扫、调整等)。另外，也可以采用将盖4与侧壁3一体化的构造、或防止气体、由辐射导致的热量的泄漏的构造。另外，在将盖4载置于侧壁3的状态下，盖4的孔4a位于载置台1的载置区域1a的上方。
夹头5是具有由金属构成的主体部5a与由聚酰亚胺树脂构成的前端部5b且前端部5b的前端面呈圆形的圆夹头。另外，在夹头5中形成有吸引孔5c，该吸引孔5c在前端部5b的前端面开口且与真空泵相连。夹头5能够利用吸引孔5c吸引半导体芯片而进行真空夹紧，从而利用前端部5b对半导体芯片进行保持。
移动机构6是用于供夹头5安装并使夹头5移动的机构。在移动机构6中形成有将吸引孔5c与真空泵连结的吸引孔6a。
气体供给管7设置为贯通侧壁3，向加热空间HS供给加热气体。位置调整用臂8、9设置为贯通侧壁3，并且沿彼此正交的方向移动自如。具体而言，位置调整用臂8沿图2的纸面左右方向移动自如，位置调整用臂9沿图2的纸面上下方向移动自如。位置调整用臂8、9用于进行载置于载置台1的载置区域1a的副基座的位置调整。
需要说明的是，在芯片接合装置100中具有未图示的搬运机构，该搬运机构用于使副基座向载置台1的载置区域1a移动而进行载置。
接下来，参照图3、4对使用芯片接合装置100的芯片接合方法进行说明。
首先，如图3所示，进行通过搬运机构使副基座M通过盖4的孔4a并载置于载置台1的载置区域1a的载置工序。副基座M在基板M1的表面依次形成有电极层M2与焊料层M3(在本实施方式中为AuSn钎料层)。在载置后，使位置调整用臂8、9从初始位置沿图3的箭头的方向前进，对副基座M的载置位置进行微调。接下来，如图4中箭头所示，通过真空泵从载置台1的吸引孔1b对副基座M进行吸引，从而进行真空夹紧。
接下来，进行利用加热器2对副基座M进行加热的加热工序。接下来，如图4中箭头所示，进行从气体供给管7向加热空间HS喷射并供给加热气体G的气体供给工序。由此，加热空间HS内被加热。加热空间HS内的温度设定成为了对半导体芯片C进行接合而适当的温度。另外，调整加热器2的输出，使副基座M成为焊料层M3溶解的温度。需要说明的是，若焊料层M3的温度低，则有时在进行接合时焊料层M3过度地在短时间内固化。另一方面，若温度高，则有时焊料层M3变质。例如，在焊料层M3是AuSn钎料层的情况下，若温度高，则有时成为熔点高的化合物而固化。为了防止这些问题，调整加热器2的输出以使焊料层M3成为适当的温度。
在此，利用加热器2以及加热气体G对加热空间HS内进行加热，从而从载置台1、侧壁3产生红外线辐射。在本实施方式的芯片接合装置100中，盖4由作为金属材料的不锈钢构成，因此盖4对红外线辐射进行反射或吸收-再辐射。其结果是，加热空间HS内的温度的降低得到抑制。
接下来，进行接合工序。具体而言，通过移动机构6，使利用夹头5的真空夹紧保持的半导体芯片C通过盖4的孔4a，并导入至加热空间HS内。半导体芯片C在加热空间HS内被预热。之后，通过夹头5使半导体芯片C与副基座M的焊料层M3接触并进行按压，从而进行接合。之后，从芯片接合装置100中取出副基座M，在电极层M2与半导体芯片C之间进行规定的布线工序，从而制造出带有芯片的副基座。
需要说明的是，从加热工序到使半导体芯片C与副基座M的焊料层M3接触并进行按压从而进行接合为止的时间设定为焊料层M3不会变质的程度的时间。
另外，为了将半导体芯片C可靠地加热至适当的温度，可以在加热空间HS内使半导体芯片C以较慢的第一速度移动，之后，使半导体芯片C以比第一速度快的第二速度与副基座M接触。另外，也可以在加热空间HS内使半导体芯片C暂时停止规定时间，之后，使半导体芯片C移动而与副基座M接触。
在本实施方式所涉及的芯片接合装置100中，盖4对红外线辐射进行反射或吸收-再辐射的结果是，加热空间HS内的温度的降低得到抑制。因此，相对于副基座M的焊料层M3的温度，适当地保持即将进行接合之前的半导体芯片C的温度。由此，在进行接合时，在焊料层M3与半导体芯片C的浸润性充分的状态下，焊料层M3凝固而完成接合。其结果是，抑制或防止半导体芯片C与副基座M的热阻增大，因此抑制或防止半导体芯片C的特性的降低，并且可靠性提高。
对于盖4而言，为了减少与侧壁3之间的间隙，优选较重。通过减少间隙，能够抑制加热气体G自间隙的流出。
需要说明的是，假定将盖4设为玻璃等透明材质的盖，接合作业的可视性良好，但盖会使红外线辐射透过，因此有时即将进行接合之前的半导体芯片C的温度比副基座M的焊料层M3的温度低，从而产生因接合不良导致的热阻的增加。
特别是，在半导体芯片C的尺寸较大(例如长度方向上的尺寸为4mm以上)的情况下，有时在芯片的长度方向上产生翘曲。在该情况下，若半导体芯片C的温度低，则在半导体芯片C中存在首先与焊料层M3接触的区域，并且有时在该区域内在接触的瞬间焊料层M3的温度降低并固化。在这种情况下，有时之后与焊料层M3接触的区域在局部浸润性变得不足。相对于此，在芯片接合装置100中，适当地保持即将进行接合之前的半导体芯片C的温度，因此抑制或防止产生如上述那样在局部浸润性不足的部位。
另外，在芯片接合装置100中，侧壁3具有多层构造，因此加热空间HS内的热量不易散发，从而进一步抑制温度的降低。
另外，为了使加热空间HS内的温度为高温并且均匀，加热空间HS的体积优选与副基座M、半导体芯片C的尺寸相比不过大而尽量小。
另外，对于从气体供给管7供给的加热气体G而言，在本实施方式中是氮气，但例如也可以是氩气等其他非活性气体、氢气等还原性气体、或者非活性气体与还原性气体的混合气体。在加热气体G是还原性气体的情况下，具有防止焊料层M3的氧化的效果。另外，加热气体G也可以是空气。
另外，在芯片接合装置100中，夹头5中的与半导体芯片C接触的部分即前端部5b由树脂构成，导热率比金属小。其结果是，抑制或防止半导体芯片C的热量向夹头5传递而使半导体芯片C的温度降低。另外，前端部5b由树脂构成，从而半导体芯片C与前端部5b之间的紧贴性变高，由此间隙减小。其结果是，抑制或防止气体从间隙流入而使半导体芯片C的温度降低。需要说明的是，作为树脂，使用硬度低的树脂，从而减小间隙的效果进一步提高。并且，前端部5b由树脂构成，从而还抑制或防止在真空夹紧时等半导体芯片C从夹头5受到冲击。从耐热性以及硬度的观点出发，优选的树脂的例子是聚酰亚胺，但也可以是其他树脂。
另外，在芯片接合装置100中，夹头5是圆夹头。图5是对半导体芯片C与夹头5的前端部5b之间的关系进行说明的示意图。如图5所示，夹头5的前端部5b的前端面的面积比半导体芯片C被真空夹紧的面的面积小。因此，夹头5对半导体芯片C进行真空夹紧的面积即吸引孔5c的面积也比半导体芯片C被真空夹紧的面的面积小。由此，防止在夹头5对半导体芯片C进行真空夹紧时吸引孔5c从半导体芯片C露出，而使气体从此流入。若夹头5为圆夹头，则容易减小吸引孔5c的面积，故而优选。
(气体供给管的其他配置例)
图6是对作为气体供给管的其他配置例的配置例1进行说明的示意图。在图6所示的配置例1中，气体供给管7设置为，在从盖4侧观察芯片接合装置100的情况下，向避开盖4的孔4a的方向喷射加热气体G。根据该配置例1，从气体供给管7喷射出的加热气体G不会直线地到达孔4a而从孔4a向加热空间HS的外部流出，容易长期地滞留在加热空间HS内。其结果是，能够高效地对加热空间HS进行加热。
图7是对气体供给管的配置例2进行说明的示意图。在图7所示的配置例2中，气体供给管7设置为，朝向载置台1侧喷射加热气体G。根据该配置例2，加热气体G容易长期滞留在加热空间HS内，能够高效地对加热空间HS进行加热。并且，通过加热气体G还能够高效地对副基座M进行加热。
(夹头的其他结构例)
图8是对夹头的其他结构例进行说明的示意图。图8的(a)是从侧面观察时的图，图8的(b)与图5同样是对半导体芯片与夹头的前端部之间的关系进行说明的示意图。夹头5A是具有由金属构成的主体部5a与由聚酰亚胺树脂构成的前端部5Ab且前端部5Ab的前端面呈长方形的平夹头。与夹头5同样，在夹头5A中形成有吸引孔5Ac，该吸引孔5Ac在前端部5Ab的前端面开口且与真空泵相连。夹头5A能够利用吸引孔5Ac吸引半导体芯片C而进行真空夹紧，从而利用前端部5Ab对半导体芯片C进行保持。
夹头5A的前端部5Ab的前端面的面积比半导体芯片C被真空夹紧的面的面积小。因此，夹头5A对半导体芯片C进行真空夹紧的面积即吸引孔5Ac的面积也比半导体芯片C被真空夹紧的面的面积小。由此，防止在夹头5A对半导体芯片C进行真空夹紧时吸引孔5Ac从半导体芯片C露出，而使气体从此流入。
需要说明的是，在使用图8这样的形状的平夹头的情况下，能够沿长度方向平面地对半导体芯片C进行夹紧，因此具有在被夹紧的状态下半导体芯片C的翘曲变小这样的效果。但是，吸引孔5Ac的外周的长度也变大，因此在半导体芯片C与吸引孔5Ac之间容易出现间隙，有时气体从该间隙流入而使半导体芯片C的温度降低。因此，应当考虑减小翘曲的效果与容易出现间隙的影响来设定前端部5Ab的形状。
(盖的其他结构例)
图9是对盖的其他结构例进行说明的示意图。具有孔4Aa的盖4A采用将由不锈钢构成的板状构件4A1与由玻璃构成的板状构件4A2贴合而成的两层构造。这样，盖可以采用包括由能够对红外线辐射进行反射或吸收-再辐射的材料构成的层的结构，也可以采用包括该材料的结构。需要说明的是，作为能够对红外线辐射进行反射或吸收-再辐射的材料，为金属、陶瓷、各种耐热树脂材料以及碳中的至少一方。另外，盖可以采用包括这些材料中的两种以上的结构。
(实施例、比较例)
作为实施例1，使用在实施方式所涉及的芯片接合装置100的结构中将夹头设为平夹头的芯片接合装置，将长度为1mm～5mm的半导体芯片向副基座芯片接合，从而制作多个样本的带有芯片的副基座。另一方面，作为比较例，使用在实施例1的芯片接合装置的结构中将盖设为玻璃板的芯片接合装置，将长度为1mm～5mm的半导体芯片向副基座芯片接合，从而制作多个样本的带有芯片的副基座。之后，从制作出的带有芯片的副基座的副基座中剥离半导体芯片，确认接合状态。比较例与实施例1的差异仅在于盖的材质。在表1中示出结果。需要说明的是，加热空间内的温度(预热温度)在100℃～440℃之间变更，在表1中示出420℃的结果。
(表1)
长度(mm) 1 2 3 4 5
比较例 ○ ○ Δ × ×
实施例1 ○ ○ ○ ○ ○
如表1所示，在比较例的情况下，在半导体芯片的长度为1mm～2mm时，全部样本的接合状态良好(用“○”符号表示)，在长度为3mm时存在接合状态不良的样本(用“△”符号表示)，在长度为4mm～5mm时全部样本的接合状态不良(用“×”符号表示)。另一方面，在实施例1的情况下，所有长度的半导体芯片的全部样本的接合状态良好。需要说明的是，接合状态良好的情况是指，在剥离半导体芯片后残留于副基座侧的芯片的痕迹的比例为芯片尺寸的90％以上的情况。
接下来，作为实施例2，使用实施方式所涉及的芯片接合装置100的结构(即使用圆夹头的结构)的芯片接合装置，将长度为4mm的半导体芯片向副基座芯片接合，从而制作多个样本的带有芯片的副基座。并且，作为实施例3，使用实施例2的结构的芯片接合装置，将长度为4mm的半导体芯片向副基座芯片接合，从而制作多个样本的带有芯片的副基座。但是，在实施例3中，与实施例1、2相比，使副基座的焊料(AuSn钎料)的体积增大为1.5～3倍。之后，从制作出的带有芯片的副基座的副基座中剥离半导体芯片，确认接合状态。将其结果与比较例的结果、以及实施例1中半导体芯片的长度为4mm的情况下的结果一起在表2中示出。
预热温度(℃) 360 380 400 420 440
比较例(3mm以下) × ○ ○ Δ～○ ×
比较例(4mm以上) × × × × ×
实施例1 × × ○ ○ ×
实施例2 × ○ ○ ○ ×
实施例3 ○ ○ ○ ○ ×
如表2所示，在比较例中，在半导体芯片的长度为4mm以上的情况下，在所有温度下全部样本的接合状态不良。但是，在实施例1的情况下，在400℃～420℃的温度范围内，全部样本的接合状态良好。并且，在实施例2的情况下，在380℃～420℃的温度范围内，全部样本的接合状态良好。并且，在实施例3的情况下，在360℃～420℃的温度范围内，全部样本的接合状态良好。
需要说明的是，并不通过上述实施方式来限定本发明。将上述的各构成要素适当组合而构成的方式也包含于本发明。另外，进一步的效果、变形例能够容易地由本领域技术人员导出。由此，本发明的更广泛的方式不限定于上述的实施方式，而能够进行各种变更。
产业上的可利用性
如上所述，本发明所涉及的芯片接合装置以及芯片接合方法适宜应用于例如半导体芯片的芯片接合。
附图标记说明
1 载置台
1a 载置区域
1b 吸引孔
2 加热器
3 侧壁
3a、3b 金属板材
4、4A 盖
4A1、4A2 板状构件
4a、4Aa 孔
5、5A 夹头
5b、5Ab 前端部
5c、5Ac、6a 吸引孔
5a 主体部
6 移动机构
7 气体供给管
8、9 位置调整用臂
100 芯片接合装置
C 半导体芯片
G 加热气体
HS 加热空间
M 副基座
M1 基板
M2 电极层
M3 焊料层。

Claims (16)

1.一种芯片接合装置，其向第一部件接合第二部件，其特征在于，具备：
载置台，其将所述第一部件载置于载置区域；
加热器，其设置在所述载置台的下侧；
侧壁，其设置为包围所述载置台的载置区域；
盖，其具有能够供所述第一部件以及第二部件通过的大小的孔，且载置于所述侧壁；
夹头，其能够利用前端部对所述第二部件进行真空夹紧，从而对所述第二部件进行保持；
移动机构，其使所述夹头移动，以使所述夹头保持的所述第二部件通过所述孔而与所述第一部件接合；以及
气体供给管，其设置于所述侧壁，向由所述侧壁与所述盖形成的加热空间供给加热气体，
所述盖包括能够对由所述加热器以及所述加热气体产生的红外线辐射进行反射、或吸收-再辐射的材料。
2.根据权利要求1所述的芯片接合装置，其特征在于，
所述盖由所述材料构成。
3.根据权利要求1所述的芯片接合装置，其特征在于，
所述盖包括由所述材料构成的层。
4.根据权利要求1所述的芯片接合装置，其特征在于，
所述材料是金属、陶瓷、耐热树脂以及碳中的至少一方。
5.根据权利要求1所述的芯片接合装置，其特征在于，
所述侧壁具有多层构造。
6.根据权利要求1至5中任一项所述的芯片接合装置，其特征在于，
所述气体供给管设置为，向从所述盖侧观察时避开所述盖的孔的方向喷射所述加热气体。
7.根据权利要求1至5中任一项所述的芯片接合装置，其特征在于，
所述气体供给管设置为，朝向所述载置台侧喷射所述加热气体。
8.根据权利要求1至5中任一项所述的芯片接合装置，其特征在于，
所述加热气体是非活性气体、还原性气体、或者非活性气体与还原性气体的混合气体。
9.根据权利要求1至5中任一项所述的芯片接合装置，其特征在于，
所述夹头的进行真空夹紧的面积比所述第二部件被真空夹紧的面的面积小。
10.根据权利要求9所述的芯片接合装置，其特征在于，
所述夹头是圆夹头。
11.根据权利要求1至5中任一项所述的芯片接合装置，其特征在于，
所述夹头的前端部由树脂构成。
12.根据权利要求1至5中任一项所述的芯片接合装置，其特征在于，
所述第二部件的长度方向上的尺寸为4mm以上。
13.一种芯片接合方法，向第一部件接合第二部件，其特征在于，包括：
载置工序，将所述第一部件载置于载置台的载置区域；
加热工序，通过加热器对所述第一部件进行加热；
气体供给工序，向加热空间供给加热气体，所述加热空间由所述载置台、设置为包围所述载置台的载置区域的侧壁、以及具有能够供所述第一部件以及第二部件通过的大小的孔且载置于所述侧壁的盖形成；以及
接合工序，使由夹头保持的所述第二部件通过所述盖的孔并向所述加热空间内导入，使所述第二部件与所述第一部件接触而进行接合，
所述盖包括能够对由所述加热器以及所述加热气体产生的红外线辐射进行反射、或吸收-再辐射的材料。
14.根据权利要求13所述的芯片接合方法，其特征在于，
在所述加热空间内使所述第二部件以第一速度移动，之后，使所述第二部件以比所述第一速度快的第二速度移动并与所述第一部件接触。
15.根据权利要求13所述的芯片接合方法，其特征在于，
在所述加热空间内使所述第二部件停止，之后，使所述第二部件移动并与所述第一部件接触。
16.根据权利要求13至15中任一项所述的芯片接合方法，其特征在于，
所述第二部件的长度方向上的尺寸为4mm以上。
CN201680004693.9A 2015-11-05 2016-10-31 芯片接合装置以及芯片接合方法 Active CN107112248B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562251484P 2015-11-05 2015-11-05
US62/251,484 2015-11-05
PCT/JP2016/082313 WO2017077982A1 (ja) 2015-11-05 2016-10-31 ダイボンディング装置およびダイボンディング方法

Publications (2)

Publication Number Publication Date
CN107112248A CN107112248A (zh) 2017-08-29
CN107112248B true CN107112248B (zh) 2021-07-27

Family

ID=58662369

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680004693.9A Active CN107112248B (zh) 2015-11-05 2016-10-31 芯片接合装置以及芯片接合方法

Country Status (6)

Country Link
US (2) US20170365578A1 (zh)
EP (1) EP3373325A4 (zh)
JP (1) JP6266167B2 (zh)
CN (1) CN107112248B (zh)
TW (1) TWI608550B (zh)
WO (1) WO2017077982A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI692044B (zh) * 2017-05-29 2020-04-21 日商新川股份有限公司 封裝裝置以及半導體裝置的製造方法
KR102608957B1 (ko) 2018-08-27 2023-12-01 삼성전자주식회사 플라즈마 처리 장치
CN109883748A (zh) * 2019-04-02 2019-06-14 无锡厦泰生物科技有限公司 一种分离式低热导tec检测装置
JP7425476B2 (ja) * 2020-04-06 2024-01-31 アスリートＦａ株式会社 接合装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0691679A2 (en) * 1994-06-07 1996-01-10 Texas Instruments Incorporated Process for manufacturing an integrated circuit package assembly
JP2005203691A (ja) * 2004-01-19 2005-07-28 Shinkawa Ltd ダイボンディング方法及びその装置
CN101908468A (zh) * 2009-06-05 2010-12-08 东京毅力科创株式会社 基板处理装置

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4278867A (en) * 1978-12-29 1981-07-14 International Business Machines Corporation System for chip joining by short wavelength radiation
JPS55156333A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Si chip replacing method
JPS5778645U (zh) * 1980-10-30 1982-05-15
JPH01143126U (zh) * 1988-03-23 1989-10-02
US4984731A (en) * 1989-10-05 1991-01-15 Matsushita Electric Industrial Co., Ltd. Method of packaging electronic component parts using a eutectic die bonder
JP2802133B2 (ja) * 1990-01-23 1998-09-24 松下電器産業株式会社 部品装着機
JP3206142B2 (ja) * 1992-10-15 2001-09-04 松下電器産業株式会社 ワイヤボンディング装置及びワイヤボンディング方法
JP3248778B2 (ja) * 1993-05-21 2002-01-21 ローム株式会社 半田ワイヤーにボール部を形成する方法
US5451274A (en) * 1994-01-31 1995-09-19 Motorola, Inc. Reflow of multi-layer metal bumps
US5668058A (en) * 1995-12-28 1997-09-16 Nec Corporation Method of producing a flip chip
US5735450A (en) * 1996-06-21 1998-04-07 International Business Machines Corporation Apparatus and method for heating a board-mounted electrical module for rework
JP3330037B2 (ja) * 1996-11-29 2002-09-30 富士通株式会社 チップ部品の接合方法および装置
JP3455838B2 (ja) * 1997-01-28 2003-10-14 澁谷工業株式会社 不活性ガス供給機構付ボンディングヘッド
JP3005502B2 (ja) * 1997-07-22 2000-01-31 山形日本電気株式会社 ダイボンディング装置
US6432744B1 (en) * 1997-11-20 2002-08-13 Texas Instruments Incorporated Wafer-scale assembly of chip-size packages
JP3475801B2 (ja) * 1998-08-21 2003-12-10 松下電器産業株式会社 電子部品のボンディング装置
JP2001210946A (ja) * 2000-01-26 2001-08-03 Victor Co Of Japan Ltd スポットリフロー装置
JP3796089B2 (ja) * 2000-02-14 2006-07-12 新光電気工業株式会社 薄板の位置決め装置
JP2002064268A (ja) * 2000-08-18 2002-02-28 Toray Eng Co Ltd 実装方法および装置
JP4711549B2 (ja) * 2001-06-27 2011-06-29 三洋電機株式会社 半導体装置の製造方法
TWI225279B (en) * 2002-03-11 2004-12-11 Hitachi Ltd Semiconductor device and its manufacturing method
US6866182B2 (en) * 2002-10-08 2005-03-15 Asm Technology Singapore Pte Ltd. Apparatus and method to prevent oxidation of electronic devices
JP2004158491A (ja) * 2002-11-01 2004-06-03 Juki Corp ダイボンディング装置
JP2005142460A (ja) * 2003-11-10 2005-06-02 Sony Corp ボンディング装置及びボンディング方法
FR2864419B1 (fr) * 2003-12-19 2006-04-28 Hispano Suiza Sa Procede pour braser un composant electronique sur une carte electronique, procede de reparation de la carte et installation pour la mise en oeuvre du procede
US7784670B2 (en) * 2004-01-22 2010-08-31 Bondtech Inc. Joining method and device produced by this method and joining unit
US7182793B2 (en) * 2004-01-22 2007-02-27 Asm Technology Singapore Pty Ltd. System for reducing oxidation of electronic devices
JP4043495B2 (ja) * 2006-04-20 2008-02-06 株式会社カイジョー ワーククランプ及びワイヤボンディング装置
US7614538B2 (en) * 2006-05-15 2009-11-10 Kulicke And Soffa Industries, Inc. Device clamp for reducing oxidation in wire bonding
JP2009252799A (ja) * 2008-04-01 2009-10-29 Nitto Denko Corp 半導体装置の製造方法
US20130153645A1 (en) * 2011-11-17 2013-06-20 Princeton Lightwave, Inc. Process for Hybrid Integration of Focal Plane Arrays
JP6104518B2 (ja) * 2012-04-27 2017-03-29 日産自動車株式会社 半導体装置の製造方法、断熱荷重治具及び断熱荷重治具の設置方法
US8870051B2 (en) * 2012-05-03 2014-10-28 International Business Machines Corporation Flip chip assembly apparatus employing a warpage-suppressor assembly
US10475763B2 (en) * 2015-05-26 2019-11-12 Asm Technology Singapore Pte Ltd Die bonding apparatus comprising an inert gas environment
US11574888B2 (en) * 2017-12-15 2023-02-07 Panasonic Intellectual Property Management Co., Ltd. Component joining apparatus, component joining method and mounted structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0691679A2 (en) * 1994-06-07 1996-01-10 Texas Instruments Incorporated Process for manufacturing an integrated circuit package assembly
JP2005203691A (ja) * 2004-01-19 2005-07-28 Shinkawa Ltd ダイボンディング方法及びその装置
CN101908468A (zh) * 2009-06-05 2010-12-08 东京毅力科创株式会社 基板处理装置
CN104600006A (zh) * 2009-06-05 2015-05-06 东京毅力科创株式会社 基板处理装置

Also Published As

Publication number Publication date
US20200243477A1 (en) 2020-07-30
CN107112248A (zh) 2017-08-29
TW201727777A (zh) 2017-08-01
WO2017077982A1 (ja) 2017-05-11
TWI608550B (zh) 2017-12-11
US20170365578A1 (en) 2017-12-21
EP3373325A4 (en) 2019-05-01
JPWO2017077982A1 (ja) 2017-11-02
JP6266167B2 (ja) 2018-01-24
EP3373325A1 (en) 2018-09-12

Similar Documents

Publication Publication Date Title
CN107112248B (zh) 芯片接合装置以及芯片接合方法
JP2008187056A (ja) 半田付け方法及び装置
CN110678288B (zh) 用于产生焊接连接部的方法
US6797926B2 (en) Apparatus and method for bonding electronic component, circuit board, and electronic component mounting apparatus
JP6611004B2 (ja) 半導体装置の製造方法
US20110309057A1 (en) Laser heating apparatus for metal eutectic bonding
JP5965559B1 (ja) 部品接合装置
JP2021153165A (ja) 電子部品のシンタリング装置および方法
CN109564898B (zh) 半导体模块及其生产方法
JP2004290993A (ja) 部品装着装置
KR101408728B1 (ko) 기판 고정 유닛 및 이를 포함하는 다이 본딩 장치
JP5938132B1 (ja) 部品接合装置及び部品接合システム
JP2010267771A (ja) 電子部品実装装置及び電子部品実装方法
JP5359588B2 (ja) 半導体チップのマウント装置および半導体装置の製造方法
JP2004158491A (ja) ダイボンディング装置
KR102658985B1 (ko) 본딩 헤드 및 이를 포함하는 다이 본딩 장치
JP4179805B2 (ja) ダイボンディング装置
JP2004193539A (ja) 半導体素子の接合方法および装置
JP2011044530A (ja) はんだ接合方法およびはんだ接合装置
JP2008078566A (ja) パワーモジュール用基板の製造方法及びパワーモジュール用基板並びにパワーモジュール
JP6778676B2 (ja) ボンディングツール冷却装置およびこれを備えたボンディング装置ならびにボンディングツール冷却方法
JP2017183616A (ja) ボンディングツール冷却装置およびこれを備えたボンディング装置ならびにボンディングツール冷却方法
JP2007103618A (ja) 電子装置の製造方法及び製造装置
JP2004063671A (ja) ダイボンディング装置
JP2007149897A (ja) ダイボンディング装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant