CN107034449A - 半导体晶片、用于保持其的基座和在其上沉积层的方法 - Google Patents
半导体晶片、用于保持其的基座和在其上沉积层的方法 Download PDFInfo
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- CN107034449A CN107034449A CN201610899163.7A CN201610899163A CN107034449A CN 107034449 A CN107034449 A CN 107034449A CN 201610899163 A CN201610899163 A CN 201610899163A CN 107034449 A CN107034449 A CN 107034449A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 107
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 title claims abstract description 52
- 238000000034 method Methods 0.000 title claims abstract description 16
- 230000008021 deposition Effects 0.000 claims abstract description 25
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims description 15
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 239000007789 gas Substances 0.000 description 16
- 230000000052 comparative effect Effects 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 5
- 238000000576 coating method Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 230000007717 exclusion Effects 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- NFGXHKASABOEEW-UHFFFAOYSA-N 1-methylethyl 11-methoxy-3,7,11-trimethyl-2,4-dodecadienoate Chemical compound COC(C)(C)CCCC(C)CC=CC(C)=CC(=O)OC(C)C NFGXHKASABOEEW-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 238000011010 flushing procedure Methods 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- 239000002912 waste gas Substances 0.000 description 1
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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Abstract
一种用于在半导体晶片的前侧上的层的沉积期间保持具有定向缺口的半导体晶片的基座;所述基座包括:放置表面,用于放置半导体晶片的后侧的边缘区域;放置表面的台阶形外定界;和放置表面的外定界的凹口,以便将半导体晶片的后侧的边缘区域的所述定向缺口位于其中的局部区域放置在所述放置表面的由其外定界的凹口限定的局部区域上。一种用于在具有定向缺口的半导体晶片上沉积层的方法和由单晶硅制成的半导体晶片,其中基座被在方法中被使用。
Description
技术领域
本发明的主题是基座,所述基座用于在半导体晶片的前侧上沉积层的期间保持具有定向缺口的半导体晶片。基座具有放置表面和所述放置表面的台阶形外定界,所述放置表面用于将半导体晶片放置在半导体晶片的后侧的边缘区域中。本发明的主题还是一种用于在具有定向缺口的半导体晶片上沉积层的方法和由单晶硅制成的半导体晶片,该基座在所述方法中被使用。
背景技术
提及类型的基座在各种实施例中是已知的。在DE 198 47 101 C1中描述了一个实施例,其中放置表面是形成基座的环的部件。在根据EP 1 460 679 A1的实施例中,基座额外地具有底部并因此是盘的形式。放置表面由在盘边缘上的凸出部分形成。在DE 10 2006055 038 A1中示出了一个实施例,其中半导体晶片位于环的凹陷部分中,并且环位于基盘上。
当在半导体晶片的前侧上沉积层时,特别做出努力以生成具有均匀层厚度的层且以使该层的可用表面尽可能近地向半导体晶片的边缘延伸。当试图实现该规范时,面临的问题是平坦度问题发生在半导体晶片的定向缺口的区域中,造成问题的原因是半导体晶片的后侧上的较厚的层厚度和材料沉积。为了解决这个问题,在US 2012/0270407 A1和JP2013-51290中提出了基座的放置表面在一个点处向内扩大,并且半导体晶片被平躺在基座上使得定向缺口在该点处靠在放置表面上。
US 2013/0264690 A1涉及具有外延层的半导体晶片、特别是在半导体晶片的边缘区域中的平坦度的改进。由ESFQRmean表示且考虑到1mm的边缘排除区域的前侧的边缘区域中的局部几何形状不大于100nm。
发明内容
尽管引用的现有技术,用于改进涂覆的半导体晶片在定向缺口的区域中的局部平坦度的需求仍然存在。
本发明的目的是提出一种解决方案,该解决方案大大地减少了在定向缺口的区域中的过量的层厚度和沉积在半导体晶片背侧上定向缺口的区域中的过量的材料。
该目的通过以下的基座被实现:所述基座用于在半导体晶片的前侧上的层的沉积期间保持具有定向缺口的半导体晶片;所述基座包括:
放置表面,用于放置半导体晶片的后侧的边缘区域;
放置表面的台阶形外定界;和
放置表面的外定界的凹口,以便将半导体晶片的后侧的边缘区域的所述定向缺口位于其中的局部区域放置在所述放置表面的由其外定界的凹口限定的局部区域上。
放置表面的外定界的凹口向内定向,且优选地具有与放置在基座上的半导体晶片的定向缺口的形状互补的形状。放置表面的外定界的凹口的存在具有确保在半导体晶片的外边缘和放置表面的外定界之间的均匀距离的效果。该距离在定向缺口的区域中和在定向缺口外的区域中基本相同。这对沉积气体的流行为有影响。流图像在定向缺口的区域中和在定向缺口外的区域中基本相同。材料沉积在半导体晶片的边缘区域中因此基本上是均匀的。
放置表面和放置表面的台阶形外定界形成具有几乎均匀直径的接近圆形的容窝,所述容窝用于容纳具有定向缺口的半导体晶片。由于放置表面的外定界的凹口,放置表面的外定界的直径在该位置处比在其余位置处更小。
放置表面的径向宽度是在放置表面的外定界和放置表面的内边缘之间的距离。放置表面的径向宽度比放置表面的外定界在凹口范围外的直径小得多。优选地不大于该直径的10%。另一方面,放置表面足够宽以便下衬在放置表面上放置的半导体晶片、完全地下衬半导体晶片的定向缺口所在的区域,即,在放置表面的外定界的凹口的区域中,放置表面具有径向宽度,由此放置表面至少延伸向内直到在放置表面的该区域上铺放的半导体晶片的定向缺口。沉积气体通过定向缺口到达半导体晶片的后侧因此变得更加困难。
放置表面的径向宽度优选是均匀的、即在放置表面的外定界的凹口的区域中与在该区域外基本上相同。在这种情况下,放置表面的向内定向的凹口在放置表面的由其外定界的凹口限定的区域中被设置。尽管如此,还可设置成放置表面在其外定界的凹口的区域中比该区域外具有更小的径向宽度。
放置表面水平或稍微向内倾斜地布置。倾斜的角度优选不大于3°。倾斜的轮廓可是直线或弯曲的。
基座可形成为环,基座包括放置表面和放置表面的外定界。此外,基座可以形成为盘,额外地包括位于盘形盘底部,所述盘形盘底部接近放置表面的内边缘并低于放置表面。此外,基座能够以两个部分的方式被形成,一个部分被形成为环,所述环包括放置表面和放置表面的外定界,另一部分被形成为承载所述环的单独的基底盘。盘底部或基底盘可以是不透气的。然而,盘底部或基底盘也可以打孔形成,以确保气体穿过孔输送。盘底部或基底盘优选具有微细孔、而不是用于该气体输送的孔。例如,微孔可以被生成在于纤维和/或颗粒被紧压到盘底部或基底盘的形状中。
基座优选包含碳化硅或使用碳化硅涂覆的诸如石墨的材料。
本发明的主题也是一种用于在具有定向缺口的半导体晶片上沉积层的方法,其特征在于
将半导体晶片放置在根据本发明的基座上,其中,半导体晶片的后侧的边缘区域的定向缺口位于其中的区域被放置在基座的放置表面的由其外定界的凹口限定的区域上;
供应处理气体至半导体晶片的前侧并令层沉积在半导体晶片的前侧上。
所述方法导致在定向缺口区域中具有沉积的层的半导体晶片的改进的平坦度和在具有沉积的层的半导体晶片的边缘区域中更均匀的平坦度。
在将半导体晶片放置在基座上之后,半导体晶片的边缘也在定向缺口的区域中基本上具有距放置表面的外定界相同的距离。如果不存在放置表面的外定界的凹口,那么该距离在定向缺口的区域中比该区域外将更大。在定向缺口的区域中比该区域外将因更大的距离沉积更多的材料,这是因为由于更大的距离,更大量的沉积气体达到半导体晶片的前侧的边缘区域。在半导体晶片的后侧的边缘区域中的沉积类似地表现。半导体晶片边缘距放置表面的外定界的更大的距离导致半导体晶片的后侧在定向缺口区域中的更强的涂层。如果放置表面向内成斜坡地倾斜和/或基座包含对沉积气体是可渗透的多孔材料、和/或盘底部或基底盘上设有规则布置的使沉积的气体更容易到达半导体晶片的后侧的孔,那么这种效果是特别显著的。
该方法优选用于在单晶半导体晶片上沉积外延层,特别优选在由单晶硅制成的半导体晶片上沉积由硅制成的外延层。由单晶硅制成的半导体晶片优选具有不小于200mm的直径,特别优选不小于300mm的直径。外延层的厚度优选不小于1.5μm的且不大于5μm。
本发明的主题也是该方法的产品,也就是由单晶硅制成的半导体晶片,所述半导体晶片具有直径、前侧、后侧、边缘区域、在所述边缘区域中的定向缺口、以及在前侧上由硅制成的外延层,其中所述外延层的厚度不小于1.5μm且不大于5μm,其特征在于半导体晶片的在定向缺口的区域中的由ESFQR表示的局部平坦度不小于5nm且不大于20nm。
ESFQR是描述在半导体晶片的前侧的边缘区域中的72个区段(扇段)的局部平坦度参数。区段的角宽度为5°且径向长度为30mm。根据本发明,其中,所述定向缺口位于的区段具有不小于5nm和不大于20nm的局部平坦度ESFQR,其中1毫米的边缘排除区域(EE)和围绕定向缺口的矩形排除区域窗(缺口排除区域窗)在ESFQR的确定中仍然未被考虑。矩形排除区域窗居中地位于定向缺口上方,且具有4mm的宽度以及2.5mm的高度。所述高度从半导体晶片的圆周沿着定向缺口的中间延伸。
半导体晶片的后侧上的沉积材料的厚度在包围定向缺口的矩形评估区上优选不大于15nm。评估区居中地位于定向缺口上方且具有8mm的宽度和3.5mm的高度。所述高度沿着定向缺口的中心延伸并具有距半导体晶片的圆周的0.5mm距离。这样一种圆的圆周是半导体晶片的圆周,其中所述圆以半导体晶片的圆心为圆心并且以半导体晶片的直径为直径。定向缺口的中心从定向缺口的顶点径向延伸直至半导体晶片的圆周。定向缺口的顶点位于定向缺口的具有距半导体晶片的中心的最小距离的位置处。
附图说明
本发明将在下文基于附图和示例进行更详细的描述。
图1示出了反应器的大体结构,反应器在用于在半导体晶片上沉积层的方法中使用。
图2在俯视图中示出了根据本发明的设计的基座。
图3示出了根据图2的基座的放置表面的区域的放大图,放置表面的区域被放置表面的外定界的凹口限定。
图4示出了根据图2的基座和额外地被放置在基座上的具有定向缺口的半导体晶片。
图5示出了基座的放置表面的区域和额外地在该区域中的放置表面的凹口的放大图,放置表面的区域被放置表面的外定界的凹口限定。
图6示出了在根据本发明的生产的半导体晶片的后侧上定向缺口的区域中的材料沉积,和沿着具有至定向缺口的顶点微小距离的线的材料沉积的高度轮廓。
图7示出并非根据本发明生产的半导体晶片的对应于图6的示意图。
具体实施方式
根据图1的反应器包括具有上冠部1、下冠部2和侧壁3的室。上和下冠部1、2对于热幅射是可穿透的,热辐射从布置在室上和下的辐射加热器发出。层由气相在半导体晶片4的前侧上沉积,原因在于沉积气体被引导越过加热的半导体晶片的前侧且此时与暴露的前侧的表面反应,同时形成层。半导体晶片的将要沉积层的侧向表面被称为前侧。在这种情况下,所述侧向表面通常是半导体晶片的抛光的侧向表面。因为层的沉积,所以半导体晶片接收由层的自由表面形成的新前侧。沉积气体通过在室的侧壁中的气体入口被供应,并且在反应后剩余的废气通过在室的侧壁中的气体出口被排出。具有其它的气体入口和其它的气体出口室的实施例是公知的。例如这些实施例被使用以将冲洗气体引入和排出室的存在于半导体晶片下方的体积。
在层的沉积期间,半导体晶片由基座5保持并与基座一起围绕基座的中心旋转。
图2在俯视图中示出了根据本发明的基座。基座5包括放置表面6和放置表面的台阶形外定界7,放置表面用于放置半导体晶片的后侧的边缘区域。放置表面从台阶形外定界7延伸直至放置表面的内边缘9。基座5具有盘的形状,盘具有底部8。底部8被布置为在比放置表面6低。台阶形外定界7具有向内定向的凹口10。凹口10大致是V形的,且因此与半导体晶片的定向缺口的形状互补成形。在凹口10的区域外的放置表面的外定界7的直径d大于将被放置的半导体晶片的直径。
在根据图3的放大图中可看出,示出的实施例的放置表面在凹口10的区域中比在该区域外宽度更小。
图4示出了根据图2的基座5,具有定向缺口12的半导体晶片11放置在基座上。半导体晶片11以其后侧的边缘区域位于放置表面6上,以使得半导体晶片的后侧的边缘区域的定向缺口12位于其中的区域被放置在放置表面6的由外定界的凹口10限定的区域上。
图5示出的基座的放置表面的外定界的凹口10的区域的放大图,基座的实施例是特别优选的。放置表面6在凹口10的区域中的宽度与该区域外的宽度相同。由于这个结果,放置表面6的向内定向的凹口13也在该区域中提供。
示例和比较例:
由单晶硅制成的具有300mm直径的半导体晶片在根据图1的反应器中用由硅制成的2.5μm厚的外延层涂覆。随后,具有定向缺口的区段的局部平坦度ESFQR通过生产商KLA-Tencor Corporation的WaferSight类型的测量装置确定,并且在定向缺口区域中的后侧的形貌通过共聚焦显微镜研究。
在外延层的沉积期间,根据示例的半导体晶片以其后侧的边缘区域被铺放在根据本发明的基座上,所述基座在放置表面的外定界的凹口区域内具有图5中示出的结构。外定界的凹口和半导体晶片的定向缺口如图4中示出相对于彼此被布置。
相反,根据比较例的半导体晶片在外延层的沉积期间被铺放在具有在US 2012/0270407 A1中所描述的结构的基座上。定向缺口被US2012/0270407 A1中示出的放置表面的突出部分下衬。
在根据示例的半导体晶片中,对于1mm的边缘排除区域,具有定向缺口的区段中的ESFQR不大于20nm,最好不大于10nm。
与此相反,在根据比较例的半导体晶片中,在具有定向缺口区段中的ESFQR不小于40nm。
图6和图7示出了根据根据示例(图6)和比较例(图7)的具有外延涂层的半导体晶片的定向缺口的区域中在后侧上的材料沉积的形貌和高度轮廓。
在共聚焦显微镜中的光学评价示出了在根据示例的半导体晶片的情况下,在定向缺口的区域几乎没有阴影(图6),而与此相反,在根据该比较例的半导体晶片的情况下,表明在该区域中的材料沉积的阴影是清晰可辨的(图7)。
在这两种情况下,材料沉积的相关的高度轮廓沿线14被确定,所述线距相应的半导体晶片的定向缺口的顶点15有1mm的距离。线被选择,这是因为在共聚焦显微镜中的评估引起预期材料沉积将具有评估区域内的最大厚度。
材料沉积的最大厚度在根据示例的半导体晶片的情况下不大于10nm(图6),但在根据该比较例的半导体晶片的情况下大于700nm(图7)。
Claims (11)
1.一种用于在半导体晶片的前侧上沉积层的期间保持具有定向缺口的所述半导体晶片的基座,包括:
放置表面,用于放置所述半导体晶片的后侧的边缘区域;
所述放置表面的台阶形外定界;和
所述放置表面的外定界的凹口,以便将所述半导体晶片的后侧的边缘区域的所述定向缺口位于其中的局部区域放置在所述放置表面的由其外定界的凹口限定的局部区域上。
2.如权利要求1中所述的基座,其特征在于,所述放置表面的凹口用于放置所述半导体晶片的后侧的边缘区域的所述定向缺口位于其中的局部区域。
3.如权利要求1或权利要求2中所述的基座,其中,所述放置表面水平布置。
4.如权利要求1或2中所述的基座,其中,所述放置表面向内倾斜地被布置,其中,倾斜的角度不大于3°。
5.如权利要求1至4中的任一项所述的基座,其中,在所述半导体晶片的放置之后,所述放置表面以其由外定界的凹口限定的区域至少延伸向内远至所述定向缺口。
6.一种用于在具有定向缺口的半导体晶片上沉积层的方法,其特征在于,将所述半导体晶片放置在如权利要求1至5中任一项所述的基座上,其中,所述半导体晶片的后侧的边缘区域的所述定向缺口位于其中的区域被放置在所述基座的放置表面的由外定界的凹口限定的区域上;
供应处理气体至所述半导体晶片的前侧并令所述层沉积在所述半导体晶片的前侧上。
7.如权利要求5中所述的方法,其中,外延层被沉积在所述半导体晶片的前侧上。
8.如权利要求6中所述的方法,其中,由硅制成的外延层被沉积在由硅制成的单晶半导体晶片上,使所述外延层的厚度不小于1.5μm且不大于5μm。
9.一种由单晶硅制成的半导体晶片,所述半导体晶片具有直径、前侧、后侧、边缘区域、所述边缘区域中的定向缺口、以及所述前侧上的由硅制成的外延层,其中所述外延层的厚度不小于1.5μm且不大于5μm,其特征在于,所述半导体晶片的在所述定向缺口的区域中的由ESFQR表示的局部平坦度不小于5nm且不大于20nm。
10.如权利要求9中所述的半导体晶片,其特征在于,所述半导体晶片具有不小于200mm的直径。
11.如权利要求9或权利要求10中所述的半导体晶片,其特征在于,在所述半导体晶片的后侧上的材料沉积是在包围所述定向缺口的矩形评估区上,其中,所述材料沉积的厚度不大于15nm。
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JP6333338B2 (ja) | 2018-05-30 |
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US20170117228A1 (en) | 2017-04-27 |
US9991208B2 (en) | 2018-06-05 |
JP2017085094A (ja) | 2017-05-18 |
TWI588934B (zh) | 2017-06-21 |
KR101945025B1 (ko) | 2019-02-01 |
TW201715641A (zh) | 2017-05-01 |
SG10201608588SA (en) | 2017-05-30 |
CN109881183B (zh) | 2021-03-30 |
US20180211923A1 (en) | 2018-07-26 |
DE102015220924A1 (de) | 2017-04-27 |
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