CN105765715A - 功率模块以及功率模块的制造方法 - Google Patents

功率模块以及功率模块的制造方法 Download PDF

Info

Publication number
CN105765715A
CN105765715A CN201480064539.1A CN201480064539A CN105765715A CN 105765715 A CN105765715 A CN 105765715A CN 201480064539 A CN201480064539 A CN 201480064539A CN 105765715 A CN105765715 A CN 105765715A
Authority
CN
China
Prior art keywords
power model
main terminal
power semiconductor
matrix material
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201480064539.1A
Other languages
English (en)
Other versions
CN105765715B (zh
Inventor
田屋昌树
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN105765715A publication Critical patent/CN105765715A/zh
Application granted granted Critical
Publication of CN105765715B publication Critical patent/CN105765715B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/35—Manufacturing methods
    • H01L2224/358—Post-treatment of the connector
    • H01L2224/3583—Reworking
    • H01L2224/35847—Reworking with a mechanical process, e.g. with flattening of the connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37005—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H01L2224/37011—Shape comprising apertures or cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H01L2224/37012—Cross-sectional shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37025—Plural core members
    • H01L2224/3703—Stacked arrangements
    • H01L2224/37032—Two-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/37124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4007—Shape of bonding interfaces, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/404—Connecting portions
    • H01L2224/4046—Connecting portions with multiple bonds on the same bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73263—Layer and strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/83815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/842—Applying energy for connecting
    • H01L2224/84201—Compression bonding
    • H01L2224/84205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/84447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/35—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00015—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3512—Cracking
    • H01L2924/35121—Peeling or delaminating

Abstract

本发明得到提高制造成品率并且确保稳定的接合强度来提高可靠性的功率模块。一种功率模块，具备：基体材料部(3)，在一个面形成电极部(4)；导体部(5)，与该基体材料部(3)的形成有电极部(4)的一个面对置地配置，并与外部电连接；以及布线部(7)，接合到形成于基体材料部(3)的一个面的电极部(4)和导体部(5)的与基体材料部(3)的一个面对置的面，对电极部(4)和导体部(5)进行电连接。

Description

功率模块以及功率模块的制造方法
技术领域
本发明涉及功率模块，特别涉及功率模块的布线构造、封装构造。
背景技术
在电路基板上安装功率半导体元件(例如IGBT(InsulatedGateBipolarTransistor，绝缘栅双极型晶体管)、MOSFET(MetalOxideSemiconductorFieldEffectTransistor，金属氧化物半导体场效应晶体管)、双极型晶体管、二极管等)并通过密封树脂封装而成的功率模块被用于例如马达驱动装置等。
关于功率模块的封装构造，被称为壳体构造的构造是主流。该壳体型是在散热用金属基体板上隔着绝缘基板安装功率半导体元件、并针对散热用金属基体板粘接壳体而成的构造。
另外，在模块内部安装的半导体元件与主电极连接。在该功率半导体元件和主电极的连接中使用导线。作为导线，一般使用线径0.1～0.5mm的铝合金制的线材。
在对导线进行超声波焊接的情况下，相邻的导线的间隔需要设定成超声波焊接工具的头与已经设置的导线不发生干扰。另外，为了使功率模块大电流化，需要增加与功率半导体元件接合的导线的根数，但功率半导体元件的尺寸受到限制，所以存在能够设置的导线的根数存在界限、难以实现大电流化这样的课题。
因此，作为用于解决该课题的变更成导线键合的方法，提出了直接引线键合并得到实用化。在直接引线键合中，通过焊料将板状的主端子(引线)和功率半导体元件进行接合。利用直接引线键合，相比于导线键合，具有能够应对大电流化、能够降低布线电阻、布线电感这样的特征(例如专利文献1)。
但是，在直接引线键合中，根据功率半导体元件和板状的主端子的线膨胀系数的差而产生的应力被施加到作为接合材料的焊料部，从而产生焊料的开裂，所以存在可靠性有问题这样的课题。对此，公开了在板状的主端子的表面形成大量金属凸块、经由该金属凸块通过超声波焊接将导体板和功率半导体元件的正面电极进行接合的方法(例如专利文献2)。在该方法中，由于大量金属凸块成为缓冲层，从而缓和对接合部施加的应力。
专利文献1：日本特开平8-8395号公报(第5页、第1图)
专利文献2：日本特开2005-183495号公报(第4页、第1、4图)
发明内容
但是，在以往的功率模块中，形成大量金属凸块，所以金属凸块的高度的均匀化困难。如果金属凸块的高度不均匀，则产生对接合没有贡献的金属凸块、或者产生一部分接合强度弱的金属凸块，从而接合部整体的接合强度降低，所以存在功率模块的可靠性降低这样的问题。
本发明是为了解决上述那样的问题而完成的，得到通过确保稳定的接合强度而能够提高可靠性的功率模块。
本发明涉及一种半导体装置，具备：基体材料部，在一个面形成电极部；导体部，与所述基体材料部对置地配置；以及布线部，连接于所述电极部和所述导体部的与所述一个面对置的面。
本发明构成为设置接合到导体部和基体材料部相对置的各面的布线部，通过布线部变弯曲来吸收由于导体部和基体材料部的线膨胀系数差而产生的变形，所以能够缓和在接合部处产生的应力，得到提高导体部和基体材料部的接合的可靠性的功率模块。
附图说明
图1是本发明的实施方式1的功率模块的剖面构造示意图。
图2是示出本发明的实施方式1的功率模块的电极部的制造方法的立体构造示意图。
图3是示出本发明的实施方式1的功率模块的电极部的制造方法的剖面构造示意图。
图4是本发明的实施方式2的功率模块的电极部的剖面构造示意图。
图5是示出本发明的实施方式2的功率模块的电极部的制造方法的剖面构造示意图。
图6是本发明的实施方式3的功率模块的剖面构造示意图。
图7是本发明的实施方式4的功率模块的电极部的剖面构造示意图。
图8是本发明的实施方式5的功率模块的电极部的剖面构造示意图。
图9是本发明的实施方式6的功率模块的电极部的剖面构造示意图。
图10是本发明的实施方式9的功率模块的剖面构造示意图。
图11是本发明的实施方式10的功率模块的剖面构造示意图。
(符号说明)
1：散热用金属基体板；2：绝缘基板；3：功率半导体元件；4：正面电极；5、10：主端子；6、12：开口；7：键合条带；8：壳体；9：超声波焊接工具；11：密封树脂；13：引线框架；14：传递模塑树脂；21：绝缘层；22、23：金属板；31：开关元件；32：回流二极管；91：头；100、200、300、400：功率模块。
具体实施方式
实施方式1
图1是本发明的实施方式1的功率模块的剖面构造示意图。在图1中，功率模块100具备散热用金属基体板1、作为第一基体材料部的绝缘基板2、作为第二基体材料部的功率半导体元件3、正面电极4、作为导体部的主端子5、10、作为开口部的开口6、作为布线部的键合条带7、壳体8、密封树脂11。
在散热用的金属基体板1上，通过焊料等(未图示)来接合绝缘基板2。绝缘基板2具备绝缘层21和金属板22、23。绝缘基板2做成在由氧化铝、氮化铝、氮化硅等陶瓷或环氧树脂等形成的绝缘层21的双面贴合铜等的金属板22、23而成的构造。虽然未图示，在正面侧的金属板23处形成布线图案。通过焊料等(未图示)，在该正面侧的金属板23接合功率半导体元件3。
功率半导体元件3使用MOSFET(MetalOxideSemiconductorFieldEffectTransistor，金属氧化物半导体场效应晶体管)、IGBT(InsulatedGateBipolarTransistor，绝缘栅双极型晶体管)等电力控制用半导体元件、回流二极管等功率半导体元件。在功率半导体元件3处，形成铝、铜等的正面电极4。该正面电极4和主端子5经由铝合金制或者铜合金制的键合条带7而电连接。在本实施方式1中，使用键合条带7，但也可以是键合导线。另外，在使用键合导线的情况下，键合导线的直径最好较粗。
主端子5是铜制的板状电极，在与功率半导体元件3对置的部位处形成开口6。键合条带7跨越形成于主端子5的开口6而形成为环状，通过作为超声波接合之一的超声波焊接将其两端焊接到主端子5。另外，键合条带7的环部分与功率半导体元件3的正面电极4进行超声波焊接。主端子5被嵌入成型或者外插到壳体8，用于电流以及电压的输入输出。另外，同样地嵌入成型或者外插于壳体8的其他的主端子10通过焊料等接合到绝缘基板2的正面侧的金属板22。通过粘接剂对散热用金属基体板1粘接壳体8。另外，出于确保模块内部的绝缘性的目的，在由壳体8和散热用金属基体板1包围的区域内，填充硅凝胶、环氧树脂等绝缘性的密封树脂11。
图2是示出本发明的实施方式1的功率模块的电极部的制造方法的立体构造示意图。另外，图3是示出本发明的实施方式1的功率模块的电极部的制造方法的剖面构造示意图。图2以及图3是特别说明使用键合条带7的功率半导体元件3的正面电极4与主端子5的接合工序的图。
本发明的实施方式1的功率模块能够通过以下说明的工序来制造。通过将散热用金属基体板1、焊料、绝缘基板2、焊料、功率半导体元件3依次重叠并进行回流焊接，对散热用金属基体板1、绝缘基板2以及功率半导体元件3进行焊料接合。接下来，针对散热用金属基体板1，通过粘接剂粘接壳体8。在壳体8处，预先通过如下所示的工序，嵌入成型有超声波焊接了键合条带7的主端子5。
如图2(a)所示，在主端子5处形成开口6。接下来，如图2(b)以及图3(a)所示，在使用超声波接合将布线部接合到导体部的工序中，跨越主端子5的开口6地进行条带键合，将键合条带7的两端超声波焊接到主端子5。在条带键合的形成中，使用市面销售的条带连接器即可。
接下来，在针对以跨越形成于主端子5的开口6的方式超声波焊接了键合条带7的主端子5，如图2(c)以及图3(b)所示地使导体部旋转以使接合有布线部的面侧成为下表面的工序中，使主端子5的超声波焊接有键合条带7的面侧与功率半导体元件3的正面电极4对置。在该状态下，进行壳体8和散热用金属基体板1的粘接以及主端子10和绝缘基板2的焊料接合。
接下来，如图3(c)所示，导体部具有开口部，在使用穿过开口部的键合夹具将布线部利用超声波接合而接合到形成于基体材料部的电极部的工序中，将作为键合夹具的超声波焊接工具9的头91插入到开口6的内侧，对键合条带7的环部分和功率半导体元件3的正面电极4进行超声波焊接。
接下来，在树脂密封工序中，使硅凝胶、环氧树脂等绝缘性的密封树脂11注入硬化，对由壳体8和散热用金属基体板1包围而成的区域内部进行密封。由此，绝缘基板2、功率半导体元件3、正面电极4、主端子5、10、开口6以及键合条带7被树脂密封。
通过以上的工序，能够制造本实施方式1的功率模块。通过这样的工序，键合条带7能够与功率半导体元件3的正面电极4直接进行超声波焊接，所以能够确保稳定的接合强度。
此处，根据功率半导体元件3的尺寸和电流容量以及超声波焊接工具9的尺寸来决定形成于主端子5的开口6的大小即可。需要使开口6的大小大于超声波焊接工具9的头91的尺寸且在超声波焊接时不与头91发生干扰。根据功率半导体元件3的额定电流来决定超声波焊接所需的最小面积，所以将头91的尺寸设定为该所需最小面积以上即可。
另外，当在功率半导体元件3中流过最大额定电流时，需要以使功率半导体元件3的温度不由于键合条带7中的发热而超过容许值的方式，决定键合条带7的厚度和宽度。通过冲压加工、切削加工形成开口6即可。开口6的形状在图中设为矩形，但不一定限定于矩形，只要是与超声波焊接工具9的头91不发生干扰的形状即可。进而，作为接合形成方法，使用超声波焊接，但不限于该方法，能够与所使用的材料等相符合地适当选择接合形成方法。
在如以上那样构成的功率模块中，用键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件3，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
实施方式2
在本实施方式2中，在以下方面不同，即：去掉在实施方式1中使用的具备开口6的主端子5的开口6，键合条带7的一端被超声波焊接到主端子5的与功率半导体元件3对置的面侧，键合条带7的另一端被超声波焊接到功率半导体元件3的正面电极4。这样利用键合条带7的附近来进行接合，所以能够降低所使用的键合条带7的量。
图4是本发明的实施方式2的功率模块的电极部的剖面构造示意图。在图4中，功率半导体元件3和主端子5的接合部分具备功率半导体元件3、正面电极4、主端子5、键合条带7。在主端子5处，没有开口6，并且与功率半导体元件3的形成有正面电极4的面侧对置地配置。键合条带7的一端被超声波焊接到主端子5的与功率半导体元件3对置的面侧。另外，键合条带7的另一端被超声波焊接到功率半导体元件3的正面电极4。
图5是示出本发明的实施方式2的功率模块的电极部的制造方法的剖面构造示意图。如图5(a)所示，在布线部接合工序中，在主端子5的与功率半导体元件3对置的面侧，超声波焊接键合条带7的一端。此时，键合条带7的另一端(另外一端)配置成在从主端子5的与功率半导体元件3对置的面的背面侧观察时不与主端子5重叠。接下来，如图5(b)所示，使超声波焊接有键合条带7的面和功率半导体元件3的正面电极4对置地配置超声波焊接有键合条带7的一端的主端子5。接下来，如图5(c)所示，在使用超声波接合将布线部接合到形成于基体材料部的电极部的工序中，使用超声波焊接工具9，将键合条带7的未与主端子5接合的另一端与功率半导体元件3的正面电极4进行超声波焊接。这样，通过键合条带7将本实施方式2中的主端子5与功率半导体元件3的正面电极4进行接合。另外，作为接合形成方法而使用超声波焊接，但不限于该方法，能够与所使用的材料等相符合地适当选择接合形成方法。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，无需在主端子5处形成开口6，所以在制造主端子5方面，材料利用效率提高。进而，能够削减接合部位数量，所以能够实现制造成品率的提高以及交付时间的缩小。另外，主端子5和功率半导体元件3的配置的自由度增加，所以特别是在功率半导体元件3的正面电极4的尺寸小的情况下，设计变得容易。
进而，能够将在主端子5和功率半导体元件3的接合中使用的键合条带7的长度设为最小限度，所以键合条带7中的电阻变小，能够减小通电时的键合条带7中的发热量，所以具有提高接合的可靠性的效果。进而，能够将键合条带7的长度设为最小限度，所以功率半导体元件3与主端子5之间的热导率变小，功率半导体元件3中的通电时的发热能够经由键合条带7高效地散到主端子5，所以能够抑制功率半导体元件3的温度上升，能够提高接合的可靠性。另外，相比于实施方式1的情况，缓和超声波焊接工具9的头91的尺寸的限制。
实施方式3
在本实施方式3中，在以下方面不同，即：针对在实施方式1中使用的将主端子10和绝缘基板2焊料接合的接合部分，与主端子5的情况同样地，在主端子10处形成开口6，经由键合条带7而与绝缘基板2接合。这样，能够在同一工序中形成主端子5以及主端子10的接合，能够削减工序数。另外，能够提高主端子10和绝缘基板2的接合的可靠性。
图6是本发明的实施方式3的功率模块的剖面构造示意图。在图6中，功率模块200具备散热用金属基体板1、绝缘基板2、功率半导体元件3、正面电极4、主端子5、10、开口6、键合条带7、壳体8、密封树脂11。在作为实施方式1的图1中，主端子10和绝缘基板2通过焊料而接合，但在本实施方式3中，与主端子5的情况同样地，做成在主端子10处形成开口6并经由键合条带7与绝缘基板2接合的结构。
在散热用金属基体板1上，通过焊料等(未图示)接合绝缘基板2。绝缘基板2具备绝缘层21和金属板22、23。绝缘基板2做成在由氧化铝、氮化铝、氮化硅等陶瓷或环氧树脂等形成的绝缘层21的双面贴合铜等的金属板22、23而成的构造。虽然未图示，在正面侧的金属板23形成布线图案。通过焊料等(未图示)对该正面侧的金属板23接合功率半导体元件3。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件3，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
进而，在主端子10处也设置开口6，通过键合条带7将主端子10和绝缘基板2相对置的面进行接合，所以能够在同一工序中形成主端子5以及主端子10的接合，能够削减工序数量。另外，能够提高主端子10和绝缘基板2的接合的可靠性。
实施方式4
在本实施方式4中，在以下方面不同，即：做成在多个部位形成在实施方式1中使用的主端子5的开口6并且将经由键合条带7的接合部位设为多个的结构。通过这样增加接合部位，能够使功率半导体元件3的电流密度增加。另外，在功率半导体元件3的电流密度相同的情况下，能够减小在各键合条带7中流过的电流密度，所以能够进一步提高接合的可靠性。
图7是本发明的实施方式4的功率模块的电极部的剖面构造示意图。在图7中，功率半导体元件3和主端子5的接合部分具备功率半导体元件3、正面电极4、主端子5、开口6、键合条带7。在图7中，将与功率半导体元件3的正面电极4的接合部位设为2处，但也可以将接合部位设为2处以上。另外，在主端子5的长度方向上排列地配置多个接合部位，但不限于这样的配置，也可以在功率半导体元件3的正面电极4存在的范围内，任意地配置接合部位、朝向。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件3，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
进而，通过将主端子5的开口6设为多个部位，增加与功率半导体元件3的正面电极4的接合部位，能够增加功率半导体元件3的电流密度。另外，在功率半导体元件3的电流密度相同的情况下，能够减小在各键合条带7中流过的电流密度，所以能够进一步提高接合的可靠性。
实施方式5
在本实施方式5中，在以下方面不同，即：在多个部位形成在实施方式4中使用的主端子5的开口6，将与主端子5的多个部位处的经由键合条带7的接合设为缝合(stitch)连接。这样，通过设为缝合连接而进行超声波焊接的部位数量减少，所以能够缩短工序的交付时间。
图8是本发明的实施方式5的功率模块的电极部的剖面构造示意图。在图8中，功率半导体元件3和主端子5的接合部分具备功率半导体元件3、正面电极4、主端子5、开口6、键合条带7。
在图8中，将与功率半导体元件3的正面电极4的接合部位设为2处，但也可以将与功率半导体元件3的正面电极4的接合部位设为2处以上。另外，通过将多个部位的经由键合条带7的接合设为缝合连接，相比于跨越各个开口6地将键合条带7接合到主端子5的情况，能够减少对主端子5进行超声波焊接的接合部位。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件3，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
进而，将主端子5和键合条带7的接合设为缝合连接，所以进行超声波焊接的部位数量减少，所以能够缩短工序的交付时间。
实施方式6
在本实施方式6中，在以下方面不同，即：做成在实施方式4中使用的主端子5的与功率半导体元件3对置的面内并且不形成键合条带7的部位处也形成1个以上的开口12的结构。这样，能够提高向主端子5与功率半导体元件3之间注入密封树脂11的注入性，能够提高制造成品率。
图9是本发明的实施方式6的功率模块的电极部的剖面构造示意图。在图9中，功率半导体元件3和主端子5的接合部分具备功率半导体元件3、正面电极4、主端子5、开口6、键合条带7、开口12。做成在主端子5的与功率半导体元件3对置的面内并且不形成键合条带7的部位处也形成1个以上的开口12的结构。通过做成这样的结构，能够提高向主端子5与功率半导体元件3之间注入密封树脂11的注入性，能够提高制造成品率。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件3，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
进而，在1个部位以上设置主端子5的未跨越形成有键合条带7的开口6，所以能够提高向主端子5与功率半导体元件3之间注入密封树脂11的注入性，能够提高制造成品率。
实施方式7
在本实施方式7中，在以下方面不同，即：如针对在实施方式4以及5中使用的主端子5和功率半导体元件3的接合而将接合部位设为多个那样，关于实施方式3中的主端子10与绝缘基板2之间的接合也做成将接合部位设为多个的结构。这样，关于主端子10与绝缘基板2之间的接合，也能够提高接合的可靠性。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件3，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
进而，在多个部位设置主端子10的开口6，所以主端子10与绝缘基板2之间的接合部位增加，所以具有关于主端子10和绝缘基板2的接合也能够提高接合的可靠性的效果。
实施方式8
在实施方式6中构成为关于所使用的主端子5和功率半导体元件3的接合，在不形成键合条带7的部位处也形成1个以上的开口12，而在本实施方式8中，构成为关于实施方式8中的主端子10与绝缘基板2之间的接合，也是在不形成键合条带7的部位处也形成1个以上的开口12，在这一点上不同。这样，通过在主端子10处设置开口12，关于主端子10与绝缘基板2之间的接合，也能够提高密封树脂11的注入性。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件3相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件3的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件3的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件3的剥离，提高主端子5和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件3，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
进而，在1个部位以上设置主端子10的未跨越形成有键合条带7的开口12，所以能够提高向主端子10与绝缘基板2之间注入密封树脂11的注入性，能够提高制造成品率。
实施方式9
在本实施方式9中，在以下方面不同，即：将在实施方式1中使用的与主端子5接合的功率半导体元件3设为1个的结构做成将主端子5接合到多个功率半导体元件3的结构。
图10是本发明的实施方式9的功率模块的剖面构造示意图。在图10中，功率模块300具备散热用金属基体板1、绝缘基板2、功率半导体元件31、32、正面电极4、主端子5、10、开口6、键合条带7、壳体8、密封树脂11。此处，图示出与2个功率半导体元件31以及32接合的结构。
在散热用的金属基体板1上，通过焊料等(未图示)接合绝缘基板2。绝缘基板2具备绝缘层21和金属板22、23。绝缘基板2做成在由氧化铝、氮化铝、氮化硅等陶瓷或环氧树脂等形成的绝缘层21的双面贴合铜等的金属板22、23而成的构造。虽然未图示，在正面侧的金属板23处形成布线图案。通过焊料等(未图示)对该正面侧的金属板23接合功率半导体元件31、32。
在用于马达驱动用途等的功率模块中，作为其基本动作，对电流以及电压进行开关。在对马达等感应性负载进行开关的情况下，需要反并联地连接回流二极管。如图8所示，作为2个功率半导体元件，将开关元件31和回流二极管32分别接合到主端子5，从而能够实现上述电路。
在如以上那样构成的功率模块中，通过键合条带7将主端子5和功率半导体元件31、32相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于主端子5和功率半导体元件31、32的线膨胀系数差而产生的变形。其结果，缓和在主端子5和功率半导体元件31、32的接合部处产生的应力，所以能够抑制主端子5和功率半导体元件31、32的剥离，提高主端子5和功率半导体元件31、32的接合的可靠性。
另外，能够尽可能地以最短距离接合主端子5和功率半导体元件31、32，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
实施方式10
在本实施方式10中，在以下方面不同，即：将在实施方式1～9中使用的壳体型的功率模块设为传递模塑型的功率模块。这样，通过设为传递模塑型，能够进行一并成形，能够降低制造成本、提高生产性。
图11是本发明的实施方式10的功率模块的剖面构造示意图。在图11中，功率模块400具备绝缘基板2、功率半导体元件31、32、正面电极4、开口6、键合条带7、壳体8、密封树脂11、引线框架13。主端子5以及10被置换为引线框架13。另外，将密封树脂11的注入工序置换为基于传递模塑树脂14的一并成形。在图11中，做成没有散热用金属基体板1的结构，但也可以与壳体型同样地做成有散热用金属基体板1的结构。
绝缘基板2具备绝缘层21和金属板22、23。绝缘基板2做成在由氧化铝、氮化铝、氮化硅等陶瓷或环氧树脂等形成的绝缘层21的双面贴合铜等的金属板22、23而成的构造。虽然未图示，在正面侧的金属板23处形成布线图案。通过焊料等(未图示)对该正面侧的金属板23接合功率半导体元件31、32。
在如以上那样构成的功率模块中，通过键合条带7将引线框架13和功率半导体元件31、32相对置的面进行接合，所以能够通过键合条带7变弯曲来吸收由于引线框架13和功率半导体元件31、32的线膨胀系数差而产生的变形。其结果，缓和在引线框架13和功率半导体元件31、32的接合部处产生的应力，所以能够抑制引线框架13和功率半导体元件31、32的剥离，提高引线框架13和功率半导体元件3的接合的可靠性。
另外，能够尽可能地以最短距离接合引线框架13和功率半导体元件31、32，能够减小功率模块通电时的键合条带7中的电阻。其结果，通电时的键合条带7中的发热量变小，功率模块的温度上升被抑制，从而能够实现功率模块的大电流化。
进而，采用传递模塑成形，所以能够进行一并成形，能够降低制造成本、提高生产性。

Claims (17)

1.一种功率模块，其特征在于，具备：
基体材料部，在一个面形成电极部；
导体部，与所述基体材料部对置地配置；以及
布线部，连接于所述电极部和所述导体部的与所述一个面对置的面。
2.根据权利要求1所述的功率模块，其特征在于，
关于所述布线部，所述布线部的一端与所述电极部接合，所述布线部的另一端与所述导体部的与所述一个面对置的面接合。
3.根据权利要求2所述的功率模块，其特征在于，
所述导体部具有开口部，在与所述开口部对应的位置，所述布线部的另一端与所述电极部接合。
4.根据权利要求1所述的功率模块，其特征在于，
所述导体部具有开口部，所述布线部跨越所述开口部而两端与所述导体部接合，在与所述开口部对应的位置，一部分与所述电极部接合。
5.根据权利要求3或者4所述的功率模块，其特征在于，
在所述导体部处设置多个所述开口部。
6.根据权利要求5所述的功率模块，其特征在于，
在所述导体部，跨越所述多个开口部地形成所述布线部。
7.根据权利要求5所述的功率模块，其特征在于，
所述导体部具有未跨越形成所述布线部的所述开口部。
8.根据权利要求1～7中的任意一项所述的功率模块，其特征在于，
所述基体材料部具备第一基体材料部和第二基体材料部。
9.根据权利要求8所述的功率模块，其特征在于，
具有多个所述第二基体材料部。
10.根据权利要求8或者9所述的功率模块，其特征在于，
所述第一基体材料部是绝缘基板。
11.根据权利要求8～10中的任意一项所述的功率模块，其特征在于，
所述第二基体材料部是半导体元件。
12.根据权利要求1～11中的任意一项所述的功率模块，其特征在于，
使用壳体对所述基体材料部、所述导电部以及所述带状导电部进行树脂密封。
13.根据权利要求1～11中的任意一项所述的功率模块，其特征在于，
使用传递模塑树脂对所述基体材料部、所述导电部以及所述带状导电部进行密封。
14.根据权利要求1～13中的任意一项所述的功率模块，其特征在于，
所述布线部是导线或者条带。
15.一种功率模块的制造方法，其特征在于，具备：
使用超声波接合将布线部接合到导体部的工序；
使所述导体部旋转以使接合所述布线部的侧面成为下表面的工序；以及
使用超声波接合将所述布线部接合到形成于基体材料部的电极部的工序。
16.根据权利要求15所述的功率模块的制造方法，其特征在于，
所述导体部具有开口部，
所述功率模块的制造方法具备如下工序：使用穿过所述开口部的键合夹具，利用超声波接合将所述布线部接合到形成于所述基体材料部的所述电极部。
17.根据权利要求15或者16所述的功率模块的制造方法，其特征在于，
所述布线部是导线或者条带。
CN201480064539.1A 2013-11-26 2014-07-31 功率模块以及功率模块的制造方法 Active CN105765715B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013243924 2013-11-26
JP2013-243924 2013-11-26
PCT/JP2014/004028 WO2015079600A1 (ja) 2013-11-26 2014-07-31 パワーモジュール、及びパワーモジュールの製造方法

Publications (2)

Publication Number Publication Date
CN105765715A true CN105765715A (zh) 2016-07-13
CN105765715B CN105765715B (zh) 2018-08-03

Family

ID=53198582

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480064539.1A Active CN105765715B (zh) 2013-11-26 2014-07-31 功率模块以及功率模块的制造方法

Country Status (5)

Country Link
US (1) US9673118B2 (zh)
JP (1) JP6143884B2 (zh)
CN (1) CN105765715B (zh)
DE (1) DE112014005415B4 (zh)
WO (1) WO2015079600A1 (zh)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105706236A (zh) * 2014-01-27 2016-06-22 三菱电机株式会社 电极端子、电力用半导体装置以及电力用半导体装置的制造方法
WO2020187312A1 (zh) * 2019-03-20 2020-09-24 华为技术有限公司 移相器、天线及基站
CN112038245A (zh) * 2020-07-22 2020-12-04 无锡利普思半导体有限公司 一种功率模块内部绑定线的连接工艺
WO2021248954A1 (zh) * 2020-06-12 2021-12-16 无锡利普思半导体有限公司 一种功率半导体模块
WO2023024450A1 (zh) * 2021-08-23 2023-03-02 无锡利普思半导体有限公司 功率模块内部连接铜片及其制备方法、功率半导体模块

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016136457A1 (ja) * 2015-02-25 2016-09-01 三菱電機株式会社 パワーモジュール
JP6540324B2 (ja) * 2015-07-23 2019-07-10 富士電機株式会社 半導体モジュール及び半導体モジュールの製造方法
KR102543528B1 (ko) * 2015-12-07 2023-06-15 현대모비스 주식회사 전력 모듈 패키지 및 그 제조방법
JP6790684B2 (ja) * 2016-09-30 2020-11-25 富士電機株式会社 半導体装置
JP6809294B2 (ja) * 2017-03-02 2021-01-06 三菱電機株式会社 パワーモジュール
CN110891726B (zh) * 2017-04-04 2021-08-24 库利克和索夫工业公司 超声焊接系统及其使用方法
JP6907670B2 (ja) 2017-04-17 2021-07-21 三菱電機株式会社 半導体装置および半導体装置の製造方法
JP6833986B2 (ja) * 2017-05-11 2021-02-24 三菱電機株式会社 パワーモジュール、電力変換装置、およびパワーモジュールの製造方法
JP6461441B1 (ja) * 2017-07-03 2019-01-30 三菱電機株式会社 半導体装置
US10002821B1 (en) 2017-09-29 2018-06-19 Infineon Technologies Ag Semiconductor chip package comprising semiconductor chip and leadframe disposed between two substrates
US11908822B2 (en) * 2019-04-09 2024-02-20 Mitsubishi Electric Corporation Power semiconductor module and power conversion apparatus
EP3863045A1 (en) * 2020-02-04 2021-08-11 Infineon Technologies AG Power semiconductor module arrangement and method for producing the same
WO2023042372A1 (ja) * 2021-09-17 2023-03-23 三菱電機株式会社 半導体装置、及び半導体装置の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001045634A (ja) * 1999-08-02 2001-02-16 Sumitomo Wiring Syst Ltd ジャンクションブロックの回路導体接合構造
JP2010092918A (ja) * 2008-10-03 2010-04-22 Toyota Industries Corp 板状電極とブロック状電極との接続構造及び接続方法
CN101996982A (zh) * 2009-08-19 2011-03-30 株式会社电装 电子装置及其制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3022178B2 (ja) 1994-06-21 2000-03-15 日産自動車株式会社 パワーデバイスチップの実装構造
DE10223035A1 (de) * 2002-05-22 2003-12-04 Infineon Technologies Ag Elektronisches Bauteil mit Hohlraumgehäuse, insbesondere Hochfrequenz-Leistungsmodul
JP4265394B2 (ja) 2003-12-17 2009-05-20 株式会社日立製作所 電力変換装置
JP4524570B2 (ja) 2004-03-10 2010-08-18 富士電機システムズ株式会社 半導体装置
JP2009081198A (ja) 2007-09-25 2009-04-16 Toshiba Corp 半導体装置
JP2009231685A (ja) * 2008-03-25 2009-10-08 Mitsubishi Electric Corp パワー半導体装置
DE102009002191B4 (de) * 2009-04-03 2012-07-12 Infineon Technologies Ag Leistungshalbleitermodul, Leistungshalbleitermodulanordnung und Verfahren zur Herstellung einer Leistungshalbleitermodulanordnung
JP2012209444A (ja) * 2011-03-30 2012-10-25 Panasonic Corp 半導体装置の製造方法および半導体装置
JP2012227320A (ja) * 2011-04-19 2012-11-15 Hitachi Cable Ltd 半導体装置
CN104838493B (zh) * 2012-11-28 2017-07-14 三菱电机株式会社 功率模块
US9275926B2 (en) * 2013-05-03 2016-03-01 Infineon Technologies Ag Power module with cooling structure on bonding substrate for cooling an attached semiconductor chip
WO2015004832A1 (ja) * 2013-07-11 2015-01-15 三菱電機株式会社 パワーモジュール

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001045634A (ja) * 1999-08-02 2001-02-16 Sumitomo Wiring Syst Ltd ジャンクションブロックの回路導体接合構造
JP2010092918A (ja) * 2008-10-03 2010-04-22 Toyota Industries Corp 板状電極とブロック状電極との接続構造及び接続方法
CN101996982A (zh) * 2009-08-19 2011-03-30 株式会社电装 电子装置及其制造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105706236A (zh) * 2014-01-27 2016-06-22 三菱电机株式会社 电极端子、电力用半导体装置以及电力用半导体装置的制造方法
WO2020187312A1 (zh) * 2019-03-20 2020-09-24 华为技术有限公司 移相器、天线及基站
CN111725592A (zh) * 2019-03-20 2020-09-29 华为技术有限公司 移相器、天线及基站
WO2021248954A1 (zh) * 2020-06-12 2021-12-16 无锡利普思半导体有限公司 一种功率半导体模块
CN112038245A (zh) * 2020-07-22 2020-12-04 无锡利普思半导体有限公司 一种功率模块内部绑定线的连接工艺
CN112038245B (zh) * 2020-07-22 2022-11-18 无锡利普思半导体有限公司 一种功率模块内部绑定线的连接工艺
WO2023024450A1 (zh) * 2021-08-23 2023-03-02 无锡利普思半导体有限公司 功率模块内部连接铜片及其制备方法、功率半导体模块

Also Published As

Publication number Publication date
US20160300770A1 (en) 2016-10-13
DE112014005415B4 (de) 2020-01-23
WO2015079600A1 (ja) 2015-06-04
JP6143884B2 (ja) 2017-06-07
US9673118B2 (en) 2017-06-06
DE112014005415T5 (de) 2016-08-04
JPWO2015079600A1 (ja) 2017-03-16
CN105765715B (zh) 2018-08-03

Similar Documents

Publication Publication Date Title
CN105765715A (zh) 功率模块以及功率模块的制造方法
US9490200B2 (en) Semiconductor device
JP6234630B2 (ja) パワーモジュール
CN103370788B (zh) 半导体装置及其制造方法
US9312211B2 (en) Semiconductor device and manufacturing method thereof
CN205752150U (zh) 半导体装置
CN102136472B (zh) 半导体装置模块
US10529656B2 (en) Semiconductor device
TW201816973A (zh) 模壓智慧電源模組
CN104303299B (zh) 半导体装置的制造方法及半导体装置
CN105720046A (zh) 半导体模块以及半导体装置
WO2018131276A1 (ja) 半導体装置
CN202487565U (zh) 半导体装置
CN105161467A (zh) 一种用于电动汽车的功率模块
CN104465757A (zh) 半导体装置及其制造方法
KR101644913B1 (ko) 초음파 용접을 이용한 반도체 패키지 및 제조 방법
US20190122998A1 (en) Semiconductor device and method for manufacturing the same
CN107818963A (zh) 半导体装置及半导体装置的制造方法
CN114586151A (zh) 半导体装置、功率转换装置以及半导体装置的制造方法
JP2014154770A (ja) 半導体装置、及び、半導体装置の製造方法
CN110880496B (zh) 电机用模制智能电源模块
US10872846B2 (en) Solid top terminal for discrete power devices
CN106133896B (zh) 半导体模块
JP2012238737A (ja) 半導体モジュール及びその製造方法
JP7479771B2 (ja) 半導体装置、半導体装置の製造方法及び電力変換装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant