CN105706236A - 电极端子、电力用半导体装置以及电力用半导体装置的制造方法 - Google Patents
电极端子、电力用半导体装置以及电力用半导体装置的制造方法 Download PDFInfo
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- CN105706236A CN105706236A CN201580002395.1A CN201580002395A CN105706236A CN 105706236 A CN105706236 A CN 105706236A CN 201580002395 A CN201580002395 A CN 201580002395A CN 105706236 A CN105706236 A CN 105706236A
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Abstract
电极端子(62)具备:第一引出部(621),与主电极接合;以及第二引出部(622),以从与主电极隔开间隔地对置配置的一端部至与外部电路连接的另一端部连续的方式,通过板材而形成,在一端部的向主电极的对置面(622f)接合了第一引出部(621)的与主电极接合的部分的邻接部,第一引出部(621)被形成为与主电极接合的部分远离对置面(622f),在第二引出部(622)处,形成了与主电极对应的开口部(622a)。
Description
技术领域
本发明涉及用于连接电力用半导体元件的表面侧的主电极和外部电路的电极端子以及使用它的电力用半导体装置和其制造方法。
背景技术
在从工业设备到家电·信息终端的所有产品中电力用半导体装置得到普及,关于在家电上搭载的电力用半导体装置,与小型轻质化一起,还要求能够对应于多品种的高的生产率和高的可靠性。另外,在动作温度高且效率优良这一点上,还同时要求是能够应用于成为今后的主流的可能性高的碳化硅(SiC)半导体的封装方式。
在电力用半导体装置中,为了处置高电压·大电流,一般通过对电力用半导体元件的表面侧的主电极布置多根例如达到φ0.5mm的粗的铝等导线键合而形成电路。相对于此,以改善生产率等为目的,使用焊锡来接合引线框那样的金属板的布线部件和主电极的电力用半导体装置、或者将宽幅的铝带超声波接合到主电极的电力用半导体装置正得到普及。
铝带相比于导线键合部,截面积更大,在提高生产率的同时,也容易使电流容量增大。但是,如果距离变长,则与导线键合部同样地,发热变大。因此,无法从主电极直接导出到外部,需要经由与陶瓷基板的连接,通过铜制的母线等连接到外部端子。其结果,陶瓷基板变大,成本增大,并且模块整体变大,伴随与金属部件之间的热膨胀系数差的热应力也增大,有可能对接合部的可靠性也造成恶劣影响。另外,在使用焊锡那样的焊剂材料的情况下,半导体元件的表面电极的大部分是铝,所以需要通过铜、镍镀覆处理等,针对主电极表面,用能够与焊锡接合的金属进行金属化,工序变得复杂。
因此,提出了通过超声波接合来将在主电极上形成为拱状的包覆(clad)带针对电极板进行焊锡接合的方法(参照例如专利文献1)。
专利文献1:日本特开2011-216822号公报(第0024~0032段、图1~图2)
发明内容
但是,在该方法中,需要供给焊锡的工序,并且接合部被电极板覆盖,存在接合状态的检查困难这样的问题。另外,为了使得在焊锡接合时自我维持为拱状,需要增加带的厚度,有可能由于超声波接合、带切断而对电力用半导体元件造成损伤。特别,切断包覆带那样的刚性高的材料的情况下的碰撞大,为了避免向主电极的碰撞,需要在经过与基板的连接之后再切断。因此,在该情况下,在基板上还需要用于连接包覆带的多余的空间,模块变大而热应力增大,可靠性有可能降低。
本发明是为了解决上述那样的课题而完成的,其目的在于提供一种无需使主电极金属化而对应于大电流的可靠性高的电力用半导体装置。
本发明提供一种电极端子,用于连接电力用半导体元件的主电极和外部电路,所述电极端子的特征在于,具备:第一引出部,与所述主电极接合;以及第二引出部,以从相对于所述主电极隔开间隔地对置配置的一端部至与所述外部电路连接的另一端部为止连续的方式,通过板材来形成所述第二引出部,对所述一端部的向所述主电极的对置面,接合了所述第一引出部的与所述主电极接合的部分的邻接部,所述第一引出部被形成为使与所述主电极接合的部分远离所述对置面,并且在所述第二引出部处,形成有与所述主电极对应的开口部或者切口部。
另外,本发明提供一种电力用半导体装置,其特征在于,具备:电路基板;电力用半导体元件,与所述电路基板接合;以及所述电极端子,所述电力用半导体元件的主电极和所述第一引出部在母材彼此之间进行接合。
另外,本发明提供一种电力用半导体装置的制造方法,是制造所述电力用半导体装置的方法,所述电力用半导体装置的制造方法的特征在于,包括:对所述电路基板接合所述电力用半导体元件的工序;使所述开口部和所述主电极的位置对齐,针对所述电路基板固定所述电极端子的工序;以及从所述开口部插入夹具,通过超声波接合或者真空压接来接合所述第一引出部和所述主电极的工序。
根据本发明的电极端子,即使不使主电极金属化,也无需在基板上设置多余的空间而能够抑制向电力用半导体元件的碰撞,形成对应于大电流的主电力路径,所以能够得到对应于大电流的可靠性高的电力用半导体装置。
附图说明
图1是用于说明本发明的实施方式1的电极端子以及使用它的电力用半导体装置的结构的平面图和剖面图。
图2是用于说明本发明的实施方式1的电极端子以及使用它的电力用半导体装置的结构的立体图。
图3是用于说明本发明的实施方式1的电极端子以及使用它的电力用半导体装置的制造方法的每个工序的剖面图。
图4是用于说明本发明的实施方式1的变形例的电极端子的制造方法的每个工序的局部剖面图。
图5是用于说明本发明的实施方式1的变形例的电极端子以及使用它的电力用半导体装置的结构的平面图。
图6是用于说明本发明的实施方式1的变形例的电极端子以及使用它的电力用半导体装置的结构的剖面图。
图7是用于说明本发明的实施方式1的变形例的电极端子以及使用它的电力用半导体装置的结构的剖面图。
图8是用于说明本发明的实施方式1的变形例的电极端子以及使用它的电力用半导体装置的结构的剖面图。
图9是用于说明本发明的实施方式1的其他电极端子以及使用它的电力用半导体装置的结构的剖面图。
图10是用于说明本发明的实施方式2的电极端子以及使用它的电力用半导体装置的结构的平面图和剖面图。
(符号说明)
1:电力用半导体装置;2:陶瓷基板(电路基板);2a、2b:导电层;2i:陶瓷基体材料;3:电力用半导体元件;4:焊锡(接合部);5:信号电路;6:主电流电路;7:密封体;8:壳体;9:粘接剂;61:引线端子;62:电极引线;621、623、624、625:第一引出部;621b、625b:突出部;622、626:第二引出部;622a、626a:开口部;622f、626f:对置面;901:超声波接合工具(夹具);902:基体。
具体实施方式
实施方式1.
图1~图3是用于说明本发明的实施方式1的电极端子和使用它的电力用半导体装置的结构以及制造方法的图,图1(a)是从电力用半导体装置去掉了密封树脂的状态下的平面图,图1(b)是电力用半导体装置的剖面图,切断位置对应于图1(a)的A-A线。图2是从电力用半导体装置去掉了密封树脂的状态下的立体图。另外,图3(a)~(d)是用于说明电极端子以及使用它的电力用半导体装置的制造方法的每个工序的剖面图。
另外,图4(a)~(d)是用于说明变形例(第一)的电极端子的制造方法的每个工序的局部剖面图。进而,图5~图8分别是用于说明变形例(第二~第五)的电极端子和电力用半导体装置的结构的图。图5是用于说明第二变形例的电极端子以及使用它的电力用半导体装置的结构的去掉了密封树脂的状态下的平面图。图6~图8是用于说明第三~第五变形例的电极端子以及使用它的电力用半导体装置的结构的剖面图。图9是用于说明实施方式1的其他电极端子以及使用它的电力用半导体装置的结构的去掉了密封树脂的状态下的平面图。另外,上述剖面图以及局部剖面图的切断位置对应于图1(a)的A-A线。
在本实施方式1的电力用半导体装置1中,如图1以及图2所示,对作为电路基板的陶瓷基板2的导电层2a,通过焊锡4(Sn-Ag-Cu:熔点219℃)管芯键合(接合)电力用半导体元件3。
作为陶瓷基板2,使用在50mm×25mm×厚度0.635mm的氧化铝(Al2O3)制的陶瓷基体材料2i的两面形成有厚度0.4mm的铜的导电层2a、2b的基板。电力用半导体元件3是使用作为宽带隙半导体材料的SiC的元件,作为开关元件,使用形成厚度0.25mm、15mm见方的矩形板状的IGBT(InsulatedGateBipolarTransistor,绝缘栅双极型晶体管)3S,作为整流元件,使用形成厚度0.25mm、13mm×15mm的矩形板状的二极管3R。
对电力用半导体元件3的各主电极中的包括IGBT3S的发射极电极3e的表面的主电极,接合了作为本发明的特征的电极端子62。另外,对接合有包括IGBT3S的集电极电极3c的背面的电极的导电层2a,接合宽度5mm×厚度0.7mm的铜板制的引线端子61。
使用粘接剂9,在PPS(PolyPhenyleneSulfide,聚苯硫醚)树脂制的壳体8的内部掩埋与陶瓷基体材料2i部分的间隙,从而将陶瓷基板2定位固定。另外,引线端子61、电极端子62以及信号端子52分别通过注塑成型而形成于壳体8,引线端子61和电极端子62的从壳体8的上部(图中右侧上部)露出的端部61c、62c与螺母一起形成螺旋夹端子。另外,信号端子52的从壳体8的上部(图中左侧上部)露出的端部52t形成为销状。
电极端子62包括厚度0.7mm的铜板制的第二引出部622和具有厚度比第二引出部622薄的0.2mm的厚度且与第二引出部622的一面接合的铝制的第一引出部621。第二引出部622被配置成在注塑成型时,一部分被埋入到壳体8而固定,一端侧在壳体8内相对电力用半导体元件3隔开间隔地对置(具有对置面622f)。另外,与电力用半导体元件3对置的部分具有12mm的宽度,与2个电力用半导体元件3(3S、3R)的各主电极对应地,在2个部位形成开口部622a(宽度方向10mm×长度方向8mm)。
第一引出部621具有宽度8mm且总长度35mm,在第二引出部622的朝向电力用半导体元件3的对置面622f的宽度方向的中心,沿着长度方向而接合。此时,跨越开口部622a的部分分别以远离对置面622f的方式弯曲,与电力用半导体元件3的各主电极通过超声波接合进行接合。
由此,通过引线端子61和电极端子62形成电力用半导体元件3和外部电路之间的主电流电路6。另外,IGBT3S的栅电极3g(1mm×2mm)等通过导线键合部51连接到信号端子52而形成信号电路5。另外,在壳体8的内部,通过直接灌封来填充树脂(密封体7),并进行加热硬化而绝缘密封。
另外,在形成密封体7之前的状态下,第一引出部621从开口部622a露出,成为将第一引出部621超声波接合到主电极时的夹具的插入孔。因此,以使开口部622a的位置与主电极的位置一致的方式,将上述陶瓷基板2粘接到壳体8。
接下来,说明包括本实施方式1的电极端子62的制造方法的电力用半导体装置1的制造方法。
首先,如图3(a)所示,通过成型注塑,形成除了引线端子61、信号端子52以外还将电极端子62中的第二引出部622一体化了的壳体8。然后,如图3(b)所示,将壳体8以翻过来的状态设置于基体902,以使得对置面622f朝上。以在从下侧观察时从开口部622a能看到第一引出部621的方式,使用超声波接合工具901,针对第二引出部622接合第一引出部621,形成电极端子62。
接下来,如图3(c)所示,针对焊锡管芯键合了IGBT3S和二极管3R的陶瓷基板2,使用粘接剂9来固定壳体8。此时,第一引出部621中的跨越开口部622a且从对置面622f离开的突出部621b接触到IGBT3S、二极管3R的主电极。因此,在主电极朝上的状态下,对开口部622a插入超声波接合工具901,针对IGBT3S、二极管3R的每一个主电极,通过超声波接合来接合第一引出部621。进而,引线端子61和陶瓷基板2的导电层2a也接触,所以进行超声波接合。
然后,如图3(d)所示,通过导线键合部51接合IGBT3S的栅电极3g与信号端子52之间。最后,当通过直接灌封来填充树脂(密封体7)而进行绝缘密封后,图1(b)所示的电力用半导体装置1完成。
作为铝带的第一引出部621与IGBT3S以及二极管3R的接合不是一次接合而是使用按压面积比电极面积小的超声波接合工具901来在多个部位进行的。由此,即使当在第一引出部621与主电极之间产生倾斜的情况下,也能够抑制接合品质变得不稳定这一情况。另外,引线端子61与第二引出部622同样地,比第一引出部621厚且刚性也高,但接合对象不是主电极而是导电层2a,所以无需担心碰撞,能够提高接合时的功率,能够进行接合。
另外,关于第二引出部622和第一引出部621的接合,示出了使用超声波接合的例子,但即使通过压接、点焊接、激光焊接、锡焊、利用导电性粘接剂的粘接等也能得到同样的效果。另外,示出了在将第二引出部622成型注塑到壳体8之后进行第二引出部622与第一引出部621的接合的例子,但也可以在成型注塑之前,将第一引出部621接合到第二引出部622而形成电极端子62。
另外,关于针对主电极的第一引出部621的接合,例示了超声波接合,但不限于此。只要是如真空压接、激光焊接那样从接合面的背面抵住夹具、照射激光等来接合母材彼此的接合方法即可。因此,作为开口部622a,形成为一个开口对应于一个主电极,但只要能够插入上述夹具或者照射激光等,则也可以用狭缝或者用多个开口来应对。
进而,关于电极端子62的第二引出部622以及引线端子61,示出了使用铜(板)制的例子,但即使采用铝制、CIC(铜殷钢包覆材料)制的板材仍能得到同样的效果。另外,只要能够具有能够通过相对于壳体做成双柱式结构等来支撑第一引出部(带)的程度的刚性,则即便是柔软的金属箔形状,也能得到同样的效果。
另外,示出了将端部61c、62c设为使用螺母的螺丝端子的例子,但即使将螺母去掉而设为焊接端子,也能得到同样的效果。作为第一引出部621的材料,为使得在母材彼此的接合时不向主电极施加碰撞,最好是弹性模量比第二引出部622低的材料,但在使用能够控制碰撞的装置的情况下,即便是铜带也没有问题。另外,作为形状,也最好厚度比第二引出部622薄(或者直径更细),但只要元件的耐碰撞性没有问题,则不是必需的。
示出了作为开关元件而使用IGBT3S的例子,但也可以是例如MOSFET(MetalOxideSemiconductorFieldEffectTransistor,金属氧化物半导体场效应晶体管)。另外,作为二极管3R,能够使用SBD(SchottkyBarrierDiode:肖特基势垒二极管)等各种种类的元件。另外,元件数也不限于2个,既可以是2个以上,也可以是1个。
另外,示出了作为陶瓷基体材料2i而使用氧化铝的例子,但即使使用氮化铝、氮化硅等也能得到同样的效果。另外,示出了作为导电层2a而使用铜的例子,但即使使用铝也能得到同样的效果。进而,示出了作为电力用半导体元件3和陶瓷基板2的管芯键合部而使用焊锡4的例子,但即使使用使银填料在环氧树脂中分散而得到的导电性粘接剂、使用银纳米粒子的低温烧成接合材料也能得到同样的效果。另外,这些接合还能够应用于引线端子61和陶瓷基板2的接合。
另外,示出了作为壳体8材料而使用PPS的例子,但如果使用LCP(液晶聚合物:liquid-crystalpolymer),则能够期待进一步提高耐热性。另外,示出了通过直接灌封树脂来形成密封体7的例子,但通过使用硅凝胶的密封,也能得到同样的效果。
第一变形例(电极端子的制造法)
在上述例子中,示出了将作为独立的部件的铜板的第二引出部和铝带的第一引出部接合来形成电极端子的例子,但不限于此。例如,还能够通过蚀刻加工、机械切削仅将铜去除,从而形成铜铝包覆材料。在本变形例中,作为第一变形例,说明通过蚀刻加工将铜铝包覆材料加工为电极端子的方法。
作为用于形成电极端子62的材料,使用如图4(a)所示地层叠厚度0.7mm的铜层62m和比铜层62m薄的厚度0.2mm的铝层62e而得到的铜铝包覆材料62M。首先,如图4(b)所示,通过蚀刻去除铜层62m的预定范围,形成开口部622a。接下来,如图4(c)所示,在从开口部622a露出的铝层62e部分的宽度方向的两侧,分别形成贯通铝层62e的狭缝621s。然后,如图4(d)所示,在以使由狭缝621s夹住的部分远离对置面622f的方式形成突出部621b,并且将埋入到壳体8的一侧的部分折弯等之后,电极端子62完成。此处,作为用于形成电极端子62的材料,使用厚度0.7mm的铜层62m和厚度0.2mm的铝层62e,但对厚度没有特别限制,即使使铜和铝的厚度相反,也能得到同样的效果。
第二变形例(电极端子的构造)
在上述例子中,示出了用一根铝带形成第一引出部的例子,但不限于此。在本变形例中,作为第二变形例,如图5所示地将把3根2mm宽度的铝带并列地接合而得到的结构作为第一引出部623。由此,通过使各铝带分别独立地与主电极接合,即使在电力用半导体元件3相对陶瓷基板2倾斜地进行管芯键合、或者铝带相对第二引出部622倾斜地进行接合的情况下,也不容易受到相对的倾斜的影响。因此,能够形成可靠性更高的电力用半导体装置1。
第三变形例(电极端子的构造)
在上述例子中,示出了通过铝带形成第一引出部的例子,但不限于此。在本变形例中,作为第三变形例,如图6所示,代替铝带,以将5根φ0.5mm的铝导线拉伸而得到的结构作为第一引出部624。由此,能够使接合部更稳定化,所以在电流容量相对电力用半导体元件3的尺寸较小的情况下成为有效的单元。
第四变形例(电极端子的构造)
在上述例子中,关于第一引出部621针对主电极的接合,例示了超声波接合,但不限于此。也可以在第一引出部针对主电极的接合中使用焊锡那样的焊剂材料。例如,还能够如图7所示,使用能够接合到主电极、第一引出部的原材料的焊锡材料41。通过将主电极原材料设为镍、铜,将第一引出部设为包括层叠了铜带或者铝/铜的包覆带的第一引出部625,从而能够在利用焊锡材料41进行接合的面,配置容易进行锡焊的铜的层625C,在与第二引出部622接合的面,配置容易进行超声波接合的铝的层625A,能够使用通常的锡系焊锡材料来连接。另外,通过在第一引出部625与主电极的接合部形成开口部625a,使焊锡材料的供给变得容易,能够抑制剩余焊锡向周边流出。焊锡材料也可以使用导电性粘接剂、银纳米膏那样的接合材料。
第五变形例(电极端子的构造)
在上述例子中,示出了通过成型注塑来与壳体8一体形成第二引出部622而使用的例子,但也可以将环氧玻璃制印刷基板用作第二引出部。如图8所示,环氧玻璃制印刷基板626是在环氧玻璃基板626b的两个表面形成包括铜的表面导体层626c、626d而得到的基板。通过将环氧玻璃制印刷基板626的一个表面导体层626c接合到第一引出部621,从设置于环氧玻璃制印刷基板626的开口部626a使用超声波接合工具,将与该第二引出部626c接合了的引出部621接合到主电极,从而得到同样的效果。此时,通过在环氧玻璃制印刷基板626的与表面导体层626c相反的一侧的表面导体层626d上设置信号端子52,通过导线键合部51来与IGBT3S的栅电极3g连接来形成信号电路5,能够使壳体简化。
另外,包括各变形例,在本实施方式1中,示出了为了使工序连续而利用不间断的带、导线来形成与2个开口部622a(还包括626a)分别对应的突出部621b(还包括623b、624b、625b)的例子,但不限于此。也可以在各开口部622a(还包括626a)处对带、导线进行接合。另外,示出了沿着电流路径以跨越开口部622a的方式形成第一引出部621(还包括623、624、625)的例子,但不限于此。例如,也可以形成为从第二引出部622(还包括626)的宽度方向的两侧,跨越开口部622a(还包括626a)。进而,在第二引出部622(还包括626)处形成了开口部622a(还包括626a),但不限于此。例如,即使如图9所示地在第二引出部627处形成开口部的一端被敞开的切口部627a,也能得到同样的效果。
如以上那样,根据本实施方式1的电极端子,提供一种电极端子62,用于对电力用半导体元件3的表面侧的主电极(例如发射极电极3e)和外部电路进行电连接,构成为具备:第一引出部621(还包括623、624、625),与主电极接合;以及第二引出部622(还包括626),以从相对于主电极隔开间隔地对置配置的一端部至与外部电路连接的另一端部连续的方式,用弹性模量比第一引出部621(还包括623、624、625)高的板材形成,对一端部的向主电极的对置面622f(还包括626f),接合了第一引出部621(还包括623、624、625)的与主电极接合的部分(突出部621b、625b)的邻接部,第一引出部621(还包括623、624、625)以使与主电极接合的部分(突出部621b、625b)远离对置面622f(还包括626f)的方式形成,并且在第二引出部622(还包括626)处,形成与主电极对应的开口部622a(还包括626a),所以不会增大电极端子的从主电极到外部电路的电流路径的电阻,能够抑制向主电力电极的碰撞而使母材彼此接合,所以尽管不需要金属化等,仍无需在电路基板(陶瓷基板2)上设置多余的空间。因此,能够得到对应于大电流的可靠性高的电力用半导体装置。
形成第一引出部621(还包括623、624、625)的部件相比于构成第二引出部622的部件,厚度更薄,所以能够更可靠地抑制向主电力电极的碰撞而使母材彼此接合。
用铝带形成第一引出部621(还包括623),所以能够容易地形成电极端子62。
即使用铝导线形成第一引出部624,也能够容易地形成电极端子62。
用包覆带形成第一引出部625,所以能够使用通常的焊锡材料来接合。
用环氧玻璃制印刷基板形成第二引出部626,所以能够使壳体简化。
本实施方式1的电力用半导体装置1具备电路基板(陶瓷基板2)、与电路基板(陶瓷基板2)接合了的电力用半导体元件3、以及电力用半导体元件的表面侧的主电极(例如发射极电极3e)和第一引出部621(还包括623、624、625)在母材彼此之间进行接合的上述电极端子62,所以能够得到对应于大电流的可靠性高的电力用半导体装置。
另外,本实施方式1的电力用半导体装置1的制造方法包括:对电路基板(陶瓷基板2)接合电力用半导体元件3的工序;使开口部622a和主电极(例如发射极电极3e)的位置对齐,针对电路基板(陶瓷基板2)固定电极端子62(或者设置有它的壳体8)的工序;从开口部622a(还包括626a)插入夹具(例如超声波接合工具901)、或者照射激光,通过超声波接合、真空压接或者激光焊接来接合第一引出部621(还包括623、624、625)和主电极的工序,所以能够容易地制造对应于大电流的可靠性高的电力用半导体装置。
实施方式2.
在本实施方式2的电力用半导体装置中,针对在实施方式1中说明了的电力用半导体装置,以通过传递模成型来形成密封体的方式,变更了密封构造。图10是用于说明本发明的实施方式2的电极端子和使用它的电力用半导体装置的结构的图,图10(a)是从电力用半导体装置去掉了密封树脂的状态下的平面图,图10(b)是电力用半导体装置的剖面图,切断位置与图10(a)的B-B线对应。在本实施方式2中,关于电极端子中的第一引出部的构造,与包括变形例在内的实施方式1中说明了的结构相同,所以省略说明。另外,在图中,对与在实施方式1中说明了的部件相同的部件附加相同的符号,省略关于重复的部分的详细说明。
本实施方式2的电力用半导体装置1也如图10所示,对作为电路基板的陶瓷基板2的导电层2a,通过焊锡4(Sn-Ag-Cu:熔点219℃)而管芯键合(接合)了电力用半导体元件3。
作为陶瓷基板2,使用在50mm×25mm×厚度0.635mm的氧化铝(Al2O3)制的陶瓷基体材料2i的两面形成有厚度0.4mm的铜的导电层2a、2b的结构。电力用半导体元件3是使用作为宽带隙半导体材料的SiC的元件,作为开关元件,使用形成厚度0.25mm、15mm见方的矩形板状的IGBT3S,作为整流元件,使用形成厚度0.25mm、13mm×15mm的矩形板状的二极管3R。
与信号端子52(1mm×40mm)一起,以厚度0.7mm的引线框的形状,提供作为电极端子62的一部分的第二引出部622(接合第一引出部的部分的宽度:12mm)和引线端子61(宽度5mm)。在第二引出部622的对置面622f中,与电力用半导体元件3的各主电极对应地,在2个部位形成开口部622a(宽度方向10mm×长度方向8mm)。另外,针对第二引出部622,在对置面622f的宽度方向的中心处沿着长度方向接合宽度8mm且总长度35mm的铝带。此时,跨越开口部622a的部分以分别远离对置面622f的方式弯曲,形成第一引出部621。
另外,在将陶瓷基板2和引线框定位并固定了的状态下,通过超声波接合来接合各主电极和第一引出部621,对导电层2a接合引线端子61。由此,形成电力用半导体元件3和外部电路的主电流电路6。另外,IGBT3S的栅电极3g(1mm×2mm)等通过导线键合部51连接到信号端子52而形成信号电路5。
另外,通过传递模成型,对陶瓷基板2的安装有电力用半导体元件3的面的一侧进行密封,形成密封体7。由此,包括电力用半导体元件3的电路部件被绝缘密封。另外,电极端子62、引线端子61、信号端子52的向外部露出的端部以外的部分通过密封体7被完全固定。
在本实施方式2中,关于作为铝带的第一引出部621(还包括实施方式1所示的变形例的第一引出部623、624)与IGBT3S和二极管3R的接合也不是一次接合,而是使用按压面积比电极面积小的超声波接合工具901,在多个部位进行。由此,即使当在第一引出部621与主电极之间产生了倾斜的情况下,也能够抑制接合品质变得不稳定这一情况。
另外,关于第二引出部622和第一引出部621的接合,示出了使用超声波接合的例子,但通过压接、点焊接、激光焊接、锡焊、利用导电性粘接剂的粘接等,也能得到同样的效果。另外,如实施方式1的第一变形例那样,还能够通过蚀刻加工、机械切削仅将铜去除,从而形成铜铝包覆材料。
另外,关于第一引出部621针对主电极的接合,也是如真空压接、激光焊接那样从接合面的背面抵住夹具、照射激光等来将母材彼此接合的接合方法即可。因此,在本实施方式2中,也是作为开口部622a而形成为一个开口对应于一个主电极,但只要能够插入上述夹具或者照射激光等,则也可以用狭缝或者用多个开口来对应。另外,关于电极端子62的第二引出部622以及引线端子61,示出了使用铜(板)制的例子,但即使使用铝制、CIC(铜殷钢包覆材料)制的板材仍能得到同样的效果。
另外,示出了作为陶瓷基体材料2i而使用氧化铝的例子,但即使采用氮化铝、氮化硅等,也能得到同样的效果。另外,示出了作为导电层2a而使用铜的例子,但即使采用铝也能得到同样的效果。进而,示出了作为电力用半导体元件3和陶瓷基板2的管芯键合部而使用焊锡4的例子,但即使使用使银填料在环氧树脂中分散而得到的导电性粘接剂、使用银纳米粒子的低温烧成接合材料,也能得到同样的效果。另外,这些接合还能够应用于引线端子61和陶瓷基板2的接合。
另外,在上述各实施方式中,说明了在电力用半导体元件3中,使用作为宽带隙半导体材料的SiC的例子,但当然还能够应用于使用一般的硅的元件。但是,在使用以SiC为代表的氮化镓(GaN)系材料或者金刚石这样的带隙比硅宽的所谓宽带隙半导体材料、并且设想电流容许量高且高温动作的情况下,呈现特别显著的效果。其中,电极端子62所需的厚度(截面积)变厚,所以刚性变高,并且运转温度变高,所以由线膨胀系数差导致的位移变大。因此,如上所述,通过使超声波接合用的第一引出部621(还包括变形例的第一引出部623、624)和厚度比第一引出部621厚的第二引出部622复合而得到的结构,能够进一步发挥得到对应于大电流的可靠性高的电力用半导体装置1这样的效果。即,通过使用本发明的各实施方式的电极端子62,能够得到有效利用宽带隙半导体的特性的高性能的电力用半导体装置1。
另外,本发明能够在发明的范围内自由地组合各实施方式、或者使各实施方式适当地变形、省略。
Claims (17)
1.一种电极端子,用于连接电力用半导体元件的主电极和外部电路,所述电极端子的特征在于,具备:
第一引出部,与所述主电极接合;以及
第二引出部,以从相对于所述主电极隔开间隔地对置配置的一端部至与所述外部电路连接的另一端部为止连续的方式,通过板材来形成所述第二引出部,对所述一端部的向所述主电极的对置面,接合了所述第一引出部的与所述主电极接合的部分的邻接部,
所述第一引出部被形成为使与所述主电极接合的部分远离所述对置面,并且在所述第二引出部处,形成有与所述主电极对应的开口部或者切口部。
2.根据权利要求1所述的电极端子,其特征在于,
由绝缘电路基板形成所述第二引出部。
3.根据权利要求2所述的电极端子,其特征在于,
所述绝缘电路基板由环氧玻璃基板形成。
4.根据权利要求1至3中的任意一项所述的电极端子,其特征在于,
形成所述第一引出部的部件相比于构成所述第二引出部的部件,厚度更薄。
5.根据权利要求1至4中的任意一项所述的电极端子,其特征在于,
形成所述第一引出部的部件相比于构成所述第二引出部的部件,弹性系数更小。
6.根据权利要求1至5中的任意一项所述的电极端子,其特征在于,
所述第一引出部由铝带形成。
7.根据权利要求1至5中的任意一项所述的电极端子,其特征在于,
所述第一引出部由铝导线形成。
8.根据权利要求1至5中的任意一项所述的电极端子,其特征在于,
所述第一引出部由层叠2种以上的金属而成的包覆带形成。
9.一种电力用半导体装置,其特征在于,具备:
电路基板;
电力用半导体元件,与所述电路基板接合;以及
权利要求1至7中的任意一项所述的电极端子,所述电力用半导体元件的主电极和所述第一引出部在母材彼此之间进行接合。
10.根据权利要求9所述的电力用半导体装置,其特征在于,
所述电力用半导体元件由宽带隙半导体材料形成。
11.根据权利要求10所述的电力用半导体装置,其特征在于,
所述宽带隙半导体材料是碳化硅、氮化镓系材料以及金刚石中的任意材料。
12.一种电力用半导体装置,其特征在于,具备:
电路基板;
电力用半导体元件,与所述电路基板接合;以及
权利要求8所述的电极端子,所述电力用半导体元件的主电极和所述第一引出部在母材彼此之间进行接合。
13.根据权利要求12所述的电力用半导体装置,其特征在于,
所述电力用半导体元件由宽带隙半导体材料形成。
14.根据权利要求13所述的电力用半导体装置,其特征在于,
所述宽带隙半导体材料是碳化硅、氮化镓系材料以及金刚石中的任意材料。
15.一种电力用半导体装置的制造方法,是制造权利要求9至11中的任意一项所述的电力用半导体装置的方法,所述电力用半导体装置的制造方法的特征在于,包括:
对所述电路基板接合所述电力用半导体元件的工序;
使所述开口部和所述主电极的位置对齐,针对所述电路基板固定所述电极端子的工序;以及
从所述开口部插入夹具,通过超声波接合或者真空压接来接合所述第一引出部和所述主电极的工序。
16.一种电力用半导体装置的制造方法,是权利要求9至11中的任意一项所述的电力用半导体装置的制造方法,所述电力用半导体装置的制造方法的特征在于,包括:
对所述电路基板接合所述电力用半导体元件的工序;
使所述开口部和所述主电极的位置对齐,针对所述电路基板固定所述电极端子的工序;以及
经由所述开口部,对所述第一引出部照射激光,通过激光焊接来接合所述第一引出部和所述主电极的工序。
17.一种电力用半导体装置的制造方法,是权利要求12至14中的任意一项所述的电力用半导体装置的制造方法,所述电力用半导体装置的制造方法的特征在于,包括:
对所述电路基板接合所述电力用半导体元件的工序;
使所述开口部和所述主电极的位置对齐,针对所述电路基板固定所述电极端子的工序;以及
从所述开口部供给焊剂材料,通过所述焊剂材料来接合所述第一引出部和所述主电极的工序。
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109530838A (zh) * | 2018-12-13 | 2019-03-29 | 武汉凌云光电科技有限责任公司 | 一种激光焊接功率半导体芯片的方法 |
CN110120377A (zh) * | 2018-02-06 | 2019-08-13 | 丰田自动车株式会社 | 半导体装置 |
WO2021248954A1 (zh) * | 2020-06-12 | 2021-12-16 | 无锡利普思半导体有限公司 | 一种功率半导体模块 |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6293030B2 (ja) | 2014-10-09 | 2018-03-14 | 三菱電機株式会社 | 電力用半導体装置 |
JP6685143B2 (ja) | 2016-02-03 | 2020-04-22 | 三菱電機株式会社 | 電極端子、半導体装置及び電力変換装置 |
JP6860334B2 (ja) * | 2016-12-06 | 2021-04-14 | 株式会社東芝 | 半導体装置 |
JP6747304B2 (ja) * | 2017-01-16 | 2020-08-26 | 三菱電機株式会社 | 電力用半導体装置 |
JP6786416B2 (ja) | 2017-02-20 | 2020-11-18 | 株式会社東芝 | 半導体装置 |
EP3385981A1 (en) * | 2017-04-04 | 2018-10-10 | Nexperia B.V. | Power apparatus |
US10978366B2 (en) * | 2017-05-11 | 2021-04-13 | Mitsubishi Electric Corporation | Power module having a hole in a lead frame for improved adhesion with a sealing resin, electric power conversion device, and method for producing power module |
JP2019012755A (ja) * | 2017-06-29 | 2019-01-24 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
DE102017211479A1 (de) * | 2017-07-05 | 2019-01-10 | Robert Bosch Gmbh | Kontaktsystem mit einem ultraschallverschweißten Schaltungsträger |
JP6804421B2 (ja) * | 2017-10-06 | 2020-12-23 | 三菱電機株式会社 | 半導体装置 |
US10777489B2 (en) * | 2018-05-29 | 2020-09-15 | Katoh Electric Co., Ltd. | Semiconductor module |
WO2019229829A1 (ja) * | 2018-05-29 | 2019-12-05 | 新電元工業株式会社 | 半導体モジュール |
JP6987031B2 (ja) * | 2018-08-08 | 2021-12-22 | 三菱電機株式会社 | 電力用半導体装置及びその製造方法、並びに、電力変換装置 |
JP7287164B2 (ja) * | 2019-07-23 | 2023-06-06 | 三菱電機株式会社 | 電力用半導体装置及び電力変換装置 |
JP2021132080A (ja) * | 2020-02-18 | 2021-09-09 | 富士電機株式会社 | 半導体装置 |
KR102272112B1 (ko) | 2021-01-08 | 2021-07-05 | 제엠제코(주) | 반도체 패키지 |
DE102021104793B4 (de) | 2021-03-01 | 2024-01-25 | Infineon Technologies Ag | Leistungshalbleitermodul mit externem kontaktelement |
JP7548086B2 (ja) * | 2021-03-19 | 2024-09-10 | 三菱電機株式会社 | 半導体装置の製造方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006202885A (ja) * | 2005-01-19 | 2006-08-03 | Mitsubishi Electric Corp | 半導体装置 |
CN101084578A (zh) * | 2004-12-17 | 2007-12-05 | 西门子公司 | 半导体开关模块 |
CN101681907A (zh) * | 2007-11-30 | 2010-03-24 | 松下电器产业株式会社 | 散热结构体基板和使用其的模块及散热结构体基板的制造方法 |
JP2010092918A (ja) * | 2008-10-03 | 2010-04-22 | Toyota Industries Corp | 板状電極とブロック状電極との接続構造及び接続方法 |
CN105765715A (zh) * | 2013-11-26 | 2016-07-13 | 三菱电机株式会社 | 功率模块以及功率模块的制造方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2560894B2 (ja) | 1989-09-20 | 1996-12-04 | 富士電機株式会社 | 半導体装置 |
JP2501473B2 (ja) * | 1989-10-05 | 1996-05-29 | シャープ株式会社 | 配線基板の製造方法 |
JP3314768B2 (ja) | 1999-10-26 | 2002-08-12 | サンケン電気株式会社 | 半導体装置及びその製造方法 |
EP1209742A1 (de) * | 2000-11-22 | 2002-05-29 | ABB Schweiz AG | Hochleistungshalbleitermodul sowie Anwendung eines solchen Hochleistungshalbleitermoduls |
JP3923258B2 (ja) | 2001-01-17 | 2007-05-30 | 松下電器産業株式会社 | 電力制御系電子回路装置及びその製造方法 |
JP4365388B2 (ja) | 2006-06-16 | 2009-11-18 | 株式会社日立製作所 | 半導体パワーモジュールおよびその製法 |
JP2008117825A (ja) * | 2006-11-01 | 2008-05-22 | Toshiba Corp | パワー半導体デバイス |
WO2010131679A1 (ja) * | 2009-05-14 | 2010-11-18 | ローム株式会社 | 半導体装置 |
JP5473733B2 (ja) | 2010-04-02 | 2014-04-16 | 株式会社日立製作所 | パワー半導体モジュール |
JP2011228387A (ja) * | 2010-04-16 | 2011-11-10 | Hitachi Cable Ltd | 半導体装置およびその製造方法 |
JP2012084788A (ja) * | 2010-10-14 | 2012-04-26 | Tanaka Electronics Ind Co Ltd | 高温半導体素子用平角状銀(Ag)クラッド銅リボン |
JP2012209444A (ja) * | 2011-03-30 | 2012-10-25 | Panasonic Corp | 半導体装置の製造方法および半導体装置 |
JP2012227320A (ja) * | 2011-04-19 | 2012-11-15 | Hitachi Cable Ltd | 半導体装置 |
JP5800778B2 (ja) | 2011-11-25 | 2015-10-28 | 三菱電機株式会社 | 接合方法および半導体装置の製造方法 |
JP6084367B2 (ja) * | 2012-04-06 | 2017-02-22 | 株式会社 日立パワーデバイス | 半導体装置 |
JP6091443B2 (ja) * | 2014-01-31 | 2017-03-08 | 三菱電機株式会社 | 半導体モジュール |
-
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101084578A (zh) * | 2004-12-17 | 2007-12-05 | 西门子公司 | 半导体开关模块 |
JP2006202885A (ja) * | 2005-01-19 | 2006-08-03 | Mitsubishi Electric Corp | 半導体装置 |
CN101681907A (zh) * | 2007-11-30 | 2010-03-24 | 松下电器产业株式会社 | 散热结构体基板和使用其的模块及散热结构体基板的制造方法 |
JP2010092918A (ja) * | 2008-10-03 | 2010-04-22 | Toyota Industries Corp | 板状電極とブロック状電極との接続構造及び接続方法 |
CN105765715A (zh) * | 2013-11-26 | 2016-07-13 | 三菱电机株式会社 | 功率模块以及功率模块的制造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110120377A (zh) * | 2018-02-06 | 2019-08-13 | 丰田自动车株式会社 | 半导体装置 |
CN109530838A (zh) * | 2018-12-13 | 2019-03-29 | 武汉凌云光电科技有限责任公司 | 一种激光焊接功率半导体芯片的方法 |
CN109530838B (zh) * | 2018-12-13 | 2021-05-04 | 武汉凌云光电科技有限责任公司 | 一种激光焊接功率半导体芯片的方法 |
WO2021248954A1 (zh) * | 2020-06-12 | 2021-12-16 | 无锡利普思半导体有限公司 | 一种功率半导体模块 |
Also Published As
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WO2015111691A1 (ja) | 2015-07-30 |
US9899345B2 (en) | 2018-02-20 |
CN105706236B (zh) | 2019-03-01 |
DE112015000513T5 (de) | 2016-11-10 |
US20160293563A1 (en) | 2016-10-06 |
JP6139710B2 (ja) | 2017-05-31 |
JPWO2015111691A1 (ja) | 2017-03-23 |
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