CN100461404C - 半导体器件 - Google Patents

半导体器件 Download PDF

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CN100461404C
CN100461404C CNB2005800039424A CN200580003942A CN100461404C CN 100461404 C CN100461404 C CN 100461404C CN B2005800039424 A CNB2005800039424 A CN B2005800039424A CN 200580003942 A CN200580003942 A CN 200580003942A CN 100461404 C CN100461404 C CN 100461404C
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semiconductor element
lead
mosfet
wire
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CN1914728A (zh
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寺尾幸太郎
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Sanken Electric Co Ltd
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Abstract

本发明能够改善层叠型的半导体器件的散热性。在半导体器件的支撑板(3)上在MOSFET(1)与控制IC(2)之间连接的连结引线(4)具备基体(6)和具有电绝缘性和高热阻性的覆盖体(7)。上述基体(6)具有形成以可通电的方式固定在MOSFET(1)的另一个主面(1b)上的连结引线(4)的一个主面(4a)的一端(6a)，而且具备散热性和导电性。上述覆盖体(7)形成固定在基体(6)的一端(6a)上且支撑控制IC(2)的连结引线(4)的另一个主面(4b)。通过成为电流通路的支撑板(3)和连结引线(4)的基体(6)对MOSFET(1)供给电流，同时通过支撑板(3)和连结引线(4)的基体(6)高效地释放由MOSFET(1)的工作产生的热，可确保充分的散热性，可在MOSFET(1)中流过大的电流。

Description

半导体器件
技术领域
本发明涉及半导体器件，特别是涉及半导体元件的平面占有面积小、具有良好的散热性的平面尺寸小的半导体器件。
背景技术
一体地封装了功率半导体元件和其控制IC的半导体器件是众所周知的。这种半导体器件，具有如图8中所示那样将功率半导体元件(21)固定在支撑板(3)上进而在功率半导体元件(21)上固定控制IC(22)的层叠型结构和如图9中所示那样在支撑板(3)上并列地配置并固定功率半导体元件(21)和控制IC(22)的邻接型结构。例如，在下述专利文献1中示出了层叠型结构的半导体器件。
专利文献1：专利第2,566,207号公报，图4。
与控制IC(22)相比，功率半导体元件(21)的发热量大，要求具有良好的散热性的半导体结构。但是，在图8中示出的半导体器件中，从功率半导体元件(21)产生的热只不过从支撑板(3)散热，不能得到良好的散热特性。特别是，根据具有功率半导体元件(21)和控制IC(22)的半导体器件的功能，有时希望在热方面隔离功率半导体元件(21)与控制IC(22)。在这样的情况下，功率半导体元件(21)产生的热直接传递给控制IC(22)，存在对控制IC(22)造成异常过热从而使电特性变化的危险。
另一方面，在支撑板(3)上并列地配置功率半导体元件(21)和控制IC(22)的图9中示出的邻接型结构的半导体器件中，可防止功率半导体元件(21)产生的热直接传递给控制IC(22)，但与图8的层叠型结构一样，由于功率半导体元件(21)产生的热只通过支撑板(3)向外部释放，故难以得到良好的散热特性。此外，在图9的半导体器件中，由于在支撑板(3)上并列地配置功率半导体元件(21)和控制IC(22)，故也存在半导体器件的平面尺寸变大的问题。
发明内容
本发明的目的在于提供具有良好的散热性的层叠型的半导体器件。
本发明的半导体器件具备：其特征在于包括：具有散热性和导电性的支撑板(3)；第1半导体元件(1)，具有固定在该支撑板(3)上且与上述支撑板(3)电连接的一个主面(1a)；连结引线(4)，具有固定在上述第1半导体元件(1)的另一个主面(1b)上且与上述第1半导体元件(1)的另一个主面(1b)电连接的一个主面(4a)；覆盖体(7)，形成在该连结引线(4)的另一个主面(4b)上；第2半导体元件(2)，固定在该覆盖体(7)上；以及在上述支撑板(3)的周边配置的多个引线端子(5)，上述连结引线(4)具有散热性和导电性，并且在上述多个引线端子(5)的至少一个与上述第1半导体元件(1)之间架桥，将上述多个引线端子(5)的至少一个与上述第1半导体元件的另一个主面(1b)之间电连接，上述覆盖体(7)具备绝缘层(7a)和隔热层(7b)，抑制在第1半导体元件(1)中产生的热向第2半导体元件(2)传送。
此外，由于具有散热性和导电性的连结引线(4)在引线端子(5)的至少一个(5a)与第1半导体元件(1)之间架桥，故通过支撑板(3)释放因第1半导体元件(1)的工作而产生的热，同时也可通过连结引线(4)从端子(5)高效地释放上述的热。此外，连结引线(4)还具有第1半导体元件(1)的电流通路的功能，故可流过比较大的电流，可容易地谋求大电流化，同时可简化布线。此外，由于使连结引线(4)架桥来连接连结引线(4)与引线端子(5a)，故在利用连续自动模塑对由上述部件构成的引线框架组装体进行树脂密封时，即使施加密封树脂的压力，也可防止连结引线(4)的变形，能可靠地避免连结引线(4)与支撑板(3)等的电接触。
在本发明的实施方式中，由于在连结引线(4)的另一个主面(4b)与第2半导体元件(2)之间形成具有绝缘层(7a)和隔热层(7b)的覆盖体(7)，故即使第1半导体元件(1)的发热量增加，也可利用覆盖体(7)隔断热传递，可抑制第1半导体元件(1)的热传递给第2半导体元件(2)。
本发明可得到半导体元件的平面占有面积小、平面尺寸小的半导体器件。此外，由于可使第1半导体元件产生的热良好地散热，也可在热方面隔离第1半导体元件与第2半导体元件，故可得到第2半导体元件的电特性不因第1半导体元件的发热而下降、具有耐久性和可靠性的半导体器件。
附图说明
图1是示出本发明的半导体器件的实施方式的侧视图。
图2是图1的平面图。
图3是示出连结引线的覆盖体的实施方式的剖面图。
图4是示出覆盖体的制造方法的实施方式的剖面图。
图5是示出覆盖体的另一制造方法的实施方式的剖面图。
图6是示出本发明的半导体器件的第2实施方式的侧视图。
图7是示出本发明的半导体器件的第3实施方式的侧视图。
图8是示出以前的半导体器件的一例的平面图。
图9是示出以前的半导体器件的另一例的平面图。
具体实施方式
以下利用图1～图7说明适用于在开关调节器中使用的功率半导体器件的本发明的半导体器件的实施方式。
如图1中所示，在本发明的半导体器件中，利用导电性的粘接剂或焊锡(10)将作为第1半导体元件的开关元件、例如MOSFET(1)的一个主面(1a)固定在支撑板(3)上。利用镀镍的铜或铝等具有散热性和导电性的金属形成支撑板(3)，将MOSFET(1)的主电极、即漏电极与支撑板(3)电连接。在与支撑板(3)相反一侧的MOSFET(1)的另一个主面(1b)上形成另一个主电极、即源电极，利用导电性的粘接剂或焊锡(11)固定连结引线(4)。
如图3中所示，连结引线(4)具有由具有散热性和导电性的铜或铝等金属形成的基体(6)，将基体(6)的一端(6a)连接到MOSFET(1)的源电极上，利用导电性粘接剂、例如焊锡(13)将基体(6)的另一端(6b)固定在引线端子(5a)上。基体(6)具有固定在MOSFET(1)的源电极和引线端子(5a)上的一个主面(4a)以及固定作为第2半导体元件的控制IC(2)的另一个主面(4b)。互相并行地配置基体(6)的一端(6a)和另一端(6b)，但由于MOSFET(1)的另一个主面(1b)的高度与引线端子(5a)的高度不同，故连结引线(4)与MOSFET(1)的一个主面(1a)与引线端子(5a)的高度的差对应地具有对基体(6)的一端(6a)和另一端(6b)进行定位的台阶部(4c)。图1中示出的连结引线(4)的台阶部(4c)以除去了底边的梯形的3边的形状形成，但可在支撑板(3)的上方与其分离地以各种形状形成台阶部(4c)。
由于连结引线(4)的一端(6a)起到支撑控制IC(2)的区域和MOSFET(1)的散热板的功能，故形成的宽度比台阶部(4c)宽，在其一个主面(4a)上形成了覆盖体(7)。覆盖体(7)具有二层结构：固定在基体(6)上的作为具有电绝缘性的绝缘层的电介质层(7a)和固定在电介质层(7a)上并支撑控制IC(2)的具有高热阻性的隔热层(7b)。电介质层(7a)由没有气泡或针孔的聚酰亚胺树脂(聚酰亚胺薄膜)构成，用其本身的粘接性粘接到连结引线(4)的一端(6a)上。再有，也可作成在电介质层(7a)的下侧设置粘接带并经粘接带将电介质层(7a)粘接到连结引线(4)的一端(6a)上的结构。利用聚酰亚胺发泡体等发泡树脂形成隔热层(7b)。含有气泡的隔热层(7b)的热阻比实质上不含气泡的电介质层(7a)的热阻大。因此，可利用电介质层(7a)防止MOSFET(1)产生的热传递给控制IC(2)。如果与隔热层(7b)同样地也用含有气泡(7c)的树脂材料形成电介质层(7a)，则虽然覆盖体(7)的热阻进一步增加，但同时覆盖体(7)的整体的电绝缘性下降，不能良好地达到连结引线(4)与控制IC(2)的电隔离。
图4示出在成为电介质层(7a)的粘接性的树脂带(15)上压接成为隔热层(7b)的波状的树脂(16)以便在树脂(16)与树脂带(15)之间以一定间隔形成成为气泡(7c)的空洞(7d)的覆盖体(7)的第1制造方法。图5示出将成为电介质层(7a)的不含有发泡剂的树脂(17)与成为隔热层(7b)的含有发泡剂的树脂(18)加热接合而形成的覆盖体(7)的第2制造方法。树脂(18)中的发泡剂因加热而膨胀，形成气泡(7c)。
利用配置在隔热层(7b)与控制IC(2)之间的粘接剂(12)将控制IC(2)粘接到隔热层(7b)上。如果使隔热层(7b)本身具有粘接性，则也可省略粘接剂(12)。利用跨越连结引线(4)的细引线(8)将MOSFET(1)的栅电极连接到控制IC(2)的未图示的电极上。在支撑板(3)的周边配置了多个引线端子(5)，将控制IC(2)的未图示的电极连接到多个引线端子(5c)上。连接到支撑板(3)上形成的引线端子(5b)成为流过支撑板(3)的电流、即MOSFET(1)的主电流(漏电流)的通路。
这样，由于可依次在支撑板(3)上层叠MOSFET(1)、连结引线(4)和控制IC(2)作成半导体器件，故可得到半导体元件的平面占有面积小、小型化了的半导体器件。在该情况下，通过使MOSFET(1)的另一个主面(1b)的平面面积比连结引线(4)的一端(6a)的平面面积大、并使连结引线(4)的一端(6a)的平面面积比控制IC(2)的平面面积大，从而使细引线(8)和连结引线(4)的布线变得容易。
如果在工作时通过细引线(8)对MOSFET(1)的栅电极施加控制IC(2)的驱动脉冲，则MOSFET(1)反复进行导通、截止工作，可利用控制IC(2)来控制MOSFET(1)的工作。在MOSFET(1)的导通时在引线端子(5b)与引线端子(5a)之间漏电流通过支撑板(3)、MOSFET(1)和连结引线(4)而流动。在MOSFET(1)的导通时MOSFET(1)发热，但该热经焊锡(10)从支撑板(3)高效地释放，同时还经焊锡(11)通过连结引线(4)的基体(6)从引线端子(5a)高效地释放。因而，可确保充分的散热性，可在MOSFET(1)中流过大的电流。即使MOSFET(1)的散热量增加，也能利用连结引线(4)的覆盖体(7)隔断MOSFET(1)的热，不使其传递给控制IC(2)。此外，由于利用电介质层(7a)对MOSFET(1)与控制IC(2)完全地进行电绝缘，故可防止MOSFET(1)与控制IC(2)之间的电短路事故。覆盖体(7)具有固定连结引线(4)与控制IC(2)的作用、在热方面隔离MOSFET(1)与控制IC(2)的作用和在电方面隔离MOSFET(1)与控制IC(2)的作用。再者，由于使连结引线(4)在多个引线端子(5)的一个(5a)与第1半导体元件(1)之间架桥，将基体(6)的另一端(6b)与1个引线端子(5a)电连接，故在利用连续自动模塑对由上述部件构成的引线框架组装体进行树脂密封时，由于即使施加密封树脂的压力，也可防止连结引线(4)的变形，故能可靠地避免支撑板(3)等与连结引线(4)的电接触。
本发明的实施方式是可变更的。例如，如图6中所示，可将连结引线(4)的台阶部(4c)形成为反J字状。此外，如图7中所示，也可在倾斜的台阶部(4c)中形成反U字状的弯曲部(4d)。反J字状的台阶部(4c)或弯曲部(4d)具有缓和并吸收对支撑板(3)或MOSFET(1)施加的外力的作用。
产业上利用的可能性
本发明特别对发热量多的功率半导体器件的高密度安装结构是有效的。

Claims (3)

1.一种半导体器件，其特征在于包括：
具有散热性和导电性的支撑板(3)；
第1半导体元件(1)，具有固定在该支撑板(3)上且与上述支撑板(3)电连接的一个主面(1a)；
连结引线(4)，具有固定在上述第1半导体元件(1)的另一个主面(1b)上且与上述第1半导体元件(1)的另一个主面(1b)电连接的一个主面(4a)；
覆盖体(7)，形成在该连结引线(4)的另一个主面(4b)上；
第2半导体元件(2)，固定在该覆盖体(7)上；以及
在上述支撑板(3)的周边配置的多个引线端子(5)，
上述连结引线(4)具有散热性和导电性，并且在上述多个引线端子(5)的至少一个与上述第1半导体元件(1)之间架桥，将上述多个引线端子(5)的至少一个与上述第1半导体元件的另一个主面(1b)之间电连接，
上述覆盖体(7)具备绝缘层(7a)和隔热层(7b)，抑制在第1半导体元件(1)中产生的热向第2半导体元件(2)传送。
2.如权利要求1中所述的半导体器件，其特征在于：
上述绝缘层(7a)由气泡的含有率相对少的电介质膜构成，上述隔热层(7b)由气泡相对多的电介质膜构成。
3.如权利要求1所述的半导体器件，其特征在于：
利用跨越上述连结引线(4)的细引线(8)连接上述第1半导体元件(1)与第2半导体元件(2)，利用上述第2半导体元件(2)的驱动信号来控制上述第1半导体元件(1)的工作。
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