CN105304600A - 半导体装置以及半导体装置的制造方法 - Google Patents
半导体装置以及半导体装置的制造方法 Download PDFInfo
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- CN105304600A CN105304600A CN201510289444.6A CN201510289444A CN105304600A CN 105304600 A CN105304600 A CN 105304600A CN 201510289444 A CN201510289444 A CN 201510289444A CN 105304600 A CN105304600 A CN 105304600A
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Abstract
一种半导体装置以及半导体装置的制造方法,提高半导体装置的可靠性。半导体装置(SD)包括半导体芯片(CH)、配置在半导体芯片(CH)的周围且具有主面和与其对置的背面的信号引线(SL)、将半导体芯片(CH)和信号引线的主面进行电连接的金属丝(BW)、对半导体芯片(CH)、信号引线(SL)及金属丝(BW)进行封装的由封装树脂构成的封装体(BD)。信号引线(SL)具有在信号引线(SL)的延伸方向上位于封装体(BD)内的一端、位于封装体(BD)外的另一端、信号引线(SL)的主面且连接有金属丝(BW)的金属丝连接区域(BC),在一端和金属丝连接区域(BC)之间,在信号引线(SL)的主面具有内槽(GV1)。
Description
技术领域
本发明涉及半导体装置及其制造技术,例如涉及应用于使用了引线框架的树脂封装型半导体装置而有效的技术。
背景技术
在特开平6-140563号公报(专利文献1)中,记载有在搭载半导体芯片的芯片焊盘(diepad)的侧面形成槽或者凸部的技术。
此外,在特开平10-4170号公报(专利文献2)中,记载有在搭载半导体芯片的引线框架的芯片支架部形成不连续槽的技术。
此外,在特开平8-107172号公报(专利文献3)中,记载有在半导体芯片的周围配置的引线的表面形成凹凸的技术。
现有技术文献
专利文献
专利文献1:特开平6-140563号公报
专利文献2:特开平10-4170号公报
专利文献3:特开平8-107172号公报
发明内容
有作为半导体装置的封装方式而使用了引线框架的树脂封装型半导体装置。此外,在树脂封装型半导体装置中,为了确保其可靠性而实施了温度循环试验。
但是,在温度循环试验中,由封装树脂从引线的剥落所引起,在焊接金属丝和引线的连接部分中焊接金属丝断线的问题变得显著。
其他的课题和新的特征通过本说明书的描述以及附图应该变得清楚。
作为一个实施方式的半导体装置包括半导体芯片、配置在半导体芯片的周围且具有主面和与其对置的背面的引线、将半导体芯片和引线的主面进行电连接的金属丝、对半导体芯片、引线及金属丝进行封装的由封装树脂构成的封装体。引线具有在引线的延伸方向上位于封装体内的一端、位于封装体外的另一端、引线的主面且连接有金属丝的金属丝连接部,在一端和金属丝连接部之间,在引线主面具有槽。
发明效果
根据上述一实施方式,能够提高半导体装置的可靠性。
附图说明
图1是作为一个实施方式的半导体装置的俯视图。
图2是图1所示的半导体装置的剖视图。
图3是作为一个实施方式的半导体装置的信号引线的放大俯视图和放大剖视图。
图4是表示作为一个实施方式的半导体装置的制造工序的工艺流程。
图5是作为一个实施方式的半导体装置的制造工序中的俯视图。
图6是作为一个实施方式的半导体装置的制造工序中的剖视图。
图7是表示相对于图6的信号引线的变形例的放大俯视图以及放大剖视图。
图8是表示相对于图6的信号引线的变形例的放大俯视图以及放大剖视图。
图9是表示本发明人研究的关联技术的半导体装置结构的主要部分剖视图。
具体实施方式
(本申请中的记载形式、基本用语、用法的说明)
在本申请中,实施方式的记载根据需要而便于分为多个部分等而记载,但除了特别明示了不是那样的情况之外,这些并不是相互独立的,无论记载的前后,单一的例子的各部分、一方为另一方的一部分细节或者一部分或者全部的变形例等。此外,原则上,同样的部分省略重复的说明。此外,实施方式中的各结构元素除了特别明示了不是那样的情况、理论上被限定为该数目的情况以及从逻辑上可知不是那样的情况之外,不是必须的。
同样地,在实施方式等的记载中,关于材料、组成等,“由A构成的X”等也除了特别明示了不是那样的情况以及从逻辑上可知不是那样的情况之外,不排除包括A以外的元素。例如,关于成分而言,是“将A作为主要的成分而包含的X”等的含义。例如,即使称为“硅构件”等,也并不限定于纯的硅,当然也可以包括SiGe(硅/锗)合金、将其他硅作为主要的成分的多元合金、包含其他的添加物等的构件。此外,即使称为镀金、镀Cu层、镀镍等,除了特别明示了不是那样的情况之外,除了纯的构件之外,还包括分别以金、Cu、镍等为主要的成分的构件。
进一步,在涉及特定的数值、数量时,除了特别明示了不是那样的情况、理论上被限定为该数目的情况以及从逻辑上可知不是那样的情况之外,也可以是超过该特定的数值的数值,也可以是小于该特定的数值的数值。
此外,在实施方式的各图中,相同或者同样的部分由相同或者类似的记号或者参考号来表示,原则上不重复说明。
此外,在附图中,反而会变得烦杂的情况或者与空隙的区分明确的情况下,即使是剖面,有时也省略阴影等的情况。与此相关地,在根据说明等而变得清楚的情况下等,即使是在平面上关闭的孔,有时也省略背景的轮廓线。尤其,即使不是剖面,为了明示不是空隙或者为了明示区域的边界,有时也附加阴影或点图案。
(实施方式)
<关联技术的说明>
首先,参照附图说明本发明人研究的关联技术。图9是表示本实施方式的关联技术的半导体装置的结构的主要部分剖视图。
图9所示的半导体装置是树脂封装型半导体装置,包括芯片焊盘DP、在芯片焊盘上通过芯片键合材料AD而粘结的半导体芯片CH、通过金属丝BW与半导体芯片CH进行了电连接的引线LD、对芯片焊盘DP、半导体芯片CH、金属丝BW以及引线LD进行封装的封装体BD。
在关联技术的半导体装置中,构成封装体BD的封装树脂由环氧树脂等构成,其线膨胀系数大致为9ppm/K,引线LD由铜(Cu)构成,其线膨胀系数大致为17ppm/K。即,封装树脂和引线LD由线膨胀系数大不相同的材料构成。
此外,在关联技术的半导体装置中,在产品出厂前的检查工序中实施温度循环试验。温度循环试验是,例如将在低温(-65℃)和高温(150℃)的环境中分别暴露30分钟的1个循环重复500个循环左右,评价产品的可靠性、耐久性的试验。
根据本发明人的研究,判明了如下情况:在温度循环试验中,在具有互不相同的线膨胀系数的封装树脂和引线LD的界面发生剥离部分FP,最终在金属丝BW中发生龟裂BRP并达到断线。即,判明了如下情况:在剥离部分FP中,根据封装树脂和引线LD的线膨胀系数之差,在封装树脂和引线LD的热收缩量上产生偏差,由该偏差所引起,对金属丝BW施加切应力而发生龟裂BRP。进一步,由于从封装体BD的表面的距离La越大则封装树脂和引线LD的热收缩量之差越大,所以在引线LD的内侧部的前端(接近半导体芯片CH的侧)容易发生剥离。
判明了通过这样的在金属丝BW发生的龟裂BRP或者断线,关联技术的半导体装置的可靠性显著降低。在本实施方式中,提供提高半导体装置的可靠性的技术。
在关联技术的半导体装置中,在引线LD的内侧部,在封装体BD的侧面侧形成有槽GV,但该槽GV为了防止引线LD从封装体BD拔出而设置。由于在引线LD的内侧部前端容易发生封装树脂和引线LD的界面的剥离,所以在与金属丝BW和引线LD的接触部相比设置在外侧(封装体BD的侧面侧)的槽GV中,不能防止在内侧部前端发生的剥离。
在本实施方式中说明的技术能够应用于使用引线框架而制造的各种封装类型的树脂封装型半导体装置,但在本实施方式中,作为一例,说明应用于作为外部端子的多个引线在封装体的侧面露出的、SOP(小外形封装(SmallOutlinePackage))型的树脂封装型半导体装置的实施方式。但是,例如还能够应用于QFP(四方扁平封装(QuadFlatPackage))。图1是本实施方式的半导体装置的俯视图,图2是沿着图1的A-A线的剖视图。
<半导体装置>
首先,使用图1以及图2说明本实施方式的半导体装置SD的结构。本实施方式的半导体装置SD包括芯片焊盘(芯片搭载部、标签)DP、在芯片焊盘DP上经由芯片键合材料(粘结材料)AD(参照图2)而搭载的半导体芯片CH。此外,半导体装置SD包括在半导体芯片CH(芯片焊盘DP)的隔壁(周围)配置的多个引线(端子、外部端子)、将半导体芯片CH的多个焊盘(电极、焊接焊盘)和多个引线分别进行电连接的多个金属丝(焊接金属丝、导电性构件)BW。
在多个引线中,包括多个信号引线SL、多个源引线GL以及多个伪引线DL。此外,在多个焊盘中,包括多个信号焊盘BP和多个源焊盘BPG,信号焊盘BP和信号引线SL通过金属丝进行电连接。此外,源焊盘BPG和源引线GL通过金属丝进行电连接。此外,伪引线DL与芯片焊盘DP连接。此外,半导体装置SD包括对半导体芯片CH、多个引线以及多个金属丝BW进行封装的封装体(树脂体)BD。此外,在芯片焊盘DP上,连接有多个悬挂引线DPS,从芯片焊盘DP朝向封装体BD的外部延伸。
如图1所示,半导体芯片CH由具有四边形的平面形状的硅(Si)基板构成,在硅基板的主面形成有多个半导体元件以及布线,在半导体元件以及布线上经由绝缘膜而形成有多个焊盘。与硅基板的主面对置的背面经由芯片键合材料AD而粘结到芯片焊盘DP的主面。多个焊盘经由布线与半导体元件进行电连接。在多个焊盘中,包括前述的多个信号焊盘BP以及多个源焊盘BPG。多个信号焊盘BP沿着半导体芯片CH(硅基板)的第一边而配置,多个源焊盘BPG沿着与半导体芯片CH的所述第一边对置的第二边配置为多列。在图1中,由虚线包围的部分的焊盘全部是源焊盘BPG。另外,布线、信号焊盘BP以及源焊盘BPG由以铝(Al)为主体的合金层构成,但也可以由以铜(Cu)为主体的合金层构成。此外,芯片键合材料AD使用例如环氧树脂类的粘结材料、或者在环氧树脂类的热硬化性树脂中含有由银(Ag)等构成的金属粒子的导电性粘结材料。
在半导体芯片CH(芯片焊盘DP)的周围,配置有多个引线。在本实施方式中,沿着与前述的半导体芯片CH的第一边以及第二边正交的方向,多个引线延伸。进一步,多个引线的各个在其延伸方向上具有一端和另一端,一端位于封装体BD的内部,另一端位于封装体BD的外部。即,一端接近半导体芯片CH的第一边或者第二边而配置。此外,如图1所示,多个引线的各个由位于封装体BD的内部的内侧部IL和位于封装体BD的外侧的外侧部OL构成。多个引线分别具有主面、与主面对置的背面、连接主面和背面的侧面。
多个引线分别由金属材料构成,例如由以铜(Cu)为主体的金属构成,且虽然未图示,但实质上不包括铅(Pb)的、所谓的无铅焊锡对引线的外侧部OL进行了镀层处理。无铅焊锡例如仅是锡(Sn)、锡-铋(Sn-Bi)或者锡-铜(Sn-Cu)等。由铜(Cu)构成的多个引线的线膨胀系数大致为17ppm/K。
多个信号引线SL的一端沿着半导体芯片CH的第一边而配置,多个源引线GL的一端沿着半导体芯片CH的第二边而配置。另外,一条信号引线SL被例外地配置在半导体芯片CH的第二边侧。两条伪引线DL朝向四边形的半导体芯片CH的对置的角部而延伸,且连接到芯片焊盘DP。
各个信号引线SL具有外侧部OL和内侧部IL,在内侧部IL中,包括连接金属丝BW的金属丝连接区域BC、内槽GV1以及外槽GV2。在金属丝连接区域BC的一部分,存在连接了金属丝BW和信号引线SL的金属丝连接部。金属丝连接区域BC、内槽GV1以及外槽GV2形成在信号引线SL的主面。内槽GV1形成在金属丝连接部和内侧部IL的前端(一端)之间,防止内侧部IL的前端中的、封装树脂和信号引线SL的界面的剥离。此外,通过内槽GV1,能够防止金属丝BW的龟裂、断线。外槽GV2形成在内侧部IL并且是在金属丝连接区域BC(或者,金属丝连接部)和信号引线SL的另一端之间,且具有防止拔出信号引线SL的效果。信号焊盘BP和信号引线SL由一条金属丝BW连接。金属丝BW由例如铜(Cu)构成。由于在信号引线SL上只连接有一条金属丝BW,所以基于封装树脂和信号引线SL的热收缩量之差的切应力施加到一条金属丝BW,所以容易发生金属丝BW的龟裂、断线。因此,在信号引线SL中设置内槽GV1是有效的。
源引线GL也具有外侧部OL和内侧部IL,在内侧部IL中,包括连接金属丝BW的金属丝连接区域BC以及外槽GV2。在金属丝连接区域BC的一部分,存在连接了金属丝BW和信号引线SL的金属丝连接部。金属丝连接区域BC以及外槽GV2形成在源引线GL的主面。在源引线GL的金属丝连接区域BC中,连接有多条金属丝BW。进一步,如图1所示,相邻的两条源引线GL的金属丝连接区域BC相互连结,在连结部分上也连接有多个金属丝BW。在各个源引线GL中,在内侧部IL并且是在金属丝连接区域BC(或者,金属丝连接部)和源引线GL的另一端之间形成有外槽GV2。但是,在源引线GL中,为了广阔地确保金属丝连接区域BC的面积,在金属丝连接区域BC和源引线GL的一端之间没有形成内槽GV1。即,由于在源引线GL中没有形成内槽GV1,所以从金属丝连接区域BC到源引线GL的一端为止,成为均匀的平坦面。换言之,在到外槽GV2和源引线GL的一端为止,成为均匀的平坦面。由于在各个源引线GL上连接有多条金属丝BW,所以基于封装树脂和源引线GL的热收缩量之差的切应力分割为多条金属丝BW,所以施加到一条金属丝BW的切应力变小。因此,在连接到源引线GL的多个金属丝BW中,难以发生龟裂、断线。因此,通过源引线GL中仅设置外槽GV2而不设置内槽GV1,将内槽GV1形成区域也设为金属丝连接区域BC,增加连接到源引线GL的金属丝BW的条数,实现源焊盘BPG和源引线GL间的低电阻连接,实现半导体芯片CH的源电位的稳定化。
图1所示的封装体(树脂体)BD的平面形状是四边形。此外,如图2所示,封装体BD对半导体芯片CH、芯片焊盘DP、引线以及金属丝BW进行封装,且例如由环氧树脂构成。封装树脂为了调整其线膨胀系数,作为填料而大量含有不同径的球状的硅石,但在例如由环氧树脂构成的封装树脂中包含的填料的平均粒径为18μm左右,构成封装体BD的封装树脂的线膨胀系数大致为9ppm/K。即,多个引线的线膨胀系数大于封装树脂的线膨胀系数。从图1以及图2可知,封装体BD具有主面、该主面的相反侧的背面(实际安装面)、位于该主面和背面之间的4个侧面。如图2所示,侧面成为倾斜面,但在图1中没有示出倾斜面,封装体BD的外形表示主面的外形。如图1所示,在本实施方式的半导体装置SD中,沿着封装体BD的主面中的、对置的2边分别配置有多个引线。准确地说,如图2所示,多个引线从对置的2个侧面向封装体BD的外侧突出。在封装体BD的主面的第一边配置有多个信号引线SL和伪引线DL,在与第一边对置的第二边,配置有多个源引线GL、信号引线SL以及伪引线DL。在相互对置的第一边和第二边之间的第三边以及第四边,分配配置有从芯片焊盘DP一体地延伸的悬挂引线DPS。
如图1所示,芯片焊盘(芯片搭载部、标签)DP具有大致四边形的平面形状。此外,如图2所示,芯片焊盘DP的背面从封装体BD的背面露出。芯片焊盘DP和多个引线由以一体的铜构成的金属板形成,但芯片焊盘DP的膜厚形成得比引线的膜厚厚。通过芯片焊盘DP和引线的膜厚不同,能够实现使芯片焊盘DP的背面从封装体BD的背面露出的同时,引线的背面由封装体BD(封装树脂)覆盖的构造。此外,引线以及芯片焊盘DP由热传导率比封装体BD高的金属材料构成。这样,通过在比引线厚的芯片焊盘DP上搭载半导体芯片CH,且使芯片焊盘DP的背面从封装体BD的背面露出,能够将在半导体芯片CH上发出的热有效率地散热到实际安装基板侧。
如图1以及图2所示,构成封装体BD的封装树脂在内侧部IL中覆盖信号引线SL的主面、背面以及侧面,在信号引线SL的主面形成的内槽GV1以及外槽GV2的内部填充封装树脂。与在信号引线SL中设置有内槽GV1以及外槽GV2的量相应地,封装树脂和信号引线SL的接触面积增加、紧贴力增加。此外,通过设置有内槽GV1,封装树脂和信号引线SL的主面的界面受到的切应力通过内槽GV1的锚定效应(anchoreffect)而降低,所以能够防止界面的剥离。因此,通过在信号引线SL的主面的、与金属丝连接区域BC相比更接近半导体芯片CH的侧设置内槽GV1,能够防止封装树脂和信号引线SL的界面的剥离,所以能够防止由从信号引线SL的一端侧(接近半导体芯片CH的侧)发生的剥离所引起的金属丝BW的龟裂、断线。因此,能够提高半导体装置的可靠性。此外,在信号引线SL的内侧部IL中,由于在金属丝连接区域BC和信号引线SL的另一端之间设置外槽GV2,且使在外槽GV2内填充封装树脂,所以能够防止信号引线SL的拔出。
此外,构成封装体BD的封装树脂在内侧部IL中覆盖源引线GL的主面、背面以及侧面,在源引线GL的主面形成的外槽GV2的内部填充封装树脂。因此,在源引线GL的内侧部IL中,由于在金属丝连接区域BC和源引线GL的另一端之间设置外槽GV2,且使在外槽GV2内填充封装树脂,所以能够防止源引线GL的拔出。
接着,说明信号引线SL的详细构造和基于该构造的效果。图3是信号引线SL的内侧部IL的放大俯视图和放大剖视图。如图3所示,信号引线SL的内侧部IL包括具有其宽度W1的第一区域R1、具有与图1所示的外侧部OL相等的宽度W2的第三区域R3、第一区域和第三区域之间的第二区域。第一区域R1具有与信号引线SL的延伸方向正交的第一边Sa(与前述的一端对应)、沿着信号引线SL的延伸方向的2个第二边Sb。第三区域R3具有与信号引线SL的延伸方向平行的2个第四边Sd,第二区域R2具有连接第一区域R1的第二边Sb和第三区域R3的第四边Sd的2个第三边Sc。第一区域R1的宽度(W1)由2个第二边(Sb)规定,第三区域R3的宽度(W2)由2个第四边Sd规定。第二区域R2的宽度从第一区域R1朝向第三区域R3缓慢地减少。
在第一区域R1中,在距离了第一边Sa的位置,形成有沿着与第一边Sa平行地延伸的内槽GV1。从第一区域R1的内槽GV1至第二区域R2为止的区域为金属丝连接区域BC,在该金属丝连接区域BC上连接有金属丝BW。连接有金属丝BW和信号引线SL的金属丝连接部位于金属丝连接区域的一部分。在第三区域R3中,外槽GV2沿着与信号引线SL的延伸方向正交的方向(与第一边Sa平行的方向)延伸。
为了广阔地确保信号引线SL的金属丝连接区域BC的宽度,第一区域R1的宽度W1大于第三区域R3的宽度W2(W1>W2)。
内槽GV1的剖面为V字形状,且其长度为W3A,其深度为D1A。内槽GV1达不到第二边Sb,在第二边Sb的内侧终止。即,内槽GV1的长度(W3A)小于第一区域R1的宽度W1(W3A<W1),且内槽GV1的两端在第二边Sb的内侧终止。外槽GV2的剖面为V字形状,且其长度为W4,其深度为D2,外槽GV2的长度(W4)小于第三区域R3的宽度(W4<W2)。外槽GV2也在第四边Sd的内侧终止。由于内槽GV1以及外槽GV2分别在第二边Sb以及第四边Sd的内侧终止,所以能够维持信号引线SL的机械强度,能够确保信号引线SL的主面的平坦性。此外,由于在信号引线SL的延伸方向上,外槽GV1的肩部离第一边Sa预定的距离,所以能够维持信号引线SL的机械强度,能够确保信号引线SL的主面的平坦性。通过能够确保信号引线SL主面的平坦性,对于信号引线SL的金属丝BW的连接可靠性提高。
金属丝连接区域BC的宽度等于内槽GV1的宽度(W3A),且其位置对应于内槽GV1。即,由于在信号引线SL的延伸方向上,金属丝BW与信号引线SL连接的位置上必定存在内槽GV1,所以即使在与信号引线SL的延伸方向正交的方向上,金属丝BW的连接位置(金属丝连接部)偏离,也能够可靠地防止前述的金属丝BW的龟裂、断线。
此外,内槽GV1的长度(W3A)等于金属丝连接区域BC的宽度,且大于第三区域R3的引线宽度(W2)以及外槽GV2的长度(W4)(W3A>W2、W4)。通过这个构造,能够广阔地确保信号引线SL的金属丝连接区域BC的宽度,即使在与信号引线SL的延伸方向正交的方向上,金属丝BW的连接位置偏离,也能够可靠地防止前述的金属丝BW的龟裂、断线。
由于在内槽GV1内填充封装树脂,封装树脂和信号引线SLB的主面的界面受到的切应力通过锚定效应而降低,所以内槽GV1的深度(D1A)比外槽GV2深。
通过将外槽GV2的深度(D2)设为比内槽GV1的深度(D1A)浅,能够维持信号引线SL的机械强度,能够确保金属丝连接区域BC的平坦性。此外,由于信号引线SL的内侧部IL的主面除了内槽GV1以及外槽GV2的形成区域之外,具有整体上均匀的面,所以能够确保金属丝连接区域BC的平坦性。其结果,金属丝BW的连接可靠性提高。
另外,设为内槽GV1以及外槽GV2的剖面为V字形状,但并不限定于此,例如,也可以是U字形状或者コ字形状。此外,也可以将内槽GV1由沿着与信号引线SL的延伸方向正交的方向相邻而延伸的2个平行的V字型的槽构成。
<半导体装置的制造方法>
接着,使用图1至图6说明本实施方式的半导体装置SD的制造方法。图4是表示本实施方式的半导体装置SD的制造工序的工艺流程。
首先,在图4所示的芯片准备工序(S1)中,准备半导体芯片CH。如前所述,半导体芯片CH由硅基板构成,且在其主面上形成有多个半导体元件以及布线,在半导体元件以及布线上经由绝缘膜而形成有多个焊盘(信号焊盘BP以及源焊盘BPG)。
接着,说明引线框架准备工序(S2)。图5是在本实施方式的半导体装置SD的制造工序中使用的引线框架LF的主要部分俯视图。图5中由虚线表示封装体BD的外形。
引线框架LF在中央部具有芯片焊盘DP,在芯片焊盘DP的周围配置有多个引线。如前所述,在多个引线中,包括多个信号引线SL、源引线GL以及伪引线DL。在多个引线的周围,配置有沿着上下左右延伸的外框OF,多个引线的另一端连接到外框OF。此外,以连接多个引线间的方式配置有障碍物DM,障碍物DM连接到外框OF。芯片焊盘DP经由悬挂引线DPS连接到外框OF。在图5中,在位于上部的悬挂引线DPS的两侧,在成为后述的浇口GT的部分,在引线框架LF上形成有开口。此外,在位于下部的悬挂引线DPS的两侧,在成为后述的树脂池PKT的部分,在引线框架上形成有开口。
接着,说明图4的芯片搭载工序(S3)。在准备好的引线框架LF的芯片焊盘DP上经由芯片键合材料AD而粘结半导体芯片CH。芯片键合材料AD使用例如环氧树脂类的粘结材料、或者在环氧树脂类的热硬化性树脂中含有由银(Ag)等构成的金属粒子的导电性粘结材料。
接着,说明金属丝焊接工序(S4)。如图1以及图2所示,将半导体芯片CH的信号焊盘BP和信号引线SL的金属丝连接区域BC通过金属丝BW进行电连接。各信号焊盘BP和各信号引线SL由一条金属丝BW连接。进一步,将半导体芯片CH的源焊盘BPG和源引线GL的金属丝连接区域BC通过金属丝BW进行电连接。连接到各源焊盘BPG的一条金属丝BG连接到源引线GL的金属丝连接区域BC。在源引线GL的金属丝连接区域BC上,连接有连接到多个源焊盘的多条金属丝BW。另外,在图1中示出完成了金属丝焊接工序(S4)的状态。
接着,说明树脂封装工序(S5)。图6是沿着图5以及图1的B-B′线的树脂封装工序的剖视图。将完成了金属丝焊接工序的引线框架LF载置在模具内,将半导体芯片CH、芯片焊盘DP、多个引线以及金属丝BW由封装树脂进行覆盖。模具具有空腔CV、与空腔CV连通的浇口GT以及树脂池PKT。在本实施方式中,在下模具LM上,形成有浇口GT和空腔CV,在上模具UM上,形成有空腔CV和树脂池PKT。但是,还能够只在下模具LM以及上模具UM中的其中一个中形成浇口GT、空腔CV以及树脂池,此外,还能够分别在下模具LM以及上模具UM的双方形成。
在下模具LM和上模具UM中设置的空腔CV中,载置半导体芯片CH、芯片焊盘DP以及多个引线,从在下模具LM中设置的浇口GT对空腔CV注入封装树脂,形成覆盖半导体芯片CH、芯片焊盘DP、金属丝BW以及多个引线的封装体BD(图1以及图2所示)。图6的空腔CV对应于在图5中由虚线所示的封装体BD的内侧。如图5以及图6所示,从位于芯片焊盘DP的一方的浇口GT对空腔CV内注入封装树脂。此时,在浇口GT的相反侧,配置有在上模具UM中形成的树脂池PKT,将包括空腔CV内的空气的封装树脂积极地向树脂池PKT流入。因此,树脂池PKT的厚度(t)设定得比在封装树脂中包含的填料的平均粒径(18μm)大(例如,20μm)。在没有设置树脂池PKT的情况下,在树脂封装工序中,通过封装树脂的注入压,空腔CV内的空气从在浇口GT的相反侧形成的被称为气孔的非常薄的间隙向模具的外部排出。因此,由于注入到空腔CV内的封装树脂的前端部分卷进空腔CV内的空气(空隙(Void)),所以空隙含有量比其他的部分高。因此,在注入到空腔CV内的封装树脂的前端部分残留在空腔CV内的树脂封装方法中,位于浇口GT的相反侧的封装体BD由空隙含有量高的封装树脂构成。由于空隙含有量高的封装树脂例如与信号引线SL的紧贴性低,所以容易发生剥离。
根据本实施方式的半导体装置的制造方法,通过在比封装树脂中包含的填料的平均粒径(18μm)厚的树脂池PKT中流入卷进了空气的封装树脂,能够由在全体上空隙含有量少的封装树脂形成封装体BD。因此,能够提高封装树脂和信号引线SL的紧贴性,能够防止封装树脂和信号引线SL的界面的剥离以及由此引起的金属丝BW的龟裂、断线的发生。尤其,由于即使是位于浇口GT的相反侧的信号引线SL,也提高与封装树脂的紧贴性,所以能够防止前述的界面的剥离、金属丝BW的龟裂、断线。
接着,说明障碍物切断以及引线成形工序(S6)。从模具取出完成了树脂封装工序(S5)的引线框架LF,将连接多个引线间以及引线和外框OF间的障碍物DM部分进行切断除去。此时,同时,沿着图5的虚线,进行悬挂引线DPS的切断。进一步,进行多个引线的外侧部OL的引线成形,获得图2所示的外侧部OL的鸥翼形状。即,多个引线(例如,信号引线SL以及源引线GL)从封装体BD的侧面突出,且朝向封装体BD的背面弯曲,进一步向远离封装体BD的方向弯曲。
接着,说明单片化工序(S7)。从引线框架LF的外框OF切断完成了引线成形的多个引线,图1所示的半导体装置SD完成。此外,通过该单片化工序,多个引线从外框OF切断,形成多个引线的另一端。
<变形例1>
图7是表示本实施方式的信号引线SL的变形例的放大俯视图以及放大剖视图。即,图7相当于图6的变形例。
在变形例1的信号引线SLB中,内槽GV1B由多个贯通孔TH构成。多个贯通孔TH沿着与信号引线SLB的延伸方向正交的方向直线状排列。为了在贯通孔TH内填充封装树脂,各贯通孔TH的直径设为例如在封装树脂中包含的硅石填料的平均粒径的5倍以上。具体而言,设为0.1~0.15mm。由于各贯通孔TH以不与边Sa、边Sb交叉的方式,与边Sa、边Sb相比形成在内侧,所以能够维持信号引线SLB的机械强度,还能够维持金属丝连接区域BC的平坦性。进一步,通过在贯通孔TH内被填充封装树脂,封装树脂和信号引线SLB的主面的界面受到的切应力通过内槽GV1B的锚定效应而降低,所以能够防止界面的剥离。因此,能够防止由从信号引线SLB的一端侧(接近半导体芯片CH的侧)发生的剥离所引起的金属丝BW的龟裂、断线,能够提高半导体装置的可靠性。
<变形例2>
图8是表示本实施方式的信号引线SL的变形例的放大俯视图以及放大剖视图。即,图7相当于图6的变形例。
在变形例2的信号引线SLC中,内槽GV1C由以格子状排列的多个浅槽构成。即,沿着信号引线SLC的延伸方向以及与延伸方向正交的方向,相邻设置有多个浅槽。各浅槽的深度(D1C)比外槽GV2的深度(D2)浅。
通过将内槽GV1C由以格子状排列的多个浅槽构成,且在浅槽内填充封装树脂,封装树脂和信号引线SLC的主面的界面受到的切应力通过内槽GV1C的锚定效应而降低,所以能够防止界面的剥离。
此外,通过由比外槽GV2浅的浅槽构成内槽GV1C,所以能够确保金属丝连接区域BC的平坦性,而不会降低信号引线SLC的机械强度。
以上,基于实施方式具体说明了由本申请的发明人进行的发明,但本发明并不限定于所述实施方式,在不脱离其要旨的范围内能够进行各种变更是理所当然的。
Claims (20)
1.一种半导体装置,其特征在于,包括:
半导体芯片;
引线,配置在所述半导体芯片的周围且具有主面和与所述主面对置的背面;
金属丝,连接到所述引线的所述主面,将所述半导体芯片和所述引线电连接;以及
封装体,由封装树脂将所述半导体芯片、所述引线以及所述金属丝覆盖而成,
所述引线在所述引线的延伸方向上具有位于所述封装体的内部的一端、位于所述封装体的外部的另一端以及连接有所述金属丝的金属丝连接部,所述引线在所述一端和所述金属丝连接部之间的所述主面具有第一槽。
2.如权利要求1所述的半导体装置,其特征在于,
所述引线的线膨胀系数大于所述封装树脂的线膨胀系数。
3.如权利要求2所述的半导体装置,其特征在于,
所述引线由铜构成,所述封装树脂由环氧树脂构成,该环氧树脂包括由硅石构成的填料。
4.如权利要求1所述的半导体装置,其特征在于,
所述第一槽沿着与所述引线的延伸方向正交的方向延伸。
5.如权利要求4所述的半导体装置,其特征在于,
在所述引线的延伸方向上,在所述金属丝连接部和所述引线的所述一端之间配置有所述第一槽。
6.如权利要求4所述的半导体装置,其特征在于,
所述引线具有所述封装体内部的内侧部和所述封装体外部的外侧部,与所述引线的延伸方向正交的方向上的所述外侧部的宽度小于与所述引线的延伸方向正交的方向上的所述第一槽的长度。
7.如权利要求6所述的半导体装置,其特征在于,
与所述引线的延伸方向正交的方向上的所述内侧部的宽度大于与所述引线的延伸方向正交的方向上的所述外侧部的宽度。
8.如权利要求1所述的半导体装置,其特征在于,
所述第一槽的剖面形状为V字形状。
9.如权利要求8所述的半导体装置,其特征在于,
在所述引线的延伸方向上具有与所述第一槽相邻的第二槽。
10.如权利要求1所述的半导体装置,其特征在于,
在所述封装体的内部,在所述金属丝连接部和所述另一端之间具有第三槽。
11.如权利要求10所述的半导体装置,其特征在于,
在与所述引线的延伸方向正交的方向上,所述第三槽的长度小于所述第一槽的长度。
12.一种半导体装置,其特征在于,包括:
半导体芯片,具有四边形的第一面且在所述第一面上具有第一焊盘和多个第二焊盘,所述第一面具有对置的第一边和第二边;
第一引线以及第二引线,沿着与所述半导体芯片的所述第一边以及所述第二边正交的方向延伸,且具有主面和与所述主面对置的背面;
第一金属丝,连接到所述第一引线的主面,将所述半导体芯片的所述第一焊盘和所述第一引线电连接;
多个第二金属丝,连接到所述第二引线的主面,将所述半导体芯片的所述多个第二焊盘和所述第二引线电连接;以及
封装体,由封装树脂将所述半导体芯片、所述第一引线、所述第二引线、所述第一金属丝以及所述第二金属丝覆盖而成,
所述第一引线配置在所述半导体芯片的所述第一边侧,所述第二引线配置在所述半导体芯片的所述第二边侧,
所述第一引线在所述第一引线的延伸方向上具有位于所述封装体的内部的第一端部、位于所述封装体的外部的第二端部以及位于所述封装体的内部且连接有所述第一金属丝的第一金属丝连接部,
所述第二引线在所述第二引线的延伸方向上具有位于所述封装体的内部的第三端部、位于所述封装体的外部的第四端部以及位于所述封装体的内部且连接有所述多个第二金属丝的第二金属丝连接部,
在所述第一端部和所述第一金属丝连接部之间的所述第一引线的主面具有第一槽,
在所述第二引线的主面,从所述第二金属丝连接部至所述第三端部具有平坦面。
13.如权利要求12所述的半导体装置,其特征在于,
所述第一槽沿着与所述第一引线的延伸方向正交的方向延伸。
14.如权利要求13所述的半导体装置,其特征在于,
在所述第一引线的延伸方向上,在所述第一金属丝连接部和所述第一端部之间配置有所述第一槽。
15.如权利要求12所述的半导体装置,其特征在于,
在所述封装体内的所述第一引线的主面,在所述第一金属丝连接部和所述第二端部之间具有第二槽,
在所述封装体内的所述第二引线的主面,在所述第二金属丝连接部和所述第四端部之间具有第三槽。
16.如权利要求15所述的半导体装置,其特征在于,
与所述第一引线的延伸方向正交的方向上的所述第一槽的长度大于所述第二槽的长度。
17.一种半导体装置的制造方法,其特征在于,包括如下工序:
准备引线框架的工序,该引线框架包括具有对置的第一边和第二边以及对置的第三边和第四边的四边形的芯片焊盘、配置在所述芯片焊盘的所述第一边侧的多个第一引线、配置在所述芯片焊盘的所述第二边侧的多个第二引线、配置在所述芯片焊盘上的半导体芯片、将所述半导体芯片和所述多个第一引线电连接的多个第一金属丝以及将所述半导体芯片和所述多个第二引线电连接的多个第二金属丝;以及
封装工序,在具有空腔、与所述空腔连通的浇口并在所述浇口的相反侧具有与所述空腔连通的树脂池的模具中载置所述引线框架,从所述浇口注入封装树脂,在所述空腔以及所述树脂池中填充所述封装树脂,
所述半导体芯片、所述多个第一引线以及所述多个第二引线位于所述空腔内,
所述浇口位于所述芯片焊盘的所述第三边侧,所述树脂池位于所述芯片焊盘的所述第四边侧,
所述封装树脂包括填料,且与所述空腔的边界部分的所述树脂池的厚度大于所述封装树脂中包含的所述填料的平均粒径。
18.如权利要求17所述的半导体装置的制造方法,其特征在于,
所述填料由硅石构成。
19.如权利要求17所述的半导体装置的制造方法,其特征在于,
所述第一引线具有连接有所述第一金属丝的金属丝连接部以及在所述金属丝连接部和所述第一边之间形成的槽。
20.如权利要求19所述的半导体装置的制造方法,其特征在于,
所述槽与所述第一边平行地在所述第一引线上延伸。
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JP6253531B2 (ja) | 2014-06-30 | 2017-12-27 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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JP7381168B2 (ja) | 2019-12-09 | 2023-11-15 | 日清紡マイクロデバイス株式会社 | 半導体装置の設計方法 |
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