CN105023884A - 半导体封装及其制造方法 - Google Patents

半导体封装及其制造方法 Download PDF

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Publication number
CN105023884A
CN105023884A CN201410665678.1A CN201410665678A CN105023884A CN 105023884 A CN105023884 A CN 105023884A CN 201410665678 A CN201410665678 A CN 201410665678A CN 105023884 A CN105023884 A CN 105023884A
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semiconductor chip
chip
semiconductor
material layer
magnetic material
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CN105023884B (zh
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金泰勋
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SK Hynix Inc
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Hynix Semiconductor Inc
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Abstract

半导体封装及其制造方法。一种半导体封装包含其上设置基板垫的封装基板、设置在该封装基板之上的结构、利用具有其中设置磁性材料层的黏着构件而被设置在该结构之上的半导体芯片、设置在该半导体芯片的顶表面上的芯片垫、以及连接该基板垫以及该芯片垫的接合导线。

Description

半导体封装及其制造方法
相关申请交叉引用
本申请主张2014年4月18日申请的韩国专利申请案号10-2014-0046992的优先权，该专利申请案以其整体被纳入作为参考。
技术领域
本揭露内容的实施例涉及一种半导体封装，并且更具体而言涉及一种半导体封装以及一种制造半导体封装的方法。
背景技术
近来，电子装置已经在尺寸上被缩减并且在效能上加以改良，而且对于移动产品的需求已经增大。因此，对于超小及大容量的半导体封装的需求也已经增大。用于增加一半导体装置的储存容量的技术可包含提高一半导体芯片的集成程度以及在一半导体封装中安装多个半导体芯片。在半导体封装中安装多个半导体芯片通过修改一封装工艺以使得增加该半导体装置的储存容量成为可能的。因此，半导体产业利用一种包含多个半导体芯片的多芯片封装来增加该半导体装置的储存容量。
用于形成一种多芯片封装的技术可包含安装多个设置在一水平的方向上的芯片以及安装多个设置在一垂直的方向上的芯片。由于需要在尺寸上被缩减的电子装置的特征的缘故，一种包含多个被封装于其中而且在一方向上堆叠的半导体芯片的堆叠类型的多芯片封装可被利用。该堆叠类型的多芯片封装通过在一垂直的方向上堆叠多个半导体芯片来增加在一有限的空间内的密度。
发明内容
各种的实施例针对于半导体封装及其制造方法。
在某些实施例中，一种半导体封装可包含：其上设置基板垫的封装基板；设置在该封装基板之上的结构；利用黏着构件附接至该结构的半导体芯片，该黏着构件具有被设置于其中的磁性材料层；设置在该半导体芯片的顶表面上的芯片垫；以及连接该基板垫以及该芯片垫的接合导线。
根据另外的实施例，一种用于制造半导体封装的方法可包含：制备其上设置基板垫的封装基板；在该封装基板之上设置一下方的结构；制备其上设置芯片垫的半导体芯片，该芯片垫被设置在该半导体芯片的边缘部分的顶表面上；利用设置在该半导体芯片以及该下方的结构之间的黏着构件在该下方的结构之上设置该半导体芯片，使得该半导体芯片具有其中该边缘部分从该下方的结构的一侧突出的突出结构，该黏着构件具有被设置于其中的磁性材料层；施加磁场至该磁性材料层以便于支承该半导体芯片；以及在该半导体芯片藉由该磁场支承时，形成接合导线以连接该基板垫以及该芯片垫。
其中该下方的结构包括另一半导体芯片。
其中该黏着构件被设置在该半导体芯片的背侧表面上，该背侧表面和该顶表面相反。
其中该磁性材料层包括铁磁性材料、亚铁磁材料以及石墨烯中的一或多种。
其中该磁性材料层以格子形状形成，该格子形状中多个由磁性材料所形成的线状图案被配置以彼此交叉。
其中该磁性材料层包含被设置成靠近该黏着构件的多个边缘的线状边界。
其中该磁性材料层包含具有表面结构的平板形状。
其中该半导体芯片的支承包括：使得磁力产生器接触该半导体芯片的顶表面；供应电流至该磁力产生器以产生该磁场；以及利用通过藉由该磁力产生器所产生的该磁场以及在该黏着构件之内的该磁性材料层之间的互动所产生的磁力，来支承该半导体芯片。
其中该磁力产生器接触具有该突出结构的该半导体芯片的突出的边缘部分。
其中该磁场的产生和该接合导线的形成同时执行。
该半导体封装被包括在电子系统中，该电子系统进一步包括：内存；以及通过总线连接至该内存的控制器，其中该内存或该控制器包含该封装。
附图说明
图1是根据本揭露内容的一实施例的一种半导体封装的立体图。
图2至4展示根据一实施例的设置在黏着构件中的磁性材料层。
图5描绘一种引线接合工艺。
图6至11描绘根据一实施例的一种用于制造半导体封装的工艺。
图12及13描绘根据另一实施例的一种用于制造半导体封装的工艺。
图14及15描绘根据另一实施例的一种用于制造半导体封装的工艺。
图16是描绘根据一实施例的一种包含一封装的电子系统的方块图。
图17是描绘根据一实施例的另一种包含一封装的电子系统的方块图。
具体实施方式
本揭露内容的实施例将会在以下参考所附的图来加以详细地描述。应注意到的是，该图并非精确按照比例的，并且可能为了描述的便利性及清楚起见而在线的厚度或是构件的尺寸上被夸大。再者，如同在此所用的术语藉由考虑该些实施例的功能来加以定义的，并且可能会随着使用者或操作者的习惯或意图而变化。因此，该些术语应该根据在此所阐述的整体揭露内容来加以解释。
图1是根据本揭露内容的一实施例的一种半导体封装的立体图。该半导体封装100包含一封装基板110、多个基板垫115、第一及第二堆叠的半导体芯片120及130、第一及第二黏着构件125及135、多个芯片垫140、以及一接合导线145。
该第二黏着构件135被设置在该第一及第二半导体芯片120及130之间，以便于将该第一半导体芯片120接合至该第二半导体芯片130。该第二黏着构件135包含被设置于其中的磁性材料层137。
该封装基板110可包含一印刷电路板(PCB)或是挠性的PCB，并且可包含被安装于其上的半导体芯片或是集成电路芯片。该封装基板110包含一正面侧以及一面对该正面侧的背面侧。尽管未描绘在图1中，但是该封装基板110可包含被配置于其中的电路布线图案。
该多个基板垫115被设置在该封装基板110的正面侧上，以将该第一及第二半导体芯片120及130电连接至该封装基板110。该些基板垫115可以通过配置在该封装基板110中的电路布线图案来发送电性信号至该封装基板110的背面侧。该封装基板110可包含用于连接该些电路布线图案的例如是连接贯孔的连接布线(未绘出)。
描绘在图1中的基板垫115的数目是举例说明的，并且实施例并不限于此。在另一实施例中，基板垫115的数目可以根据该半导体封装的使用来加以调整。该基板垫115可包含一种导电材料，例如是铜(Cu)、镍(Ni)、金(Au)或类似者。
该第一及第二半导体芯片120及130可被配置在该封装基板110之上。在一实施例中，该第一及第二半导体芯片120及130可以用该第一半导体芯片120利用该第一黏着构件125而附接在该封装基板110之上，并且该第二半导体芯片130利用该第二黏着构件135而附接在该第一半导体芯片120之上的此种方式来加以堆叠。尽管未描绘在图1中，但是额外的半导体芯片可以堆叠在该第二半导体芯片130之上。
在本实施例中，设置在该第二半导体芯片130之下的结构只有该第一半导体芯片120而已，但是实施例并不限于此。在另一实施例中，设置在该第二半导体芯片130之下的结构可包含一虚拟芯片、或是一例如为阻焊剂层的绝缘层。在又一实施例中，设置在该第二半导体芯片130之下的结构可包含两个或多个半导体芯片。因此，在某些实施例中，两个或多个半导体芯片、两个或多个虚拟芯片、或是两个或多个绝缘层可以独立地堆叠、或是混合的堆叠。
该第一及第二半导体芯片120及130可以沿着该封装基板110的一第一方向堆叠。在一实施例中，该第一及第二半导体芯片120及130可以用其边缘部分是彼此偏离的此种方式来加以配置。因此，设置在该第一半导体芯片120之上的第二半导体芯片130的边缘部分150并不和该第一半导体芯片120重叠，而是从该第一半导体芯片120的边缘部分在一横向的方向上突出。换言之，该第二半导体芯片130可加以堆叠，以具有在该第一半导体芯片120之上的突出结构。
该多个芯片垫140被设置在该第二半导体芯片130上，以连接该封装基板110以及该第二半导体芯片130。配置在该第二半导体芯片130上的芯片垫140可被设置在具有该突出结构的第二半导体芯片130的边缘部分150上。该第一及第二半导体芯片120及130可包含硅(Si)。描绘在图1中的芯片垫140的数目及配置并不限于此。在另一实施例中，该些芯片垫140的数目及配置可以根据该第二半导体芯片130的类型来加以改变。
该接合导线145将该芯片垫140连接至该基板垫115。因此，该第二半导体芯片130可以经由该芯片垫140、该接合导线145以及该基板垫115来电连接至该封装基板110。该接合导线145可包含一种例如是铜(Cu)、金(Au)、银(Ag)或类似者的导电金属。
如上所述，该第一半导体芯片120以及该封装基板110可以利用该第一黏着构件125来彼此附接，并且该第一半导体芯片120以及该第二半导体芯片130可以利用该第二黏着构件135来彼此附接。该第一及第二黏着构件125及135的任一个可包含例如是晶粒附接膜(DAF)的黏着带。该第二黏着构件135可包含被设置于其中的磁性材料层137。
该磁性材料层137可包含一种磁性材料，例如一种铁磁性(ferromagnetic)材料、一种亚铁磁(ferrimagnetic)材料、石墨烯、或类似者。该铁磁性材料可包含镍(Ni)、钴(Co)、钢(Fe)、或类似者，并且该亚铁磁材料可包含磁铁矿(magnetite)、铁氧体(ferrite)、或类似者。该磁性材料层137可以是由一种并非持续产生磁力、而是只有在暴露到磁场时才产生磁力的材料所形成的，其中该磁场可以在用于产生磁力的磁力产生器被导通时加以产生。具有被设置于其中的磁性材料层137的第二黏着构件135被设置在该第二半导体芯片130的背面侧上，其包含具有该突出结构的第二半导体芯片130的边缘部分150的背面侧。
当设置在该第二黏着构件135中时，该磁性材料层137可具有各种的形状，其中的某些形状将会参考图2至4来加以描述。
图2展示一具有设置在一黏着构件135a之内的一磁性材料层137a的实施例。该磁性材料层137a具有格子图案A，其中多个由一种磁性材料所形成的线状图案被配置以彼此交叉。该格子图案A可包含一或多个方形、矩形或是多边形的形状。
图3展示一具有设置在一黏着构件135b之内的一磁性材料层137b的实施例。该磁性材料层137b仅被设置在该黏着构件135b的一或多个边缘处。该磁性材料层137b可具有一靠近或是沿着该黏着构件135b的边缘被设置的线状边界。
图4展示一具有设置在该黏着构件135c之内的一磁性材料层137c的实施例。该磁性材料层137c具有一平板形状。
图5描绘一种在一毛细管被移动时，将一接合导线的两个末端分别接合至一半导体芯片的一芯片垫以及一封装基板的一基板垫的引线接合工艺的一部分。在图5中，第一及第二堆叠的半导体芯片1120及1130被设置在一封装基板1110上。垫1115被设置在该封装基板1110上。该第一半导体芯片1120通过第一黏着构件1125而附接在该封装基板1110之上，并且该第二半导体芯片1130通过第二黏着构件1135而附接在该第一半导体芯片1120之上。
该第一及第二黏着构件1125及1135包含一黏着带，例如是一晶粒附接膜(DAF)。该第一黏着构件1125或是该第二黏着构件1130都没有一磁性材料层于其中。
如同在图5中所绘，一导线球1145形成在一毛细管1150的一末端，以便于将一接合导线连接至一设置在第二半导体芯片1130上的芯片垫1140，并且力F1通过该毛细管1150而被产生并且施加以将该导线球1145压到该芯片垫1140，以便于将该导线球1145接合至该芯片垫1140。
当该力F1通过该导线球1145被施加至该芯片垫1140时，该第二半导体芯片1130朝向一封装基板1110弯曲。当施加至该芯片垫1140的力F1被移除时，朝向该封装基板1110弯曲的第二半导体芯片1130倾向恢复至原始的状态。然而，当该第二半导体芯片1130在恢复至原始的状态之前弯曲超过一恢复的临界值时，一裂缝可能会产生在该第二半导体芯片1130中。另外，当该第二半导体芯片1130恢复时，该接合导线可能会弯曲或切断。
在另一方面，根据一实施例的一种例如是在图1中所示的封装100的半导体封装利用具有被设置于其中的磁性材料层137的第二黏着构件135，以实质避免该第二半导体芯片130在该引线接合工艺期间弯曲。明确地说，当一用于产生一磁力的磁力产生器被导通时，该磁性材料137产生一磁力，并且在具有被设置于其中的磁性材料层137的第二黏着构件135以及该磁力产生器之间的吸引力可被用来实质避免该第二半导体芯片130弯曲超过该临界值。
图6至11是用于解释根据各种实施例的一种用于制造半导体封装的工艺的图。图9描绘根据一实施例的引线接合装置。
参照图6及7，第一及第二半导体芯片220及230堆叠在一封装基板210之上。在一实施例中，该封装基板210可包含一PCB或是挠性的PCB。尽管未描绘在图中，但该封装基板210可包含配置于其中的电路布线图案，以便于在该半导体封装中的半导体芯片以及外部之间发送电性信号。多个基板垫215形成在该封装基板210的顶表面上，以便于将该封装基板210电连接至该第一及第二半导体芯片220及230。
该第一半导体芯片220利用第一黏着构件225而附接在该封装基板210之上，并且该第二半导体芯片230利用形成在该第二半导体芯片230的背侧表面230b上的第二黏着构件235而附接在该第一半导体芯片220之上。该第二半导体芯片230具有并不和设置在该第二半导体芯片230之下的第一半导体芯片220重叠而是从该第一半导体芯片220的一边缘部分在一横向的方向上突出的边缘部分250。换言之，该第二半导体芯片230可以在具有一突出结构的情况下被设置在该第一半导体芯片220之上。
尽管未描绘在图6中，额外的半导体芯片可以堆叠在该第二半导体芯片230之上。在本实施例中，设置在该第二半导体芯片230之下的结构仅包含该第一半导体芯片220而已，但是实施例并不限于此。在另一实施例中，设置在该第二半导体芯片230之下的结构可包含一虚拟芯片、或是一例如阻焊剂层的绝缘层。在一实施例中，该第一黏着构件225可包含例如是DAF的黏着带、或黏着剂。
参照图7，附接在该第二半导体芯片230的背侧表面230b上的第二黏着构件235包含一例如是一DAF的黏着带。该第二黏着构件235包含一被设置于其中的磁性材料层237。被设置在该第二黏着构件235中的磁性材料层237可包含一种会在用于产生磁力的磁力产生器运作时起反应的材料。
在一实施例中，该磁性材料层237可包含一种磁性材料，例如是一种铁磁性材料、一种亚铁磁材料、石墨烯、或类似者。该铁磁性材料可包含镍(Ni)、钴(Co)、钢(Fe)、或类似者。该亚铁磁材料可包含磁铁矿、铁氧体、或类似者。
该磁性材料层237可以用各种的图案形成，例如是那些针对于图2至4中的磁性材料层137所描述的。
多个芯片垫240形成在该第二半导体芯片230的一顶表面230a上，以用于将该封装基板210连接至该第二半导体芯片230。设置在该第二半导体芯片230上的芯片垫240可被设置在具有该突出结构的第二半导体芯片230的边缘部分250上。在图7中描绘的芯片垫240的数目并不限于此。在另一实施例中，芯片垫240的数目可以根据该第一及第二半导体芯片220及230的类型来加以调整。
参照图8及9，一种包含一磁力产生器300以及一引线接合器320的引线接合装置被设置在该半导体封装200处。该引线接合器320可被设置在该半导体封装200之上。该磁力产生器300被移动以接触到该第二半导体芯片230的顶表面230a。该磁力产生器300被设置在具有该突出结构的第二半导体芯片230的边缘部分250上。
该磁力产生器300可包含一电磁铁(未绘出)。该电磁铁可以通过将一导体缠绕一圆柱形的线轴(bobbin)以形成一线圈来形成。电流可以通过该电磁铁以产生磁力。
该磁力产生器300的操作可通过包含一电源供应单元705以及一电磁铁控制单元710的第一控制器700来加以控制。该电源供应单元705控制一电源来使电流传送至该磁力产生器300、或是阻挡该电流。该电磁铁控制单元710控制流过该磁力产生器300的电磁铁的电流，并且藉此控制该磁力的强度。
该引线接合器320可包含具有一空间设置于其中的毛细管305。通过该毛细管305的空间，可供应一导线315。尽管未描绘在图9中，但该毛细管305可以藉由一驱动单元而在上下的方向、或是左右的方向上加以移动。该引线接合器320的操作可藉由一包含一引线接合器驱动单元730以及一引线接合器控制单元740的第二控制器720来加以控制。该引线接合器驱动单元730控制该驱动单元以移动该毛细管305。该引线接合器控制单元740在该导线315的一末端产生一电火花(spark)以便于形成一导线球310，并且供应该导线315。
控制器750控制该第一及第二控制器700及720，以便于控制该整个引线接合工艺。
参照图10，图9的电源供应单元705提供一电流至该磁力产生器300之内的电磁铁，以产生第一磁力。该第一磁力通过接触该第二半导体芯片230的边缘部分250的顶表面230a的磁力产生器300以及设置在该第二黏着构件235中的磁性材料层237之间的互动而被产生在一第一方向M1上。该第一方向M1指示包含该第二半导体芯片230的半导体封装200被设置所在的方向。
当该磁力产生器300在该第一方向M1上产生该第一磁力时，设置在附接于该第二半导体芯片230的背侧表面230b上的第二黏着构件235中的磁性材料层237响应地产生一第二磁力。该磁性材料层237在一第二方向M2上、亦即朝向该磁力产生器300产生该第二磁力。尽管该磁性材料层237产生朝向该磁力产生器300的第二磁力，但是因为该磁力产生器300是接触该第二半导体芯片230的边缘部分250，因此该第二半导体芯片230在该引线接合工艺期间并未向上弯曲，而是实质固定在一水平的方向上。
当该第二半导体芯片230藉由该第二磁力支承时，该引线接合器320的毛细管305被降低直到其接触该芯片垫240为止。为了附接该导线球310至该芯片垫240，通过该毛细管305而施加一预设的力，以将该导线球310压到该芯片垫215。根据该实施例的半导体封装200利用包含该磁性材料层237的第二黏着构件235，并且因此在该磁力产生器300以及该第二黏着构件235之间产生一吸引力。因此，具有该突出结构的第二半导体芯片230的边缘部分250可以受到支承，并且避免实质向下的弯曲。因此，当该第二半导体芯片230弯曲及恢复时，可以实质避免发生例如裂缝的损坏。
如同在图11中所绘，接触该芯片垫240的毛细管305接着被举起而且在一横向的方向上移动，并且接着朝向一基板垫215降低。最初，该毛细管305接触该芯片垫240并且接着被举起。在此过程期间，可形成一环形。当该毛细管305被降低且接触该基板垫215时，形成接合导线245。该毛细管305施加一预设的力以将该接合导线245附接至该基板垫215，因而该芯片垫240以及该基板垫215通过该接合导线245来彼此连接。
接着，该毛细管305被举起，并且该接合导线245被切断以完成该引线接合工艺。当该引线接合工艺完成时，该磁力产生器300和该第二半导体芯片230的顶表面230a分开。
在一实施例中，该引线接合工艺在该磁力产生器300被设置于相隔该第二半导体芯片230的顶表面230a一预设的高度下加以执行。当一电流被供应到该磁力产生器300之内的电磁铁以产生一磁力并且该磁力产生器300和该第二半导体芯片230分开时，设置在该第二黏着构件235中的磁性材料层237产生一朝向该磁力产生器300的磁力，亦即一吸引力。该产生的吸引力可以避免该第二半导体芯片230在该引线接合工艺期间实质的移动。
图12及13是用于解释根据另一实施例的一种用于制造半导体封装的方法的图。
图13展示第一及第二半导体芯片420及430堆叠在一封装基板410之上。该封装基板410可包含一PCB或是挠性的PCB。多个基板垫415形成在该封装基板410的一正面侧的表面上，以便于将该封装基板410电连接至该第一及第二半导体芯片420及430。
一第一极性板500被设置在该封装基板410的一背侧表面上。该第一极性板500可以定义为由一种用作阳极(+)或阴极(-)的导体所形成的板。
该第一半导体芯片420利用一第一黏着构件425而附接在该封装基板410之上，并且该第二半导体芯片430利用一附接在该第二半导体芯片430的背侧表面430b上的第二黏着构件435而附接在该第一半导体芯片420之上。多个芯片垫440形成在该第二半导体芯片430的一顶表面430a上。该些芯片垫440可被设置在具有一突出结构的第二半导体芯片430的边缘部分450上。尽管未描绘在图中，但是额外的半导体芯片可以堆叠在该第二半导体芯片430之上，且/或可被设置在该第一及第二半导体芯片420及430之间。该第一黏着构件425可包含例如是DAF的黏着带、或黏着剂。
如同在图12中所示，附接在该第二半导体芯片430的背侧表面430b上的第二黏着构件435可包含例如是DAF的黏着带。该第二黏着构件435可具有一被设置于其中的第二极性板437。该第二极性板437可被定义为由一种用作阳极(+)或阴极(-)的导体所形成的板。该第二极性板437可具有和该第一极性板500相同的极性。例如，当该第一极性板500具有一正电位(+)时，该第二极性板437可具有一正电位(+)，并且当该第一极性板500具有一负(-)电位时，该第二极性板437可具有一负(-)电位。
当具有相同的极性的第一及第二极性板500及437分别被设置在该封装基板410的背侧表面上以及在该第二半导体芯片230的第二黏着构件435中并且被配置以彼此面对时，排斥力M3及M4被产生在该第一及第二极性板500及437之间。具有该突出结构的第二半导体芯片430的末端部分450藉由产生在该第一及第二极性板500及437之间的排斥力M3及M4来加以支承。因此，当该引线接合器320的毛细管305在该引线接合工艺期间施加一预设的力以将该导线球310附接至该芯片垫440时，该第二半导体芯片430可以避免实质的弯曲。当该引线接合工艺完成时，被设置在该封装基板410的背侧表面上的第一极性板500被移除。
图14及15是用于解释根据另一实施例的一种用于制造半导体封装的方法的图。
参照图14及15，该半导体封装600包含堆叠在一封装基板610之上的第一及第二半导体芯片620及630。多个基板垫615形成在该封装基板610的一顶表面上，以便于将该封装基板610电连接至该第一及第二半导体芯片620及630。
该第一半导体芯片620可以利用一第一黏着构件625而附接在该封装基板610之上，并且该第二半导体芯片630可以利用一形成在该第二半导体芯片630的一背侧表面630b上的第二黏着构件635而附接在该第一半导体芯片620之上。多个芯片垫640形成在该第二半导体芯片630的一顶表面630a上。该些芯片垫640可被设置在具有一突出结构的第二半导体芯片630的一边缘部分上。尽管未描绘在图中，额外的半导体芯片可以堆叠在该第二半导体芯片630之上，且/或可被设置在该第一及第二半导体芯片620及630之间。该第一及第二黏着构件625及635的任一个可包含例如是DAF的黏着带、或黏着剂。
在该封装基板610之上，阻风板(air dam)655可被设置。该些阻风板655可被设置在该第一及第二半导体芯片620及640的堆叠的结构的左侧及右侧的封装基板610之上，其中该堆叠的结构插置于其间。
接着，一空气注入装置660以及该引线接合器320的毛细管305被设置在该半导体封装600之上。空气从该空气注入装置660朝向该第二半导体芯片630加以供应。从该空气注入装置660供应的空气被注入到位于具有该突出结构的第二半导体芯片630的边缘部分之下的空间650内。接着，当该空气藉由所设置的阻风板655而被维持于位于该第二半导体芯片630的边缘部分之下的该空间650内、而其中该第一及第二半导体芯片620及630的堆叠的结构插置于阻风板655间时，该第二半导体芯片630藉由该空气加以支承，就像是一支承结构存在于该第二半导体芯片630之下。
上述利用该毛细管305的引线接合方法被用来形成一金属导线645以用于将一芯片垫640连接至一基板垫615。当该空气在该引线接合工艺被执行时持续地被注入到位于具有该突出结构的第二半导体芯片630的边缘部分之下的空间650内时，该第二半导体芯片630可以避免因为由该毛细管305所施加的力而实质弯曲。
当该引线接合工艺完成时，该空气注入装置660的空气注入过程停止。该些阻风板645可以在该引线接合工艺之后加以移除。
上述的封装可以应用至各种的电子系统。
参照图16，根据一实施例的封装可以应用至一电子系统1710。该电子系统1710可包含一控制器1711、一输入/输出单元1712以及一内存1713。该控制器1711、该输入/输出单元1712以及该内存1713可以通过一总线1715来彼此连接，该总线1715提供数据发送所通过的一路径。
例如，该控制器1711可包含至少一微处理器、至少一数字信号处理器、至少一微控制器、以及能够执行和这些构件相同功能的逻辑设备中的至少任何一种。该控制器1711以及该内存1713中的至少一个可包含根据本揭露内容的实施例的封装中的至少任何一种。该输入/输出单元1712可包含从一小型键盘、一键盘、一显示设备、一触控屏幕、等等中选出的至少一个。该内存1713是一用于储存数据的装置。该内存1713可储存将藉由该控制器1711与类似者执行的数据及/或命令。
该内存1713可包含一例如是DRAM的易失性(volatile)内存装置及/或一例如是闪存的非易失性(nonvolatile)内存装置。例如，一闪存可被安装到一例如是移动终端或是桌面计算机的信息处理系统。该闪存可以构成一固态硬盘(SSD)。在此例中，该电子系统1710可以稳定地储存大量的数据在一闪存系统中。
该电子系统1710可进一步包含一适合用于发送至通信网络以及从该通信网络接收数据的接口1714。该接口1714可以是一有线或是无线的类型。例如，该接口1714可包含一天线、或是一有线或无线的收发器。
该电子系统1710可被实现为一移动系统、一个人计算机、一工业计算机、或是一执行各式各样功能的逻辑系统。例如，该移动系统可以是一个人数字助理(PDA)、一便携计算机、一平板计算机、一移动电话、一智能型手机、一无线电话、一膝上型计算机、一记忆卡、一数字音乐系统、以及一信息发送/接收系统中的任一个。
在其中该电子系统1710是能够执行无线通信的设备的实施例中，该电子系统1710可被用在通信系统中，例如是一采用CDMA(分码多重存取)、GSM(全球行动通讯系统)、NADC(北美数字移动电话)、E-TDMA(强化的分时多重存取)、WCDMA(宽带分码多重存取)、CDMA2000、LTE(长期演进技术)，以及Wibro(无线宽带因特网)中的一或多个的系统。
参照图17，根据该些实施例的封装可以被提供成具有一记忆卡1800的形式。例如，该记忆卡1800可包含一例如是非易失性内存装置的内存1810以及一内存控制器1820。该内存1810以及该内存控制器1820可以储存数据、或是读取所储存的数据。
该内存1810可包含本揭露内容的实施例的封装技术所应用到的非易失性内存装置中的至少任何一种。该内存控制器1820可以响应于来自一主机1830的一读取/写入请求以控制该内存1810，使得所储存的数据被读出、或是数据被储存。
尽管本揭露内容的较佳实施例已经为了举例说明之目的而被揭露，但是本领域技术人员将会体认到各种的修改、增加及替代是可能的，而不脱离如同在所附的权利要求书中界定的本揭露内容的范畴及精神。

Claims (10)

1.一种半导体封装，其包括：
其上设置基板垫的封装基板；
设置在该封装基板之上的结构；
利用黏着构件附接至该结构的半导体芯片，该黏着构件具有被设置于其中的磁性材料层；
设置在该半导体芯片的顶表面上的芯片垫；以及
连接该基板垫以及该芯片垫的接合导线。
2.如权利要求1所述的半导体封装，其中该半导体芯片具有一突出结构，其中该半导体芯片的边缘部分远离该结构的一侧而突出，并且该芯片垫被设置在该半导体芯片的突出的边缘部分上。
3.如权利要求2所述的半导体封装，其中该黏着构件被设置在该半导体芯片的背侧表面上，该背侧表面和该半导体芯片的该顶表面相反。
4.如权利要求1所述的半导体封装，其中该结构包括另一半导体芯片。
5.如权利要求1所述的半导体封装，其中该磁性材料层包括铁磁性材料、亚铁磁材料以及石墨烯中的一种或多种。
6.如权利要求1所述的半导体封装，其中该黏着构件包含黏着带。
7.如权利要求1所述的半导体封装，其中该磁性材料层包含格子图案，该格子图案中多个线状图案被配置以彼此交叉。
8.如权利要求1所述的半导体封装，其中该磁性材料层包含被设置成靠近该黏着构件的多个边缘的线状边界。
9.如权利要求1所述的半导体封装，其中该磁性材料层包含具有平板形状的结构。
10.一种用于制造半导体封装的方法，该方法包括：
制备其上设置基板垫的封装基板；
在该封装基板之上设置一下方的结构；
制备其上设置芯片垫的半导体芯片，该芯片垫被设置在该半导体芯片的边缘部分的顶表面上；
利用设置在该半导体芯片以及该下方的结构之间的黏着构件在该下方的结构之上设置该半导体芯片，使得该半导体芯片具有其中该边缘部分从该下方的结构的一侧突出的突出结构，该黏着构件具有被设置于其中的磁性材料层；
施加磁场至该磁性材料层以支承该半导体芯片；以及
在该半导体芯片藉由该磁场加以支承时，形成接合导线以连接该基板垫以及该芯片垫。
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