CN104380462B - 功率半导体装置 - Google Patents

功率半导体装置 Download PDF

Info

Publication number
CN104380462B
CN104380462B CN201380028042.XA CN201380028042A CN104380462B CN 104380462 B CN104380462 B CN 104380462B CN 201380028042 A CN201380028042 A CN 201380028042A CN 104380462 B CN104380462 B CN 104380462B
Authority
CN
China
Prior art keywords
power semiconductor
metal line
region
electric current
external connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201380028042.XA
Other languages
English (en)
Other versions
CN104380462A (zh
Inventor
冈山芳央
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Intellectual Property Management Co Ltd
Original Assignee
Panasonic Intellectual Property Management Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Intellectual Property Management Co Ltd filed Critical Panasonic Intellectual Property Management Co Ltd
Publication of CN104380462A publication Critical patent/CN104380462A/zh
Application granted granted Critical
Publication of CN104380462B publication Critical patent/CN104380462B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30101—Resistance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices

Abstract

本发明涉及并联驱动三个以上的功率半导体元件来进行功率转换的功率半导体装置，其目的在于降低施加于各功率半导体元件的端子间的电压的偏差，提高功率半导体元件的寿命、功率半导体装置的可靠性。为了达到该目的，本发明包括：并列搭载在金属布线(4)上的三个以上的功率半导体元件(701～704)；与金属布线(4)不同的金属布线(5)，功率半导体元件的一个端子与布线(4)相连接，另一个端子与布线(5)相连接，在该功率半导体装置中，搭载有功率半导体元件(701～704)的区域的金属布线(4)的电阻值在电流的流动方向的下游侧比上游侧大。

Description

功率半导体装置
技术领域
本发明涉及功率转换装置等的对大电流进行处理的功率半导体装置。
背景技术
功率半导体装置被用于以太阳能电池的功率调节器、电动机的驱动控制、空气调节器的压缩机控制等所使用的功率转换装置(逆变器)为首的各种用途。尤其近年来，为了应对全球变暖、实现可持续的社会，正不断发展家电产品等进一步的节能及太阳能发电等自然能源的普及。因此，也增大了对功率半导体装置的需求，要进行对大功率、大电流的应对及面向高效率化的技术开发。
专利文献1涉及功率半导体装置(逆变器模块)，尤其对开关速度的高速化和应对大电流化的MOSFET(Metal Oxide Semiconductor Field Effect Transistor：金属氧化物半导体场效应晶体管)、IGBT(Insulated Gate Bipolar Transistor：绝缘栅双极型晶体管)等功率半导体元件的并列化中的寄生电感的降低及均等化，及栅极布线的走线进行记载。
图7示出了例如专利文献1所公开的现有的功率半导体装置的内部结构的简要俯视图。
图7所示的现有的功率半导体装置是将作为进行高电压侧的开关的功率半导体元件的MOSFET107和作为进行低电压侧的开关的元件的MOSFET108分别以4个并联的方式搭载在引线框上的所谓的二合一功率模块。该模块在有2个时起到单相逆变器电路的作用，在有3个时起到三相逆变器电路的作用。
图7所示的从模塑树脂115露出到外部的标注有标号101、102、103的部分分别是电力电路的外部连接端子。例如，外部连接端子101施加有直流电力的高电压侧、外部连接端子103施加有直流电力的低电压侧，从而输入直流电力，向与外部连接端子102相连接的外部布线输出交流电力。
此外，图7所示的MOSFET107、108中分别在元件的表面设有栅极电极111，分别在元件表面的栅极电极111以外的区域设有源极电极121s，此外，分别在元件的背面设有漏极电极。
图7所示的MOSFET107的源极电极121s通过由铝或铜构成的引线(或者带件)109与连接到输出端子(外部连接端子102)的金属布线105相连接，MOSFET108的源极电极121s通过由铝或铜构成的引线(或者带件)110与连接到输入的低电压侧端子(外部连接端子103)的金属布线106相连接，形成电力电路。
各元件的栅极电极111以及源极电极121s分别通过铝或金构成的接合引线112与栅极电极端子113及源极电极端子114相连接，从而与设置在模块外部的控制电路(未图示)相连接，进行逆变器工作所需的控制。
另外，图7中，与各MOSFET相连的引线109、110、112形成为相等长度及相同形状，以使寄生电感变为均等。并且，将金属布线104、105、106及栅极电极端子113及源极电极端子114的配置设计成引线109、110、112的走线变短。
现有技术文献
专利文献
专利文献1：日本专利特开2004-22960号公报
发明内容
发明所要解决的技术问题
然而，本发明人发现，在图7所示的现有例中，在进行高电压侧的开关的4个MOSFET107中流过均等的电流的情况下、或者进行低电压侧的开关的4个MOSFET108中流过均等电流的情况下，若求出金属布线104、105、106的布线电阻所产生的电压降，则施加于各MOSFET的源极及漏极间的电压变得不均匀。
关于这一点，使用图8所示的电路图来进行说明。
此处，图8是表示图7所示的现有的功率半导体装置的等效电路的图。
如图8所示，金属布线104(参照图7)的布线电阻为Ra1～Ra4、金属布线105(参照图7)的连接有引线109的区域的布线电阻为Rb1～Rb4、金属布线105(参照图7)的搭载有MOSFET108的区域的布线电阻为Rc1～Rc4、金属布线106(参照图7)的布线电阻为Rd1～Rd4，引线109(参照图7)及引线110(参照图7)的布线电阻为Rw。
假设MOSFET107(参照图7、图8)导通，MOSFET108(参照图7、图8)断开的状态，将外部连接端子101(参照图7、图8)的电压设定为1V，外部连接端子102(参照图7、图8)的电压设定为0V，分别流过4个MOSFET107(参照图7、图8)的电流设定为50A。金属布线的布线电阻由于布线宽度是固定的因此Ra2＝Ra3＝Ra4、Rb1＝Rb2＝Rb3，在此次的计算中为0.1mΩ。Ra1和Rb4由于布线长度较长，因此设为0.2mΩ。此外，引线的布线电阻Rw＝0.3mΩ。
若使用以上数值计算各电极的电位，则分别施加于4个MOSFET107(参照图7、图8)的源极电极121s和漏极电极121d之间的电压在图7的纸面上从上到下依次为0.875V、0.865V、0.865V、0.875V。即，由于对并联设置的4个MOSFET107施加不同的电压，在未考虑施加在源极电极121s和漏极电极121d之间的电压的偏差的现有的功率半导体装置的结构中，具有可能会使电流不平衡、对MOSFET的可靠性产生不良影响的问题。
本发明考虑了上述现有的这样的问题，其目的在于，提供一种能抑制对功率半导体元件施加的电压变得不均匀的功率半导体装置。
解决技术问题所采用的技术方案
为了达到上述目的，第一项本发明的功率半导体装置的特征在于，包括：
第一金属布线，该第一金属布线与第一外部连接端子相连接；
第二金属布线，该第二金属布线与第二外部连接端子相连接；
第三金属布线，该第三金属布线与第三外部连接端子相连接；
第一功率半导体元件组，该第一功率半导体元件组包含安装于所述第一金属布线上的三个以上的第一功率半导体元件；以及
第二功率半导体元件组，该第二功率半导体元件组包含与安装于所述第二金属布线上的所述第一功率半导体元件个数相同的第二功率半导体元件，
所述第一功率半导体元件所具有的电极通过第一导电构件与所述第二金属布线相连接，且所述第二功率半导体元件所具有的电极通过第二导电构件与所述第三金属布线相连接，
所述第一金属布线、及所述第二金属布线中安装有所述第一功率半导体元件组或所述第二功率半导体元件组的区域的电阻值在电流的流动方向的下游侧大于上游侧，或者所述第二金属布线及所述第三金属布线中连接有所述第一导电构件或所述第二导电构件的区域的电阻值在所述电流的流动方向的下游侧小于上游侧。
根据上述结构，能抑制由于金属布线的电压降而导致的施加于各功率半导体元件的电压变得不均匀。
关于第二项本发明，如上述第一项本发明所述的功率半导体装置，其特征在于，
所述第一、第二及第三金属布线中，安装有所述第一及第二功率半导体元件组的区域和连接有所述第一及第二导电构件的区域实际上呈直线状的形状，所述第一、第二及第三金属布线的所述直线状的区域被配置为实际上相互平行。
关于第三项本发明，如上述第一项或第二项本发明所述的功率半导体装置，其特征在于，
安装有所述第一功率半导体元件组或所述第二功率半导体元件组的所述直线状的区域中的宽度相对于所述电流的流动方向逐渐变细，或者
连接有所述第一导电构件或所述第二导电构件的所述直线状的区域的宽度相对于所述电流的流动方向逐渐变粗。
关于第四项本发明，如上述第一项或第二项本发明所述的功率半导体装置，其特征在于，
在安装有所述第一功率半导体元件组或所述第二功率半导体元件组的所述直线状的区域中设有狭缝或切口，所述区域的电阻值设定为相对于所述电流的流动方向逐渐变大，或者
在连接有所述第一导电构件或所述第二导电构件的所述直线状的区域中设有狭缝或切口，所述区域的电阻值设定为相对于所述电流的流动方向逐渐变小。
关于第五项本发明，如上述第一项或第二项本发明所述的功率半导体装置，其特征在于，
所述第一、第二及第三金属布线的所述直线状的区域中，(1)连接有所述第一及第二导电构件的区域的电阻值相对于所述电流的流动方向逐渐变小，且(2)安装有所述第一及第二功率半导体元件组的区域的电阻值相对于所述电流的流动方向逐渐变大。
根据上述结构，能更有效地抑制施加于各功率半导体元件的电压变得不均匀。
关于第六项本发明，如上述第一项至第五项的任一本发明所述的功率半导体装置，其特征在于，
所述第一及第三外部连接端子与所述实际上相互平行的所述直线状的所述第一及第三金属布线的一个端部相连接，所述第二外部连接端子在所述一个端部相反侧与所述第二金属布线的另一个端部相连接。
关于第七项本发明，如上述第一项至第六项的任一本发明所述的功率半导体装置，其特征在于，
所述功率半导体装置是构成将直流电力转换成交流电力的功率转换装置或功率转换电路的一部分。
关于第八项本发明，如上述第七项本发明所述的功率半导体装置，其特征在于，
直流电压施加于所述第一及第三外部连接端子，从所述第二外部连接端子输出交流电压。
关于第九项本发明，如上述第一项至第八项的任一本发明所述的功率半导体装置，其特征在于，
所述第一或第二功率半导体元件是包括源极电极、漏极电极及栅极电极的MOSFET，在所述源极电极和所述漏极电极之间形成寄生二极管。
关于第十项本发明，如上述第一项至第八项的任一本发明所述的功率半导体装置，其特征在于，
所述第一或第二功率半导体元件组包含三个以上的作为开关元件的所述功率半导体元件和一个以上的整流元件。
发明效果
根据本发明，发挥了能抑制施加于功率半导体元件的电压变得不均匀的效果。
附图说明
图1是表示本发明的一个实施方式所涉及的功率半导体装置的内部结构的简要俯视图。
图2是表示本发明的功率半导体装置的电路图。
图3是本发明的功率半导体装置树脂成型后的外观立体图。
图4是表示本发明的其它实施方式所涉及的功率半导体装置的内部结构的简要俯视图。
图5是表示本发明的其它实施方式所涉及的功率半导体装置的内部结构的简要俯视图。
图6是表示本发明的其它实施方式所涉及的功率半导体装置的内部结构的简要俯视图。
图7是表示现有的功率半导体装置的内部结构的简要俯视图。
图8是图7所示的现有的功率半导体装置的电路图。
具体实施方式
以下，利用附图，对本发明的一个实施方式进行说明。
(实施方式1)
图1是表示本发明的一个实施方式所涉及的功率半导体装置的内部结构的简要俯视图。
图1所示的本实施方式的功率半导体装置是将作为进行高电压侧开关的功率半导体元件的MOSFET7(701～704)和作为进行低电压侧开关的功率半导体元件的MOSFET8(801～804)分别以4个并联的方式搭载在引线框上的所谓的二合一功率模块。
图1所示的从模塑树脂15露出到外部的标注有标号1、2、3的部分分别是电力电路的外部连接端子。例如，外部连接端子1施加有直流电力的高电压侧、外部连接端子3施加有直流电力的低电压侧，从而输入直流电力，向与外部连接端子2相连接的外部布线输出交流电力。
此外，图1所示的MOSFET701～704、MOSFET801～804中分别在元件的表面设有栅极电极11，分别在元件表面的栅极电极11以外的区域设有源极电极21s，此外，分别在元件的背面设有漏极电极21d(参照图2)。
连接到作为输入的高电压侧端子的外部连接端子1的金属布线4上所按转的MOSFET701～704的源极电极21s通过由铝或铜构成的引线(或带件)9与连接有作为输出端子的外部连接端子2的金属布线5相连接，金属布线5上所安装的MOSFET801～804的源极电极21s通过由铝或铜构成的引线(或带件)10与连接有作为输入的低电压侧端子的外部连接端子3的金属布线6相连接，形成电力电路。
各元件的栅极电极11以及源极电极21s分别由铝或金构成的接合引线12与栅极电极端子13及源极电极端子14相连接，从而与设置在模块外部的控制电路(未图示)相连接，进行逆变器工作所需的控制。
另外，本实施方式的金属布线4是本发明的第一金属布线的一个示例，本实施方式的金属布线5是本发明的第二金属布线的一个示例，本实施方式的金属布线6是本发明的第三金属布线的一个示例。此外，本实施方式的外部连接端子1、2、3是本发明的第一外部连接端子、第二外部连接端子、第三外部连接端子的一个示例。本实施方式的引线(或者带件)9是本发明的第一导电构件的一个示例，本实施方式的引线(或者带件)10是本发明的第二导电构件的一个示例。本实施方式的MOSFET701～704分别是本发明的第一功率半导体元件的一个示例，本实施方式的MOSFET801～804分别是本发明的第二功率半导体元件的一个示例。本实施方式的包含4个MOSFET701～704的结构是本发明的第一功率半导体元件组的一个示例，本实施方式的包含4个MOSFET801～804的结构是本发明的第二功率半导体元件组的一个示例。
如图1所示，金属布线4、5、6的搭载有功率半导体元件(MOSFET701～704及MOSFET801～804)的区域，以及连接有引线的区域中，布线的厚度是固定地，但形成为与电流的流动方向相对应、各个布线宽度呈倾斜地变化。
在高电压侧的MOSFET701～704导通、低电压侧的MOSFET801～804断开的情况下，电流从外部连接端子1经由金属布线4、MOSFET701～704、引线9流入金属布线5、外部连接端子2。
金属布线4的搭载有MOSFET701～704的区域形成为相对于电流的流动方向布线宽度变细，即布线电阻变大，金属布线5的连接有引线9的区域形成为相对于电流的流动方向布线宽度变粗，即布线电阻变小。
另一方面，在高电压侧的MOSFET701～704断开、低电压侧的MOSFET801～804导通的情况下，电流从外部连接端子2经由金属布线5、MOSFET801～804、引线10流入金属布线6、外部连接端子3。
金属布线5的搭载有MOSFET801～804的区域形成为相对于电流的流动方向布线宽度变细，即布线电阻变大，金属布线6的连接有引线10的区域形成为相对于电流的流动方向变粗，即布线电阻变小。
图2是表示本发明的功率半导体装置的电路图。金属布线4(图1)的布线电阻为Ra1～4(Ω)，金属布线5(图1)的连接有引线9的区域的布线电阻为Rb1～4(Ω)，金属布线5(图1)的搭载有MOSFET801～804的区域的布线电阻为Rc1～4(Ω)，金属布线6(图1)的布线电阻为Rd1～4(Ω)，引线9(图1)以及引线10(图1)的布线电阻为Rw(Ω)。
假设MOSFET701～701为导通，MOSFET801～804为断开的状态，设外部连接端子1的电压为Vdd(V)，外部连接端子2的电压为Vss(V)，流过各MOSFET701、702、703、704的电流分别为I1、I2、I3、I4(A)、流过外部连接端子1及外部连接端子2的电流为I(A)(＝I1+I2+I3+I4)。
在以上条件下，利用下式(1)～(4)及下式(5)～(8)来表示各MOSFET701～704的漏极电位Vd1～Vd4(V)及源极电位Vs1～Vs4(V)。
[数学式1]
Vd1＝Vdd-(I1+I2+I3+I4)Ra1 (1)
Vd2＝Vdd-(I1+I2+I3+I4)Ra1-(I2+I3+I4)Ra2 (2)
Vd3＝Vdd-(I1+I2+I3+I4)Ra1-(I2+I3+I4)Ra2-(I3+I4)Ra3 (3)
Vd4＝Vdd-(I1+I2+I3+I4)Ra1-(I2+I3+I4)Ra2-(I3+I4)Ra3-I4Ra4 (4)
[数学式2]
Vs4＝Vss+(I1+I2+I3+I4)Rb4+I4Rw (5)
Vs3＝Vss+(I1+I2+I3+I4)Rb4+(I1+I2+I3)Rb3+I3Rw (6)
Vs2＝Vss+(I1+I2+I3+I4)Rb4+(I1+I2+I3)Rb3+(I1+I2)Rb2+I2Rw (7)
Vs1＝Vss+(I1+I2+I3+I4)Rb4+(I1+I2+I3)Rb3+(I1+I2)Rb2+(I1)Rb1+I1Rw (8)
根据上述，若求出各MOSFET701～704的源极漏极间的电压Vds1～Vds4(V)，则为下式(9)～(12)。
[数学式3]
Vds1＝Vd1-Vs1
＝Vdd-(I1+I2+I3+I4)Ra1-{Vss+(I1+I2+I3+I4)Rb4+(I1+I2+I3)Rb3
+(I1+I2)Rb2+(I1)Rb1+I1Rw} (9)
Vds2＝Vd2-Vs2
＝Vdd-(I1+I2+I3+I4)Ra1-(I2+I3+I4)Ra2-{Vss+(I1+I2+I3+I4)Rb4
+(I1+I2+I3)Rb3+(I1+I2)Rb2+I2Rw} (10)
Vds3＝Vd3-Vs3
＝Vdd-(I1+I2+I3+I4)Ra1-(I2+I3+I4)Ra2-(I3+I4)Ra3-{Vss+(I1+I2+I3+I4)Rb4+(I1+I2+I3)Rb3+I3Rw} (11)
Vds4＝Vd4-Vs4
＝Vdd-(I1+I2+I3+I4)Ra1-(I2+I3+I4)Ra2-(I3+I4)Ra3-I4Ra4
-{Vss+(I1+I2+I3+I4)Rb4+I4Rw} (12)
此处，若V’＝Vdd-Vss-I(Ra1+Rb4)，则上述式(9)～式(12)使用V’如下式(13)～(16)所示。
[数学式4]
Vds1＝V’-{(I1+I2+I3)Rb3+(I1+I2)Rb2+(I1)Rb1+I1Rw} (13)
Vds2＝V’-(I2+I3+I4)Ra2-{(I1+I2+I3)Rb3+(I1+I2)Rb2+I2Rw} (14)
Vds3＝V’-(I2+I3+I4)Ra2-(I3+I4)Ra3-{(I1+I2+I3)Rb3+I3Rw} 15)
Vds4＝V’-(I2+I3+I4)Ra2-(I3+I4)Ra3-I4Ra4-I4Rw (16)
此外，假设流过各MOSFET701～704的电流相等(I1＝I2＝I3＝I4＝I/4)，V＝V’-IRw/4，则上式(13)～(16)如下式(17)～(20)所示。
[数学式5]
Vds1＝V-I(3×Rb3+2×Rb2+Rb1)/4 (17)
Vds2＝V-I(3×Ra2+3×Rb3+2×Rb2)/4 (18)
Vds3＝V-I(3×Ra2+2×Ra3+3×Rb3)/4 (19)
Vds4＝V-I(3×Ra2+2×Ra3+Ra4)/4 (20)
接着，使上述金属布线4的布线电阻Ra2～Ra4、及金属布线5的布线电阻Rb1～Rb3各种各样地变化，利用上述式(17)～(20)计算分别施加于各MOSFET701～704的源极电极21s与漏极电极21d之间的电压Vds1～Vds4而得到的结果在(表1)中示出。
其中，设定为Vdd-Vds＝1(V)、I＝200(A)、I1＝I2＝I3＝I4＝50(A)、Rw＝0.3(mΩ)、Ra1＝Rb4＝0.2(mΩ)。
另外，在该情况下，V＝V’-IRw/4＝0.905(V)。
[表1]
表1所示的例1～3是基于现有结构计算得到的结果。根据这些例1～3可知，在金属布线4和5各自的布线电阻Ra2～Ra4、及Rb1～Rb3全部相等的情况下，与布线电阻值的增减相对应，电压Vds(V)的偏差发生增减。
此外，例4是如下情况：布线电阻Ra2～Ra4的值相对于电流的流动方向逐渐减小，布线电阻Rb1～Rb3的值相对于电流的流动方向逐渐减小。例5是如下情况：布线电阻Ra2～Ra4的值相对于电流的流动方向逐渐减小，布线电阻Rb1～Rb3的值相对于电流的流动方向逐渐增大。例6是如下情况：布线电阻Ra2～Ra4的值相对于电流的流动方向逐渐增大，布线电阻Rb1～Rb3的值相对于电流的流动方向逐渐减小。
与此相对，例7～例11均是如下情况：布线电阻Ra2～Ra4的值在电流的流动方向的下游侧大于上游侧，且布线电阻Rb1～Rb3的值在电流的流动方向的下游侧小于上游侧。
例3中由于原本将布线电阻设定地较小，因此若将其除外来考虑，则与例1～2及例4～6相比，将布线电阻设定成例7～11那样的情况能使各MOSFET701～704的源极漏极间的电压Vds(V)的偏差较小。
尤其，在4个MOSFET并联的情况下，当Ra4＝Rb1＝3×Ra2＝3×Rb3、Ra3＝Rb2成立时，例如，如例7所示，当Ra2为0.1mΩ、Ra3为0.2mΩ、Ra4为0.3mΩ、Rb1为0.3mΩ、Rb2为0.2mΩ、Rb3为0.1mΩ时，电压Vds(V)的偏差为零。
对MOSFET的并联数为n的情况进行研究的结果是：当Ra2＝Rb(n-1)：Ra3＝Rb(n-2)：…：Ra(n)＝Rb1的比为1：2：…：n-1时，电压Vds(V)的偏差为零。
例如，在5个MOSFET并联的情况下，若Ra2＝Rb4＝0.1mΩ、Ra3＝Rb3＝0.2mΩ、Ra4＝Rb2＝0.3mΩ、Ra5＝Rb1＝0.4mΩ，则电压Vds(V)的偏差为零。
根据以上的结果可知，通过将搭载有功率半导体元件的区域的金属布线的电阻值设定为在电流流动的方向的下游侧大于上游侧，且将连接有引线的区域的金属布线的电阻值设定为在电流流动的方向的下游侧小于上游侧，从而能抑制施加于各功率半导体元件的源极漏极间的电压变得不均匀。
例12、例13示出了如下情况的结果：布线电阻Ra2～Ra4的值在电流的流动方向轭下游侧大于上游侧，且相对于电流的流动方向布线电阻Rb1～Rb3的值与原来一样。
在该情况下，与例1、2的情况相比可知，能使电压Vds(V)的偏差变小。即、可知，通过将搭载有功率半导体元件(MOSFET701～704)的区域的金属布线的电阻值设定为在电流流动的方向轭下游侧大于上游侧，且将连接有引线的区域的金属布线的电阻值设定为相对于电流流动的方向与原来一样，从而能抑制施加于各功率半导体元件(MOSFET701～704)的源极漏极间的电压变得不均匀。
例14示出了如下情况的结果：布线电阻Ra2～Ra4的值相对于电流的流动方向与原来一样，且布线电阻Rb1～Rb3的值在电流的流动方向的下游侧小于上游侧。
在该情况下，与例1的情况相比可知，能使电压Vds的偏差变小。即、可知，通过将搭载有功率半导体元件(MOSFET701～704)的区域的金属布线的电阻值设定为相对于电流流动的方向与原来一样的为固定，且将连接有引线的区域的金属布线的电阻值设定为在电流流动的方向的下游侧小于上游侧，从而能抑制施加于各功率半导体元件(MOSFET701～704)的源极漏极间的电压变得不均匀。
由以上情况可知，通过使用式(13)～(16)，能容易地进行各金属布线的电阻值的设定，以使施加于各功率半导体元件的源极漏极间的电压更均匀。
此处，假设MOSFET701～704导通、MOSFET801～804断开的状态，使用表1来说明施加于MOSFET701～704的源极漏极间的电压Vds1～Vds4和该电压Vds的偏差，而假设MOSFET701～704断开、MOSFET801～804导通的状态，对于MOSFET801～804也能获得与表1相同的结果。
图3是本发明的功率半导体装置的树脂成型后的外观立体图，是利用模塑树脂对图1所示的内部结构进行密封的图。具有用于电力输入及输出的外部连接端子1、2、3和与进行逆变器动作所需的控制的控制电路相连接的栅极电极端子13及源极电极端子14从模塑树脂15露出的结构。树脂成型后的外观与现有的功率半导体装置即对图7进行树脂成型后的装置没有差异，因此本发明的功率半导体装置能容易地取代现有的功率半导体装置。
(实施方式2)
图4、5、6是表示本发明的其它实施方式所涉及的功率半导体装置的内部结构的简要俯视图。
如图4所示，本实施方式中，金属布线24、25、26的宽度不相对于电流的电流方向变化，金属布线的电阻值通过在金属布线24、25、26的适当部位设置布线电阻调整用的狭缝图案(例如作为贯通金属布线的膜厚方向的孔或者凹陷来实现)16，来实现与图1所示的情况相同的布线电阻的变化。
在图5的实施方式中，在金属布线34、35、36的适当部位设置布线电阻调整用的切口图案(例如通过使金属布线的端部下凹来实现)17来取代上述布线电阻调整用的狭缝图案16(参照图4)。
此外，图6的实施方式中，以如下方式形成布线电阻调整用的凹凸图案18：即、金属布线45、46的引线连接区域中、与外部连接端子2、3相反侧的布线端部201、301的布线宽度比外部连接端子2、3的布线宽度要细，且与布线端部201、301相对的金属布线44、45的元件搭载区域、即金属布线44内的搭载有MOSFET701的区域和金属布线45内的搭载有MOSFET801的区域的布线宽度比金属布线44、45的其它区域的布线宽度要粗。
上述实施方式1及2中，将MOSFET用作功率半导体元件来进行说明，但本发明并不限于此，也可以将IGBT用作功率半导体元件。
在使用IGBT的情况下，与MOSFET不同，无法实现寄生二极管所产生的逆变器动作时的回流动作，因此除了IGBT以外还需搭载其它二极管。
上述实施方式中，对使用由引线框形成的金属布线的结构进行了说明，但本发明并不限于此，例如也可以使用在陶瓷基板、金属基板上形成的金属布线。
并且，功率半导体元件并不限于纵向型器件，可以使用会流条形成与元件表面的电极之间的连接来取代引线。
上述实施方式中，对在功率半导体装置中使用模塑树脂进行树脂成型的情况进行了说明，但本发明并不限于此，也可以采用例如使用硅树脂的罐封结构、或盖上盖进行密封的结构。
上述实施方式中对作为第一功率半导体元件组使用4个MOSFET701～704、作为第二功率半导体元件组使用4个MOSFET801～804的情况进行了说明，但并不限于此，在作为第一功率半导体元件组使用3个MOSFET(功率半导体元件)、作为第二功率半导体元件组使用3个MOSFET(功率半导体元件)的情况下，也能发挥与上述相同的效果。
如以上所说明的那样，根据本实施方式，考虑到流过金属布线的大电流所引起的电压降，通过将金属布线的图案设计成相对于电流的流动方向金属布线的布线电阻变大、或变小，从而能在功率半导体元件的并列化中，不对寄生电感的降低和均等化、以及栅极布线的走线造成影响的情况下，抑制施加于各功率半导体元件的电压的不均匀。
如上所述，本发明用于改善逆变器等功率半导体装置的寿命、可靠性，并且对于今后越来越重要的大功率、大电流应对较为重要，例如能利用于太阳能发电的功率调节器、电动车等各种电动机驱动控制、空气调节器等非常广泛的用途中。
工业上的实用性
本发明所涉及的功率半导体装置具有能抑制施加于功率半导体元件的电压不均匀这一现象的效果，适用于应对大功率、大电流的功率半导体装置等。
标号说明
1、101 外部连接端子(第一外部连接端子)
2、102 外部连接端子(第二外部连接端子)
3、103 外部连接端子(第三外部连接端子)
4、24、34、44、104 金属布线(第一金属布线)
5、25、35、45、105 金属布线(第二金属布线)
6、26、36、46、106 金属布线(第三金属布线)
107、701～704 MOSFET(第一功率半导体元件)
108、801～804 MOSFET(第二功率半导体元件)
9、109 引线(第一导电构件)
10、110 引线(第二导电构件)
11、111 栅极电极
12、112 接合引线
13、113 栅极电极端子
14、114 源极电极端子
15、115 模塑树脂
16 布线电阻调整用的狭缝图案
17 布线电阻调整用的切口图案
18 布线电阻调整用的凹凸图案

Claims (10)

1.一种功率半导体装置，其特征在于，包括：
第一金属布线，该第一金属布线与第一外部连接端子相连接；
第二金属布线，该第二金属布线与第二外部连接端子相连接；
第三金属布线，该第三金属布线与第三外部连接端子相连接；
第一功率半导体元件组，该第一功率半导体元件组包含安装于所述第一金属布线上的三个以上的第一功率半导体元件；以及
第二功率半导体元件组，该第二功率半导体元件组包含与安装于所述第二金属布线上的所述第一功率半导体元件个数相同的第二功率半导体元件，
所述第一功率半导体元件所具有的电极通过第一导电构件与所述第二金属布线相连接，且所述第二功率半导体元件所具有的电极通过第二导电构件与所述第三金属布线相连接，
所述第一金属布线、及所述第二金属布线中安装有所述第一功率半导体元件组或所述第二功率半导体元件组的区域的电阻值在电流的流动方向的下游侧大于上游侧，或者所述第二金属布线及所述第三金属布线中连接有所述第一导电构件或所述第二导电构件的区域的电阻值在所述电流的流动方向的下游侧小于上游侧。
2.如权利要求1所述的功率半导体装置，其特征在于，
所述第一、第二及第三金属布线中，安装有所述第一及第二功率半导体元件组的区域和连接有所述第一及第二导电构件的区域实际上呈直线状的形状，所述第一、第二及第三金属布线的所述直线状的区域被配置为实际上相互平行。
3.如权利要求2所述的功率半导体装置，其特征在于，
安装有所述第一功率半导体元件组或所述第二功率半导体元件组的所述直线状的区域中的宽度相对于所述电流的流动方向逐渐变细，或者
连接有所述第一导电构件或所述第二导电构件的所述直线状的区域的宽度相对于所述电流的流动方向逐渐变粗。
4.如权利要求2所述的功率半导体装置，其特征在于，
在安装有所述第一功率半导体元件组或所述第二功率半导体元件组的所述直线状的区域中设有狭缝或切口，所述区域的电阻值设定为相对于所述电流的流动方向逐渐变大，或者
在连接有所述第一导电构件或所述第二导电构件的所述直线状的区域中设有狭缝或切口，所述区域的电阻值设定为相对于所述电流的流动方向逐渐变小。
5.如权利要求2所述的功率半导体装置，其特征在于，
所述第一、第二及第三金属布线的所述直线状的区域中，(1)连接有所述第一及第二导电构件的区域的电阻值相对于所述电流的流动方向逐渐变小，且(2)安装有所述第一及第二功率半导体元件组的区域的电阻值相对于所述电流的流动方向逐渐变大。
6.如权利要求2至5的任一项所述的功率半导体装置，其特征在于，
所述第一及第三外部连接端子与所述实际上相互平行的所述直线状的所述第一及第三金属布线的一个端部相连接，所述第二外部连接端子在所述一个端部相反侧与所述第二金属布线的另一个端部相连接。
7.如权利要求1至5的任一项所述的功率半导体装置，其特征在于，
所述功率半导体装置是构成将直流电力转换成交流电力的功率转换装置或功率转换电路的一部分。
8.如权利要求7所述的功率半导体装置，其特征在于，
直流电压施加于所述第一及第三外部连接端子，从所述第二外部连接端子输出交流电压。
9.如权利要求1至5的任一项所述的功率半导体装置，其特征在于，
所述第一或第二功率半导体元件是包括源极电极、漏极电极及栅极电极的MOSFET，在所述源极电极和所述漏极电极之间形成寄生二极管。
10.如权利要求1至5的任一项所述的功率半导体装置，其特征在于，
所述第一或第二功率半导体元件组包含三个以上的作为开关元件的所述功率半导体元件和一个以上的整流元件。
CN201380028042.XA 2012-06-01 2013-04-09 功率半导体装置 Expired - Fee Related CN104380462B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2012125833 2012-06-01
JP2012-125833 2012-06-01
PCT/JP2013/002411 WO2013179547A1 (ja) 2012-06-01 2013-04-09 パワー半導体装置

Publications (2)

Publication Number Publication Date
CN104380462A CN104380462A (zh) 2015-02-25
CN104380462B true CN104380462B (zh) 2017-05-24

Family

ID=49672782

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201380028042.XA Expired - Fee Related CN104380462B (zh) 2012-06-01 2013-04-09 功率半导体装置

Country Status (5)

Country Link
US (1) US9325257B2 (zh)
EP (1) EP2858110B1 (zh)
JP (1) JP5914867B2 (zh)
CN (1) CN104380462B (zh)
WO (1) WO2013179547A1 (zh)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5939055B2 (ja) * 2012-06-28 2016-06-22 住友電気工業株式会社 半導体装置及び半導体装置の製造方法
JP2014110555A (ja) * 2012-12-03 2014-06-12 Samsung Electronics Co Ltd アンテナ装置
DE102014219998B4 (de) 2014-10-02 2020-09-24 Vitesco Technologies GmbH Leistungsmodul, Leistungsmodulgruppe, Leistungsendstufe sowie Antriebssystem mit einer Leistungsendstufe
JP6451747B2 (ja) * 2014-11-28 2019-01-16 富士電機株式会社 半導体装置
JP6594000B2 (ja) 2015-02-26 2019-10-23 ローム株式会社 半導体装置
US9673143B2 (en) * 2015-05-29 2017-06-06 Shindengen Electric Manufacturing Co., Ltd. Semiconductor device and manufacturing method of the same
JP6582678B2 (ja) * 2015-07-27 2019-10-02 三菱電機株式会社 半導体装置
US10103096B2 (en) 2016-03-11 2018-10-16 Shindengen Electric Manufacturing Co., Ltd. Semiconductor device
WO2018109069A1 (en) * 2016-12-16 2018-06-21 Abb Schweiz Ag Power semiconductor module with low gate path inductance
US11107761B2 (en) 2018-02-06 2021-08-31 Denso Corporation Semiconductor device
JP2019186403A (ja) 2018-04-11 2019-10-24 トヨタ自動車株式会社 半導体装置
DE112019000178T5 (de) * 2018-06-01 2020-09-03 Fuji Electric Co., Ltd. Halbleitervorrichtung
JP7237475B2 (ja) * 2018-06-19 2023-03-13 新電元工業株式会社 パワーモジュール及びスイッチング電源
JP7077893B2 (ja) 2018-09-21 2022-05-31 株式会社デンソー 半導体装置
EP3654373B1 (en) * 2018-11-19 2021-01-06 Infineon Technologies AG Multi-chip-package
EP3690939A1 (en) * 2019-01-30 2020-08-05 Infineon Technologies AG Semiconductor arrangements
US11069640B2 (en) 2019-06-14 2021-07-20 Cree Fayetteville, Inc. Package for power electronics
JP7198168B2 (ja) * 2019-07-19 2022-12-28 株式会社 日立パワーデバイス パワー半導体モジュール
JP6896831B2 (ja) * 2019-12-05 2021-06-30 三菱電機株式会社 半導体モジュールおよび電力変換装置
CN113054826A (zh) * 2019-12-26 2021-06-29 财团法人工业技术研究院 高功率模块
CN113224025A (zh) * 2020-01-21 2021-08-06 瑞昱半导体股份有限公司 半导体组件
JP6939932B1 (ja) * 2020-03-12 2021-09-22 住友電気工業株式会社 半導体装置
JP7305603B2 (ja) * 2020-09-18 2023-07-10 株式会社東芝 半導体装置
JP2022158037A (ja) 2021-04-01 2022-10-14 三菱電機株式会社 半導体装置
JP2022181821A (ja) * 2021-05-27 2022-12-08 株式会社デンソー 半導体装置
CN116547809A (zh) * 2021-06-04 2023-08-04 富士电机株式会社 半导体装置
EP4141925A1 (en) * 2021-07-26 2023-03-01 Infineon Technologies Austria AG Power module with semiconductor packages mounted on metal frame
WO2023053823A1 (ja) * 2021-09-29 2023-04-06 ローム株式会社 半導体装置
WO2024048077A1 (ja) * 2022-08-29 2024-03-07 富士電機株式会社 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101499443A (zh) * 2007-12-27 2009-08-05 三洋电机株式会社 元件安装用基板、半导体组件及其制造方法及便携式设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002164437A (ja) * 2000-07-27 2002-06-07 Texas Instruments Inc ボンディングおよび電流配分を分散したパワー集積回路および方法
JP4220731B2 (ja) 2002-06-19 2009-02-04 三菱電機株式会社 電力用半導体装置
JP3896940B2 (ja) * 2002-10-08 2007-03-22 三菱電機株式会社 半導体装置
JP2004273749A (ja) 2003-03-07 2004-09-30 Fuji Electric Fa Components & Systems Co Ltd 半導体パワーモジュール
JP2004296998A (ja) * 2003-03-28 2004-10-21 Matsushita Electric Ind Co Ltd 半導体装置
JP5285348B2 (ja) * 2008-07-30 2013-09-11 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置
CN103262238B (zh) * 2010-09-24 2016-06-22 半导体元件工业有限责任公司 电路装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101499443A (zh) * 2007-12-27 2009-08-05 三洋电机株式会社 元件安装用基板、半导体组件及其制造方法及便携式设备

Also Published As

Publication number Publication date
EP2858110A4 (en) 2015-07-29
CN104380462A (zh) 2015-02-25
JP5914867B2 (ja) 2016-05-11
JPWO2013179547A1 (ja) 2016-01-18
US20150155797A1 (en) 2015-06-04
EP2858110B1 (en) 2020-04-08
WO2013179547A1 (ja) 2013-12-05
US9325257B2 (en) 2016-04-26
EP2858110A1 (en) 2015-04-08

Similar Documents

Publication Publication Date Title
CN104380462B (zh) 功率半导体装置
CN103296016B (zh) 半导体模块
TWI656606B (zh) 半導體裝置及電子裝置
CN104838576B (zh) 半导体装置
CN103545305B (zh) 一种功率模块
CN104242605B (zh) 均流母排
CN106067794A (zh) 半导体装置
CN105612690B (zh) 半导体装置
CN106026692A (zh) 半导体模块、电力变换装置以及半导体模块的制造方法
CN103907280B (zh) 电子电路
US20150235923A1 (en) Semiconductor device
JP2010251517A (ja) パワー半導体素子
CN203562425U (zh) 一种功率模块
CN108418458A (zh) 一种基于准y源阻抗网络的半桥逆变器
CN106981479B (zh) 功率模块、3相逆变器系统以及功率模块的检查方法
CN105374808B (zh) 一种功率模块
JP2009148077A (ja) 電圧駆動型半導体モジュール及びこれを用いた電力変換器
JP2014054103A (ja) パワーモジュール構造
CN104380587A (zh) 功率转换装置
CN201011657Y (zh) 三相整流桥式扁平封装功率模块
CN107534391B (zh) 功率转换装置
CN208539800U (zh) 单相十一电平逆变器
CN205723530U (zh) 一种设有电极大臂的功率模块
CN111769723A (zh) 具有附加发射极/源极路径的并联功率模块
JP3277524B2 (ja) 半導体スイッチ回路及びインバータ装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170524