CN103887273A - 半导体模块 - Google Patents
半导体模块 Download PDFInfo
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- CN103887273A CN103887273A CN201310689092.4A CN201310689092A CN103887273A CN 103887273 A CN103887273 A CN 103887273A CN 201310689092 A CN201310689092 A CN 201310689092A CN 103887273 A CN103887273 A CN 103887273A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 94
- 239000004033 plastic Substances 0.000 claims abstract description 96
- 229910052751 metal Inorganic materials 0.000 claims abstract description 26
- 239000002184 metal Substances 0.000 claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 23
- 239000011810 insulating material Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 abstract description 10
- 239000011347 resin Substances 0.000 abstract description 10
- 238000009413 insulation Methods 0.000 abstract description 3
- 239000000853 adhesive Substances 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 238000009795 derivation Methods 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 13
- IZJSTXINDUKPRP-UHFFFAOYSA-N aluminum lead Chemical compound [Al].[Pb] IZJSTXINDUKPRP-UHFFFAOYSA-N 0.000 description 4
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 238000003466 welding Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
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Abstract
本发明的目的在于提供如下半导体模块:能够在组装过程中使塑料外壳容易地与辅助端子嵌合,并且在安装外部端子用的连接器的过程中,防止将辅助端子上的外力传递至辅助端子的底部和绝缘电路板。为了达到上述目的,本发明的半导体模块包括:安装在粘合于金属基底板(20)的绝缘电路板(21)上的半导体元件(22);用于容纳半导体元件(22)的塑料外壳(26);从开口部(28a)引出的金属主端子(24);以及从塑料外壳(26)的平坦表面上的开口部(28b)引出的金属辅助端子(25)。用于引出辅助端子(25)的开口部(28b)形成在塑料外壳(26)的上表面的周边低部(33),用于固定辅助端子(25)的保持件(340)(或341、342、343)设置在中央处的高平坦表面(32)与辅助端子(25)之间。
Description
相关申请的交叉引用
本申请基于2012年12月19日提交的日本专利申请No.2012-277224并要求其优先权,该申请的内容通过引用结合于此。
发明背景
1.技术领域
本发明涉及多个半导体元件容纳在单个封装内的诸如功率半导体模块的半导体模块。
2.背景技术
图12A是包括例如绝缘栅双极型晶体管(IGBT)等多个功率半导体元件的用于电动机驱动控制的现有半导体模块100的立体图。该半导体模块100如图4所示,包括金属基底板20、该基底板20上的绝缘电路板21、以及通过焊接固定在绝缘电路板21的预定位置上的多个功率半导体元件22。该半导体模块100还包括金属主端子102、控制端子103、以及用于保护功率半导体元件22且用于对引出到外壳外部的主端子102和控制端子103进行固定的作为框体的塑料外壳104。塑料外壳104内的空间填充有胶状树脂混合物。功率半导体元件安装在形成于绝缘电路板21的金属电路图案上,且通过铝引线23在金属电路图案与半导体元件22的金属电极之间进行连接。
图8示出分别由以下半导体元件、即IGBTT1和T2以及与IGBT T1和T2反并联连接的续流二极管(FWD)构成的半导体模块的等效电路。胶状树脂混合物填充于塑料外壳104与底板之间的空间内,该底板是用于安装这些功率半导体元件22的金属基底板20。图12A所示的金属主端子102即C1端子、E2端子、和C1E2端子通过螺钉孔105与外部连接,该螺钉孔105形成于在塑料外壳104的中央表面露出的金属主端子102中。辅助端子103即g1端子、e1端子、e2端子和g2端子通过形成于塑料外壳104表面的端部区域中的缝隙106引出。金属基底板20在基底板20的角部具有用于将其自身安装于热沉上的四个孔。塑料外壳104在其底部具有开口部,以用于将塑料外壳104与基底板嵌合。
专利文献1披露了如下半导体器件:电极端子被可靠地保持在热塑性树脂外壳上以提高组装质量的可靠性,且防止电极端子因振动从树脂外壳脱落。
专利文献2披露了如下半导体模块:包括塑料外壳、用于外部主连接和控制连接的连接元件、以及表面被金属化的绝缘基板。安装有半导体元件的绝缘基板被插入塑料外壳的底部开口部中。
专利文献3披露了具有高绝缘强度和高可靠性的半导体模块,其控制端子在贯通塑料外壳的位置具有突起部,在控制端子设置L形部,以用于防止在连接器的安装拆卸过程中应力传递到绝缘电路板上。
[专利文献1]
日本实用新型申请公开No.H05-006852(特别是摘要及图1)
[专利文献2]
美国专利No.6,597,585(特别是权利要求1及图3)
[专利文献3]
WO2012/0066833公报(特别是摘要及图1)
在图12A的立体图所示的半导体模块100中,注入到树脂外壳104中的树脂是呈现柔软性的胶状树脂混合物,无法牢固地固定金属主端子102和控制端子103的引出端子。由此,引出端子需要固定在为了将端子引出而形成的塑料外壳104的开口部上。引出端子中、金属主端子102由树脂外壳104保持,由此在外部连接过程中施加的应力几乎不会传递到主端子的底部。
然而,对于辅助端子103,在将辅助端子103固定在绝缘电路板21上之后,需要使辅助端子103容易地插入到形成于塑料外壳104的辅助端子用开口部107中,并且还需要将其可靠地保持在外壳上。为了满足这些要求,辅助端子用开口部107如图12A所示,分别具有如下结构:其缝隙尺寸稍微比端子的截面尺寸要大。此外,如图12B所示,辅助端子103设置有突起部,且塑料外壳设置有缺口部以将端子保持在外壳上。图12B中,标号104a和104b表示塑料外壳的部分截面。辅助端子103在塑料外壳104的内部分别具有突起部103a,且塑料外壳104具有与突起部103a相对的凹部108。凹部108限制突起部103a的垂直移动。然而,在利用突起部和缺口部保持端子的方法中,由于缝隙形成为具有稍大的尺寸,因此端子容易从缝隙的长边方向上的空间脱离。这是图12B中在辅助端子103的上部位置朝左侧施加外力的情况。若缝隙长度减小以用于防止辅助端子的脱离,则难以进行插入,在插入过程中一些应力可能会施加到辅助端子的底部。由此,缝隙长度的减小被限制。
发明内容
本发明是鉴于上述情况而完成的,本发明的目的在于提供可解决上述问题的半导体模块,能够在组装过程中使辅助端子与塑料外壳之间容易地嵌合,并且在安装外部连接器的过程中,防止向辅助端子的底部或绝缘电路板传递应力。还提供制造这种半导体模块的方法。
根据本发明的第一方面的半导体模块包括:半导体元件,该半导体元件安装在粘合于金属基底板的绝缘电路板上;塑料外壳,该塑料外壳用于容纳所述半导体元件;以及端子,该端子从所述塑料外壳的上表面垂直引出,其特征在于,所述塑料外壳在其上表面设置有用于引出所述端子的开口部,在所述塑料外壳内的位置,所述端子上具有突起部,以限制所述端子的垂直移动,所述塑料外壳设置有与所述突起部嵌合的第一凹部,所述半导体模块包括由绝缘材料构成的保持件,该保持件具有三角形或矩形的截面,其一个表面与所述端子相接触,所述塑料外壳在其上表面上设置有第二凹部,该第二凹部收纳所述保持件,以使得所述保持件将辅助端子上的突起部朝所述第一凹部按压。
根据本发明的第二方面的半导体模块在本发明的第一方面的半导体模块中,所述保持件在与所述端子相接触的表面的相反面上具有倾斜面,该倾斜面使得所述保持件的截面在越低的位置越小,与所述保持件的倾斜面相对的所述塑料外壳的表面具有与所述保持件的倾斜面相配合的倾斜面。
根据本发明的第三方面的半导体模块在本发明的第一或第二方面的半导体模块中,所述保持件在与所述端子相对应的位置具有槽部,所述端子插入所述槽部。
根据本发明的第四方面的半导体模块在本发明的第一至第三方面的任一方面的半导体模块中,所述保持件在其至少两个表面上具有突起部或凹部,所述塑料外壳具有与所述保持件上的突起部或凹部相配合的凹部或突起部。
根据本发明的第五方面的半导体模块在本发明的第一至第四方面的任一方面的半导体模块中,所述保持件与所述塑料外壳上的所述第二凹部粘合。
本发明的第六方面是制造半导体模块的方法,包括如下步骤:将半导体元件和端子固定在粘合于金属基底板的绝缘电路板上;以及将塑料外壳粘合于所述金属基底板上,该塑料外壳容纳所述半导体元件且使所述端子从设置于所述塑料外壳的上表面上的开口部垂直引出,其特征在于,在使用权利要求1至4所记载的所述塑料外壳从所述开口部引出所述端子之后,将权利要求1至4所记载的所述保持件插入权利要求1至4所记载的所述第二凹部,以使得所述保持件将形成于所述端子上的突起部朝所述塑料外壳上的所述第一凹部按压。
本发明提供如下的半导体模块和制造该半导体模块的方法:能够在组装过程中使塑料外壳容易地与辅助端子嵌合,并且在安装外部连接器的过程中,防止向辅助端子的底部或绝缘电路板传递应力。
附图说明
图1是本发明的实施例1所涉及的半导体模块的立体图。
图2A是本发明的实施例1所涉及的半导体模块中的保持件的立体图。
图2B是本发明的实施例1所涉及的半导体模块的重要部分的截面图。
图3是本发明的实施例1所涉及的去除塑料外壳后的半导体模块的俯视图。
图4是本发明的实施例1所涉及的去除塑料外壳后的半导体模块的主视图。
图5是从辅助端子一侧观察时的、本发明的实施例1所涉及的去除塑料外壳后的半导体模块的侧视图。
图6A是本发明的实施例1所涉及的半导体模块的塑料外壳的螺母球的俯视图。
图6B是本发明的实施例1所涉及的半导体模块的去除了螺母球后的塑料外壳的俯视图。
图7是本发明的实施例1所涉及的半导体模块的嵌合有螺母球的塑料外壳的俯视图。
图8示出本发明的实施例1所涉及的半导体模块的等效电路。
图9A是本发明的实施例2所涉及的半导体模块的主要部分的截面图。
图9B是本发明的实施例2所涉及的保持件的立体图。
图10是本发明的实施例3所涉及的保持件的立体图。
图11是本发明的实施例4所涉及的保持件的立体图。
图12A是现有技术所涉及的半导体模块的立体图。
图12B是图12A的半导体模块的主要部分的剖视图。
图13示出本发明的半导体模块中以及现有的半导体模块中辅助端子上的向下负载[N]与辅助端子的下沉行程[mm]之间的关系。
具体实施方式
下文中参考附图具体描述本发明的一些优选实施例所涉及的半导体模块。在下述实施例的说明及附图中,对于相同结构给予相同标号,且省略重复的说明。为了更好地理解,没有以精确的比例来绘制附图。本发明不限于下述的各实施例,且各种修改在不背离本发明的精神和范围的情况下是可行的。
[实施例1]
图1是本发明的实施例1所涉及的半导体模块的立体图。图3是本发明的实施例1所涉及的去除塑料外壳后的半导体模块的俯视图。然而,图3省略了利用铝引线接合的布线、焊料及金属布线图案,以避免附图变得复杂。
图4是去除塑料外壳后的半导体模块的主视图。图5是从辅助端子一侧观察时的去除塑料外壳后的半导体模块的侧视图,其中图中省略了铝引线。图6B是从塑料外壳去除螺母球27后的半导体模块的塑料外壳的俯视图,图6A是螺母球27的俯视图,该螺母球27是在螺母球上的凹部处嵌入有螺母的螺母收纳塑料体。图7是具有从辅助端子的相反侧插入且与塑料外壳26嵌合的螺母球27的半导体模块的俯视图。图8示出本发明的半导体模块的等效电路。由图8的等效电路构成的半导体模块只是本发明实施例的一个示例,不应将其他电路结构排除在外。
该半导体模块具有包括IGBT和续流二极管(FWD)的半导体元件,该半导体元件构成图8的等效电路,且安装焊接在绝缘电路板的布线图案上,并容纳在塑料外壳中。
参照图1至图5对实施例1的半导体模块200进行下述详细说明。
该半导体模块200包括:金属基底板20;固定在金属基底板20上的绝缘电路板21;通过焊接固定在绝缘电路板21的特定位置上的诸如IGBT和FWD的半导体元件22;主电流用的主端子24及包括控制端子的辅助端子25的端子;以及具有尺寸与金属基底板20的底板嵌合的底部开口部的塑料外壳26。
塑料外壳26如图6和图7所示,具有从塑料外壳26的中央左侧的插入孔29插入的螺母球27。插入过程如下。塑料外壳26在组装有半导体元件的金属基底板20上嵌合,且将C1、E2、C1E2的主端子24以及g1、e1、e2、g2的辅助端子25从设置于塑料外壳26的表面上的端子所用的开口部28a和28b引出。然后,螺母球27从塑料外壳26的左侧的插入孔29插入。螺母球27中的螺母座凹部31的位置被调整为正好位于引出主端子24(以下简称为主端子)的顶部24a(图3和图5)中的外部端子用安装孔30的下侧。为了便于从塑料外壳26侧方的插入孔29插入螺母球27,在塑料外壳26的中央表面32(图1)上形成阶梯,该中央表面32用于插入螺母球27且比周边表面33高。螺母球27在与形成于主端子24的顶部24a中的外部端子用安装孔30相对应的位置具有螺母座凹部31,各螺母座凹部31具有嵌入螺母。外部端子的螺钉被螺合于螺母中,从而主端子24通过螺钉和螺母进行固定,并将主端子24与外部端子连接。本发明需要如下结构:在塑料外壳26的中央表面32与周边表面33之间具有阶梯,中央表面32比周边表面33高,且阶梯配置成与辅助端子隔开一定距离。然而,本发明并不一定需要使用螺母球(或螺母收纳用树脂体)的结构。
辅助端子25是四个端子g1、e1、e2、和g2,如图1和图7所示,从塑料外壳的开口部28b引出。辅助端子25具有突起部25a,该突起部25a在将辅助端子25插入到开口部28b中时与辅助端子用开口部28b处的塑料外壳26一侧相接触。突起部25a如图4所示,用于固定辅助端子25。作为第一凹部的凹部40形成在开口部28b一侧的塑料外壳26中,以收纳突起部25a,并与突起部嵌合,从而牢固地固定辅助端子25。
若辅助端子25适当地固定,则即使在将连接器插入辅助端子25以将辅助端子25与外部端子(图中未示出)连接的过程中、向辅助端子25向下施力,该施力也几乎不会传递到塑料外壳26内部的辅助端子的底部或辅助端子下方的绝缘电路板。然而,为了便于插入辅助端子25,将开口部28b形成为比辅助端子的截面稍大的尺寸。其结果是,在将开口部28b的长边方向上的一定的力施加在辅助端子25上时,突起部25a所产生的辅助端子上的固定力变弱,且突起部25a无法适当地起到阻止外力的功能。阻止外力的功能变差会导致辅助端子25的底部弯折,并使辅助端子的顶部位置变低,从而使外部连接变差。绝缘电路板也可能会破损。
因此,本发明的实施例中,利用塑料外壳26的中央表面32与周边表面33之间的阶梯,在阶梯与辅助端子25之间插入保持件340。利用该结构,突起部25a适当地起到阻止外力的功能,防止辅助端子25的外部连接变差、以及绝缘电路板21破损。保持件340由诸如树脂等绝缘材料构成。图2A是保持件340的立体图,图2B是包括半导体模块的保持件340的主要部分的剖视图。如图2A和2B所示,保持件340具有矩形截面。保持件340的一个表面与辅助端子25相接触。从塑料外壳26的部分上表面26a形成第二凹部260。保持件340被插入第二凹部260中,从而保持件340将形成于辅助端子25的突起部25a朝向塑料外壳26中的第一凹部40按压。该结构使得即使在向辅助端子25施加图2B中的朝左侧方向上的外力时,突起部25a也可维持与塑料外壳26的第一凹部40嵌合。由此,在垂直方向上向辅助端子25施加外力时不会在辅助端子25的底部产生较大的应力。
[实施例2]
下面说明本发明的第二实施例即实施例2。如图9B所示,实施例2中的保持件341具有与辅助端子25相接触的表面50以及表面50的相反侧的另一表面51,表面51倾斜使得保持件341的截面朝着下方缩小。塑料外壳26的与倾斜表面51相对的表面52也倾斜以使得与保持件341的表面51相配合。
该结构与实施例1的结构相比,能够随着将保持件341插入第二凹部261中,使突起部25a更加牢固地朝向第一凹部40按压。通过适当地设置保持件341的插入深度,从而在图9A中的水平方向上允许保持件341的宽度和第二凹部261的宽度具有较大的尺寸公差。该结构使得即使在向辅助端子25施加图9A中的朝左侧方向上的外力时,突起部25a也可更加可靠地维持与塑料外壳26的第一凹部40嵌合。由此,在垂直方向上向辅助端子25施加外力时不会在辅助端子25的底部产生较大的应力。因此,实施例2的结构可消除辅助端子25的外部连接变差以及绝缘电路板21的破损。
[实施例3]
下面说明本发明的第三实施例即实施例3。如图10所示,实施例3中的保持件342具有形成在与各个辅助端子25相对应的位置上的槽部55以用于与端子相配合。该结构限制因辅助端子用开口部28b短边方向上的外力而使辅助端子25在该方向上移动。槽部55可形成在实施例2的保持件341中,以获得与实施例2相同的效果。
[实施例4]
下面说明本发明的第四实施例即实施例4。如图11所示,实施例4的保持件343至少在与辅助端子25相接触的表面旁边的两个侧面具有第三凹部60。塑料外壳26具有与该第三凹部60相对应的突起部。该结构可靠地固定保持件343,并且由于该结构在端子的宽度方向即短边方向上牢固地固定辅助端子25,因此是优选的。第三凹部60和与该凹部60相对应的形成于塑料外壳的突起部可彼此交换,即,突起部形成于保持件343而凹部形成于塑料外壳26。此外,突起部可采用具有平坦顶面和向下倾斜表面的结构,凹部具有与该突起部相配合的结构。而且,该结构可应用于实施例2和3。
[实施例5]
下面说明本发明的第五实施例即实施例5。实施例5中,实施例1至4中的保持件340、341、342和343与对应于保持件地形成在塑料外壳26中的凹部粘接。通过粘接保持件,使得即使在向辅助端子25施加例如图2B中的朝左侧方向上的外力时,突起部25a也可可靠地维持与塑料外壳26的第一凹部40嵌合。由此,在垂直方向上向辅助端子25施加外力时不会在辅助端子25的底部产生较大的应力。
本发明的发明人对于具有本发明的保持件和不具有该保持件的情况,研究了辅助端子25上的向下负载[N]与辅助端子25的下沉行程[mm]之间的关系。辅助端子25的下沉行程越大,意味着利用辅助端子25的突起部25a来阻止应力的功能越差。图13示出测量结果。
图13示出本发明所涉及的在辅助端子25与塑料外壳的一部分之间具有保持件(340、341、342、343)的结构中,当辅助端子25上的向下负载大于100[N]时利用突起部25a来阻止应力的功能是有效的,且负载120[N]时的辅助端子25的下沉行程仅为0.4[mm]。另一方面,在不具有保持件的现有结构中,辅助端子25上的负载还没有增加到40[N],下沉行程就达到了1[mm],这表示利用突起部25a来阻止应力的功能变差。
保持件340、341、342和343可由与塑料外壳26相同的材料构成。也可使用与塑料外壳26不同的绝缘树脂材料。该材料可为陶瓷板。保持件的长度只要是足以固定所有辅助端子25的尺寸即可。
下面,对本发明所涉及的制造半导体模块的方法进行说明。将绝缘电路板21固定在金属基底板20上,将诸如IGBT和FWD的半导体元件通过焊接固定在绝缘电路板21的预定位置上,并且将主电流用的主端子24和包括控制端子的辅助端子25固定在预定位置上。然后,将电路元器件组装在金属基底板20上。将具有底部开口部的塑料外壳26(或图9A中的260a和260b)与组装后的金属基底板20的基底板嵌合。使主端子24在设置于塑料外壳26(或260a和260b)的高平坦表面32上的主端子用开口部28a露出,使辅助端子25在设置于塑料外壳26(或260a和260b)的低平坦表面33上的辅助端子用开口部28b露出。然后,将作为螺母收纳树脂体的螺母球27从形成于辅助端子25一侧的相反侧的侧面上的插入孔29插入。之后,将保持件340(或341、342、343)嵌合在高平坦表面32与辅助端子25之间。由此,辅助端子25在辅助端子25用的开口部28b的缝隙的长边方向上可靠地固定。因此,在将外部连接器与辅助端子连接的过程中施加在辅助端子25上的向下外力不会导致外部端子连接变差和绝缘电路板破损。
[标号说明]
20: 金属基底板
21: 绝缘电路板
22: 半导体元件
23: 铝引线
24: 主端子
24a: 主端子的顶部
25: 辅助端子
25a: 突起部
26: 塑料外壳
27: 螺母球
28a: 主端子用开口部
28b: 辅助端子用开口部
29: 插入孔
30: 外部端子用安装孔
31: 螺母座凹部
32: 高平坦表面
33: 低平坦表面
340,341,342,343: 保持件
C1: 集电极端子
E2: 发射极端子
g1,g2: 栅极端子
e1,e2: 发射极辅助端子
100,200: 半导体模块
Claims (6)
1.一种半导体模块,包括:
半导体元件,该半导体元件安装在粘合于金属基底板的绝缘电路板上;
塑料外壳,该塑料外壳用于容纳所述半导体元件;以及
端子,该端子从所述塑料外壳的上表面垂直引出,
其特征在于,
所述塑料外壳在其上表面设置有用于引出所述端子的开口部,
在所述塑料外壳内的位置,所述端子上具有突起部,以限制所述端子的垂直移动,
所述塑料外壳设置有与所述突起部嵌合的第一凹部,
所述半导体模块包括由绝缘材料构成的保持件,该保持件具有三角形或矩形的截面,其一个表面与所述端子相接触,
所述塑料外壳在其上表面上设置有第二凹部,该第二凹部收纳所述保持件,以使得所述保持件将辅助端子上的突起部朝所述第一凹部按压。
2.如权利要求1所述的半导体模块,其特征在于,
所述保持件在与所述端子相接触的表面的相反面上具有倾斜面,该倾斜面使得所述保持件的截面朝着下方缩小,所述塑料外壳的与所述保持件的倾斜面相对的表面具有与所述保持件的倾斜面相配合的倾斜面。
3.如权利要求1或2所述的半导体模块,其特征在于,
所述保持件在与所述端子相对应的位置具有槽部,所述端子插入所述槽部。
4.如权利要求1至3中的任一项所述的半导体模块,其特征在于,
所述保持件在其至少两个表面上具有突起部或凹部,所述塑料外壳具有与所述保持件上的突起部或凹部相配合的凹部或突起部。
5.如权利要求1至4中的任一项所述的半导体模块,其特征在于,所述保持件与所述塑料外壳上的所述第二凹部粘合。
6.一种制造半导体模块的方法,包括如下步骤:
将半导体元件和端子固定在粘合于金属基底板的绝缘电路板上;以及
将塑料外壳粘合于所述金属基底板上,该塑料外壳容纳所述半导体元件且使所述端子从设置于所述塑料外壳的上表面上的开口部垂直引出,
其特征在于,
在使用权利要求1至4所记载的所述塑料外壳从所述开口部引出所述端子之后,
将权利要求1至4所记载的所述保持件插入权利要求1至4所记载的所述第二凹部,以使得所述保持件将形成于所述端子上的突起部朝所述塑料外壳上的所述第一凹部按压。
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