CN103633075B - 叠层封装半导体器件 - Google Patents

叠层封装半导体器件 Download PDF

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Publication number
CN103633075B
CN103633075B CN201310275097.2A CN201310275097A CN103633075B CN 103633075 B CN103633075 B CN 103633075B CN 201310275097 A CN201310275097 A CN 201310275097A CN 103633075 B CN103633075 B CN 103633075B
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tube core
packaging part
thermo
substrate
semiconductor device
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CN103633075A (zh
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余振华
叶德强
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本发明公开了一种叠层封装半导体器件和形成该半导体器件的方法，该半导体器件包括具有至少一个第一管芯和至少一个第二管芯的封装件。该半导体器件还包括将至少一个第一管芯和至少一个第二管芯电连接至衬底的一组导电元件。该半导体器件还包括位于至少一个第一管芯和至少一个第二管芯之间的热接触垫以将至少一个第一管芯热隔离于至少一个第二管芯。

Description

叠层封装半导体器件
相关申请的交叉参考
本申请要求2012年8月24日提交的美国临时专利申请第61/692,893号的优先权，其内容结合于此作为参考。
技术领域
本发明总的来说涉及半导体领域，更具体地，涉及叠层封装半导体器件。
背景技术
叠层封装（PoP）半导体器件用于高密度电子器件中，并且通常包括组合在一起来形成PoP半导体器件的底部封装部件和顶部封装部件。底部封装部件包括附接至底部封装衬底的底部管芯，并且顶部封装部件包括附接至顶部封装衬底的顶部管芯。底部和顶部封装部件通过一组导电元件（例如，焊球）连接在一起。在PoP半导体器件的操作期间，通常底部管芯产生的热量可造成导电元件内的裂缝并损坏顶部管芯，这导致PoP半导体器件发生热应变和翘曲。
发明内容
根据本发明的一个方面，提供了一种半导体器件，包括：封装件，具有至少一个第一管芯和至少一个第二管芯；一组导电元件，用于将至少一个第一管芯和至少一个第二管芯电连接至衬底；以及热接触垫，位于至少一个第一管芯和至少一个第二管芯之间，用于将至少一个第一管芯热隔离于至少一个第二管芯。
优选地，一组导电元件包括导电焊盘、导电柱和导电通孔，并且至少一个第二管芯通过导电焊盘和导电柱与衬底连接，至少一个第一管芯通过导电通孔与衬底电连接。
优选地，该半导体器件还包括位于衬底和至少一个第二管芯之间、位于部分热接触垫和密封环之间以及位于一组导电元件之间的模塑料。
优选地，热接触垫是非连续层。
优选地，热接触垫是夹置在至少一个第一管芯和至少一个第二管芯之间的连续层。
优选地，该半导体器件还包括位于衬底上的模塑料，模塑料包围至少一个第一管芯和至少一个第二管芯并且位于热接触垫的多个部分之间和一组导电元件之间。
根据本发明的另一方面，提供了一种半导体器件，包括：第一封装件，具有位于第一衬底上的至少一个第一管芯；第二封装件，具有位于第二衬底上的至少一个第二管芯；第一组导电元件，用于将第一封装件与第二封装件电连接；热接触垫，位于第一封装件和第二封装件之间，用于将第一封装件热隔离于第二封装件；以及模塑料，包围热接触垫并且夹置在热接触垫的多个部分之间。
优选地，该半导体器件还包括位于第一封装件和第二封装件之间的密封环。
优选地，热接触垫包括氧化物材料、氮化物材料、聚合物材料或粘合材料中的至少一种。
优选地，热接触垫是非连续层。
优选地，热接触垫是覆盖至少一个第二管芯的全部表面且位于第二管芯和衬底之间的连续层。
优选地，模塑料包括位于第一衬底上并包围包括第一组导电元件和至少一个第一管芯的第一封装件的第一模塑料。
优选地，模塑料还包括位于第二衬底上且包围第一模塑料的第二模塑料，第二模塑料位于第一封装件和第二封装件之间的热接触垫的多个部分和密封环之间。
优选地，热接触垫具有大于约10微米的厚度。
优选地，热接触垫具有小于0.5瓦特/摄氏度的导热系数。
优选地，该半导体器件还包括：第二组导电元件，用于将至少一个第一管芯电连接至第一衬底；以及第三组导电元件，用于将至少一个第二管芯电连接至第二衬底。
根据本发明的又一方面，提供了一种形成叠层封装半导体器件的方法，包括：在载体上形成粘合层；在载体上形成第一封装件；在第一封装件上形成第二封装件；在第一封装件和第二封装件之间形成热接触垫，以将第一封装件热隔离于第二封装件；通过第一组导电元件将第一封装件电连接至第二封装件；以及移除载体以形成叠层封装半导体器件。
优选地，形成第一封装件包括：在封装衬底上形成至少一个第一管芯；以及通过第二组导电元件将至少一个第一管芯电连接至封装衬底。
优选地，形成第二封装件包括：在衬底上形成至少一个第二管芯；以及通过第三组导电元件将至少一个第二管芯电连接至衬底。
优选地，在衬底上形成至少一个第二管芯包括：蚀刻衬底的表面以形成至少一个第二管芯；在至少一个第二管芯上沉积热接触材料；将热接触材料蚀刻成预定形状以形成热接触垫；模制包围第一封装件和第二封装件的第二模塑料以包围第一封装件的第一模塑料，第二模塑料位于第一封装件和第二封装件之间的热接触垫的多个部分和密封环之间，并且第二模塑料包围第二组导电元件和第三组导电元件；以及将导电元件安装在衬底的与至少一个第二管芯相对的一侧。
附图说明
结合附图作为参考来进行以下描述，其中：
图1A是根据一个或多个实施例的叠层封装（PoP）半导体器件中的顶部封装件和底部封装件的截面图；
图1B是根据一个或多个实施例的图1A中的PoP半导体器件的热接触垫的俯视图；
图2是根据一个或多个实施例的PoP半导体器件中的顶部封装件和底部封装件的截面图；
图3是根据一个或多个实施例的PoP半导体器件中的顶部封装件和底部封装件的截面图；
图4是根据一个或多个实施例的PoP半导体器件中的顶部封装件和底部封装件的截面图；
图5是根据一个或多个实施例的PoP半导体器件中的顶部封装件和底部封装件的截面图；
图6是根据一个或多个实施例的底部封装件的截面图；
图7是根据一个或多个实施例的底部封装件的截面图；
图8是根据一个或多个实施例的底部封装件的截面图；
图9A至图9I是根据一个或多个实施例的形成图1A中的PoP半导体器件的方法的截面图；
图10A至图10F是根据一个或多个实施例的形成图6和图7中的底部封装件的方法的截面图；以及
图11A至图11H是根据一个或多个实施例的形成图8中的底部封装件的方法的截面图。
具体实施方式
以下详细讨论本发明实施例的制造和使用。然而，应该理解，这些实施例提供了许多可在各种具体环境中实现的可应用发明概念。所讨论的具体实施例是实例，而不用于限制本发明的范围。
在图1A中，叠层封装（PoP）半导体器件100包括第一封装件（例如，顶部封装件110）。顶部封装件110包括封装衬底111和通过引线接合电连接至封装衬底111的多个堆叠管芯112。采用位于堆叠管芯112中每一个管芯顶面上的导电接触件113（例如，金属接触件）和位于封装衬底111上的接触件114以及将接触件113和114连接在一起的接合引线115，将管芯112引线接合至封装衬底111。
根据一个或多个实施例，堆叠管芯112中的每一个管芯都包括存储器芯片、逻辑芯片或处理器芯片。而且，虽然多个堆叠管芯112仅包括两个管芯，但是本发明不局限于具体的管芯数。不限于用引线接合将管芯接合至封装衬底111。以下参考图4和图5讨论用于将堆叠管芯112连接至封装衬底111的其他方法。根据一个或多个实施例，焊料凸块、焊球、铜柱、导电凸块、焊料盖、导电柱、导电球、凸块下金属化层和/或其他连接元件可用于将堆叠管芯112连接至封装衬底111。在一些实施例中，底部填充物位于堆叠管芯112和封装衬底111之间的间隙内从而强化PoP结构100的强度。
封装衬底111是层压电路板，其包括交替的非导电聚合物（诸如双马来酰亚胺三嗪（BT））层和图案化或非图案化的导电层。封装衬底111包括用于电连接至其他部件的顶部接触件114、导电通孔117和底部接触件118。焊球119用于将顶部封装件110电连接或热连接至第二封装件（例如，底部封装件120）。焊球119将信号和电源电输送至堆叠管芯112。在一个或多个实施例中，焊球119被诸如导电凸块和导电球（例如，如图2所示）的其他导电元件所替代。
此外，如图1A所示，第一模塑料121形成在顶部封装件110上并提供机械刚度，因此增强了PoP结构100的机械强度。例如，采用压缩模制或转印模制工艺，在封装衬底111上模制形成模塑料121，并且模塑料121包围堆叠管芯112、导电接触件113、114和接合引线115。在一个或多个实施例中，进行固化操作以使模塑料121凝固。例如，模塑料121包括基于聚合物的材料、底部填充物或环氧树脂。
底部封装件120附接至顶部封装件110并且包括位于下衬底123上的管芯122。管芯122通过导电元件（例如，124和125）与下衬底123电连接。根据一个或多个实施例，下衬底123是具有一个或多个导电层的单晶硅下衬底。在一些实施例中，衬底是陶瓷衬底或聚合物衬底。在一些实施例中，在晶圆级封装（WLP）工艺中使用下衬底123以封装许多管芯122。在一些实施例中，在下衬底123被切割之前，完成包括附接底部封装件120和顶部封装件110的全部封装工艺。根据一个或多个实施例，衬底在各种工艺部分中用作电连接之间的接口。在一些实施例中，在电接触件上方提供或形成下衬底，并且下衬底包括介电材料以及形成在其内部和其上方的导电元件。
根据一个或多个实施例，管芯122是逻辑芯片、处理器芯片、存储器芯片等。在至少一些实施例中，导电元件124是金属接触件，并且导电元件125是由铜（Cu）形成的金属柱。可选地，根据其他实施例，导电元件124和125是焊料凸块、焊球、铜柱、导电凸块、焊料盖、导电球和凸块下金属化层。
通过下衬底123的一侧上的导电元件（例如，焊球119）和下衬底123的相对侧上的导电元件（例如，焊球126）来提供管芯122和其他电路之间的电连接。
在PoP结构100的操作期间，顶部封装件110和底部封装件120发热。在一些实施例中，底部封装件120所产生的热量大于顶部封装件110所产生的热量，并且会潜在地引起对顶部封装件110的损坏。在管芯122的顶面和封装衬底111的底面之间提供密封环130和热接触垫140，以使从底部封装件120至顶部封装件110的热传导最小化并防止PoP结构100中的热应变和翘曲。密封环130提供密封以使顶部封装件110与底部封装件120所生成的热量隔绝。热接触垫140包括氧化物材料、氮化物材料、模塑料或聚合物材料中的至少一种。根据一个或多个实施例，热接触垫140包括诸如环氧树脂或胶带的粘合材料。在其他实施例中，热接触垫140是另一种塑料或硅树脂材料。根据各个实施例，用于热接触垫140的合适材料具有大约0.5瓦特/摄氏度（W/℃）以下的导热系数，并且适合于半导体工艺且在各种工作条件下用于半导体器件。
图1B是沿图1A中的线A-A截取的俯视图。根据一个或多个实施例，热接触垫140是非连续层。也就是说，热接触垫140没有覆盖管芯122的整个顶面。如图1B所示，密封环130和热接触垫140是非连续层（例如，中空的长方形）。在其他实施例中，热接触垫140具有诸如环状的圆形、X形、方格形或针对本发明所提出目的的任意其他适合形状。根据一个或多个实施例，热接触垫140是沿着管芯122顶面的固态连续材料并填充密封环130内的区域。在一个或多个实施例中，热接触垫140的厚度大于约10微米（μm）。
第二模塑料142被模制在下衬底123上并且包围包括管芯122的底部封装件120，并且位于密封环130和热接触垫140之间（例如，如图1A所示，位于热接触垫的外侧并夹置在热接触垫140的多个部分（即，片段）之间）。例如，第二模塑料142还包围导电元件（例如，焊球119）且位于导电元件（例如，金属接触件125）之间。此外，第二模塑料142包围顶部封装件110，包括包围封装衬底111的底面和侧面以及第一模塑料121。在至少一些实施例中，采用压缩模制或转印模制来形成第二模塑料142。在一个或多个实施例中，进行固化操作以使第二模塑料142凝固。在至少一些实施例中，模塑料142包括基于聚合物的材料、底部填充物或环氧树脂。
根据一个或多个实施例，本发明不限于使用焊球119来将顶部封装件110与底部封装件120电连接。图2是根据一个或多个实施例的PoP半导体器件200中的顶部封装件110和底部封装件220的截面图。
除了用导电柱229替代焊球119之外，PoP半导体器件200包括图1A所示的顶部封装件110和具有与底部封装件120相同部件的底部封装件220。
此外，根据一个或多个实施例，本发明不限于使用导电通孔125来将管芯122电连接至下衬底123。图3是根据一个或多个实施例的PoP半导体器件300中的顶部封装件110和底部封装件320的截面图。除了用焊料325替代导电通孔125来将管芯122电连接至下衬底123之外，PoP半导体器件300包括图1A所示的顶部封装件110和具有与底部封装件120相同部件的底部封装件320。
本发明也不限于图1至图3所示的顶部封装件110中的堆叠管芯布置。在其他实施例中，如图4所示，以并排式的平行布置方式来形成管芯。
图4是根据一个或多个实施例的PoP半导体器件中的顶部封装件410和底部封装件420的截面图。顶部封装件410至少包括位于第一上衬底415上彼此相邻的第一管芯412和第二管芯413。第一管芯412和第二管芯413通过导电元件（例如，通孔416和接触件417）与第一上衬底415电连接。在本实施例中，不使用接合引线和接触焊盘来将第一管芯412和第二管芯413电连接至第一上衬底415。
顶部封装件410和底部封装件420通过导电元件（例如，焊球425）电连接在一起。底部封装件420包括通过导电元件（例如，通孔428和接触件429）与第二下衬底427电连接的管芯426。密封环430位于第一上衬底415和底部封装件420的管芯426之间。热接触垫440位于顶部封装件410和底部封装件420之间。如图所示，热接触垫440位于管芯426的顶面和第一上衬底415之间且与密封环430相邻。热接触垫440是非连续层。第一模塑料446位于第一上衬底415上并且包围包括第一管芯412和第二管芯413以及导电元件（例如，金属通孔416和金属接触件417）的顶部封装件410。在第二上衬底427上提供第二模塑料448。第二模塑料448包围第一模塑料446。而且，第二模塑料448位于部分热接触垫440和密封环430之间，并且包围导电元件（例如，焊球425、金属通孔428和金属接触件429）。
尽管在图4中管芯412和413以并排布置的方式示出，但本发明不限于该具体布置。在可选实施例中，如以下参考图5所讨论的，管芯412和413可以以堆叠方式布置。
图5是根据一个或多个实施例的PoP半导体器件500中的顶部封装件510和底部封装件520的截面图。除了第一管芯512和第二管芯513以堆叠方式布置外，PoP半导体器件500中的顶部封装件510和底部封装件520包括与图4所示的PoP半导体器件400相同的部件。如图5所示，根据一个或多个实施例，第二管芯513大于第一管芯512且堆叠在第一管芯512的表面上。第一管芯512位于第二管芯513和第一上衬底515之间。第一上衬底515比图4所示的第一上衬底415小。第一管芯512和第二管芯513通过导电元件（例如，金属接触件517和金属柱518）与第一上衬底515电连接。金属柱518在水平方向上延伸以利于第二管芯513和第一上衬底515之间的连接。第一管芯513通过导电元件（例如，金属通孔519）与第一上衬底515连接。顶部封装件510通过导电元件（例如，焊球525）与底部封装件520电连接。底部封装件520包括通过导电元件（例如，金属通孔528和金属接触件529）与第二下衬底527电连接的管芯526。在第一上衬底515和管芯526之间形成密封环530和热接触垫540以将顶部封装件510热隔离于底部封装件520。第一模塑料546位于第一上衬底515上并且包围包括第一管芯512和第二管芯513以及导电元件（例如，金属通孔517和金属接触件519）的顶部封装件510。在第二下衬底527上提供第二模塑料548。第二模塑料548包围第一模塑料546，并且位于顶部封装件510和底部封装件520之间的部分热接触垫540和密封环530之间以及导电元件（例如，焊球525、金属通孔528和金属接触件529）之间。
本发明不限于只具有单个管芯的PoP半导体器件中的底部封装件。根据一个或多个实施例，在堆叠晶片级封装（WLP）结构中，底部封装件包括多个管芯，其具有夹置在管芯之间以提供管芯之间热隔离的热接触垫。
图6是根据一个或多个实施例的底部封装件620的截面图。底部封装件620至少具有第一管芯621和第二管芯622。第一管芯621位于第二管芯622和下衬底625之间。管芯621和622通过导电元件（例如，金属柱626、金属柱627和金属通孔628）与下衬底625电连接。第二管芯622通过金属柱626和金属柱627与下衬底625连接。第一管芯621通过金属通孔628与下衬底625电连接。根据一个或多个实施例，第二管芯622比第一管芯621大。第二管芯622平行于下衬底625延伸并且具有与下衬底625相同的长度。第一管芯621位于金属柱627之间。密封环630和热接触垫640夹置在第一管芯621和第二管芯622之间并提供热隔离。根据一个或多个实施例，热接触垫640与热接触垫140（图1）具有相同的布置。模塑料650位于下衬底625和第二管芯622之间，位于部分热接触垫640和密封环630之间。在与第一管芯621和第二管芯622所处侧相对的下衬底625的一侧上提供附加导电元件（例如，焊球655）。
图7是根据一个或多个实施例的底部封装件720的截面图。除了热接触垫740是连续层外，底部封装件720包括与底部封装件620（图6）相同的部件。
图8是根据一个或多个实施例的底部封装件820的截面图。底部封装件820包括与底部封装件720相同的部件，但是布置方式不同。底部封装件820包括第一管芯821和第二管芯822。第二管芯822通过导电元件（例如，金属接触件826和金属柱827）与下衬底825电连接。金属柱827在水平方向上延伸以利于第二管芯822和下衬底825之间的连接。第一管芯821通过导电元件（例如，金属通孔828）与下衬底825电连接。具有连续层的热接触垫840夹置在第一管芯821和第二管芯822之间。模塑料850位于下衬底825上，包围第一管芯821和第二管芯822，并且位于部分热接触垫840和密封环之间以及位于导电元件（例如，金属柱827和金属通孔828）之间。
图9A至图9I是根据一个或多个实施例的用于形成诸如图1A中的半导体器件的PoP半导体器件的方法的截面图。在图9A中，通过沉积工艺，在载体920上沉积薄粘合层922从而为加工载体920做准备。在图9B中，在载体920上沉积顶部封装件（例如，如图1A所示的顶部封装件110）。接下来，在图9C至图9D中，形成底部封装件（例如，图1A所示的底部封装件120）。在图9C中，对衬底930的背面进行研磨工艺以形成管芯层931（例如，管芯122），并且在管芯层931上沉积金属焊盘（例如，铝焊盘932）。在铝焊盘932上沉积钝化层933（薄氧化物层）。蚀刻钝化层933以形成沟槽或通孔，并且在沟槽或通孔内沉积金属层934以形成金属通孔（例如，金属通孔125）。然后，由聚酰亚胺（Pi）材料形成的底部填充层935沉积在钝化层933的表面上和金属层934的上方。
在图9D中，在管芯层931的研磨表面上形成热接触材料940；并且在图9E中，通过蚀刻或锯切、激光开槽或机械锯切工艺形成热接触垫（例如，图1A所示的热接触垫140）。然后，进行分离工艺以形成单独的底部封装件（例如，底部封装件120）。
在图9F中，在顶部封装件110上沉积底部封装件120。热接触垫140与顶部封装件110中的封装衬底（例如，封装衬底111）对准。在下衬底123上模制模塑料142且该模塑料包围包括管芯122和热接触垫140的底部封装件120。模塑料142还包围导电元件（例如，图1A所示的焊球119）和顶部封装件110，包括包围封装衬底111的底面和侧面以及顶部封装件110的模塑料（例如，第一模塑料121）。在至少一些实施例中，采用压缩模制或转印模制来形成模塑料142。
在图9G中，形成包括导电元件的多层再分布层923。然后，顶部封装件110通过导电元件117、118和119与底部封装件120电连接。在图9H中，根据一个或多个实施例，通过球安装形成附加导电元件以电连接至其他电路。
在图9I中，完成形成PoP半导体器件的工艺并且通过脱粘工艺移除载体920。
图10A至图10F是根据一个或多个实施例的用于形成图6和图7中的底部封装件的方法的截面图。
在图10A中，形成第一管芯621和第二管芯622。第二管芯622比第一管芯621大。热接触垫640、740位于第一管芯621和第二管芯622之间。而且，形成导电元件（例如，金属柱627和金属通孔628）。在图10B中，沉积模塑料650并且对其进行模制以包围第一管芯621、第二管芯622的顶面以及导电元件627和628。
在图10C中，对模塑料的表面进行蚀刻或研磨操作。蚀刻模塑料直至到达导电元件628的顶面。在图10D中，在模塑料的表面上形成或提供下衬底（例如，625）且在下衬底625中和其相对面上形成导电元件（例如，金属接触件626），然后第一和第二管芯通过导电元件626、627和628与下衬底625电连接。在图10E中，形成导电元件（例如，焊球655）以将底部封装件连接至其他电路（例如，顶部封装件）。然后，在图10F中，进行分离工艺（见虚线）以将底部封装件分开。
图11A至图11H是根据一个或多个实施例的用于形成诸如图8中的底部封装件的底部封装件的方法的截面图。
在图11A中，准备载体（例如，图9A所示载体920）以用于加工。通过沉积工艺，在载体920上沉积薄粘合层922。然后，在图11B中，在载体920上沉积第一管芯821和第二管芯822。热接触垫840位于第一管芯821和第二管芯822之间。而且，形成导电元件（例如，金属柱817和金属通孔828）。
在图11C中，通过模制操作来模制模塑料，从而包围第一管芯821、第二管芯822以及导电元件817和828。在图11D中，进行蚀刻或研磨操作，蚀刻模塑料直至到达导电元件817和828的表面。
在图11E中，在模塑料850的表面上形成下衬底825。此外，在下衬底825的相对面上形成导电元件（例如，金属接触件826），并且第一管芯821和第二管芯822通过金属接触件826与PoP衬底825连接。然后，在金属接触件826的表面上形成导电元件（例如，焊球855）。
然后，在图11G中，通过脱胶工艺移除载体920，并且在图11H中，进行分离工艺（见虚线）。
本发明的一个或多个实施例包括一种半导体器件，包括：第一封装件，具有位于封装衬底上的至少一个第一管芯；第二封装件，具有位于衬底上的至少一个第二管芯；第一组导电元件，用于将第一封装件与第二封装件电连接；热接触垫，位于第一封装件和第二封装件之间以将第一封装件热隔离于第二封装件；以及模塑料，包围热接触垫并且夹置在热接触垫的多个部分之间。
本发明的一个或多个实施例包括一种半导体器件，包括：第一封装件，具有位于第一衬底上彼此相邻的至少一个第一管芯和至少一个第二管芯；第二封装件，具有位于第二衬底上的至少一个第三管芯；第一组导电元件，用于将第一封装件与第二封装件电连接；以及热接触垫，位于第一封装件和第二封装件之间以将第一封装件热隔离于第二封装件。
本发明的一个或多个实施例包括一种半导体器件，其包括：封装件，具有至少一个第一管芯和至少一个第二管芯；一组导电元件，用于将至少一个第一管芯和至少一个第二管芯电连接至衬底；以及热接触垫，位于至少一个第一管芯和至少一个第二管芯之间以将至少一个第一管芯热隔离于至少一个第二管芯。
本发明的一个或多个实施例包括一种形成叠层封装半导体器件的方法，包括：在载体上形成粘合层；在载体上形成第一封装件；在第一封装件上形成第二封装件；在第一封装件和第二封装件之间形成热接触垫以将第一封装件热隔离于第二封装件；通过第一组导电元件将第一封装件电连接至第二封装件；以及移除载体以形成叠层封装半导体器件。
本发明的一个或多个实施例包括一种形成半导体器件的方法，包括：形成至少一个第一管芯；形成与至少一个第一管芯相邻的至少一个第二管芯；在至少一个第一管芯和至少一个第二管芯之间形成热接触垫；在至少一个第一管芯和至少一个第二管芯的表面上形成第一组导电元件；模制模塑料以包围至少一个第一管芯、至少一个第二管芯和第一组导电元件；研磨模塑料的表面；在模塑料的表面上形成衬底；在衬底的相对面上形成第二组导电元件，然后将至少一个第一管芯和至少一个第二管芯与第一组导电元件连接；在第二组导电元件的表面上形成导电元件；以及进行分离工艺。
本发明的一个或多个实施例包括一种形成半导体器件的方法，包括：在载体上形成粘合层；在载体上形成至少一个第一管芯和至少一个第二管芯；在至少一个第一管芯和至少一个第二管芯之间形成热接触垫；在至少一个第一管芯和至少一个第二管芯的表面上形成第一组导电元件；模制模塑料以包围至少一个第一管芯、至少一个第二管芯和第一组导电元件；研磨模塑料的表面；在模塑料的表面上形成衬底；在衬底的相对面上形成第二组导电元件，然后将至少一个第一管芯和至少一个第二管芯与第一组导电元件连接；在第二组导电元件的表面上形成导电元件；移除载体；以及进行分离工艺。
尽管已经详细描述了本发明的实施例及优点，但是应该理解，在不背离所附权利要求限定的实施例的精神和范围的情况下，可以进行各种改变、替换和变更。而且，本申请的范围不旨在限于本说明书所述的工艺、机器装置、制造、物质组成、工具、方法和步骤的具体实施例。本领域的技术人员很容易理解，根据本发明可以利用与本文描述的对应实施例执行基本相同功能或实现基本相同结果的目前现有的或即将开发的工艺、机器装置、制造、物质组成、工具、方法或步骤。因此，所附权利要求旨在将这些工艺、机器装置、制造、物质组成、工具、方法或步骤包括在它们的保护范围内。而且，每一个权利要求都构成一个独立的实施例且各个权利要求和实施例的组合都在本发明的范围内。

Claims (19)

1.一种半导体器件，包括：
封装件，具有至少一个第一管芯和至少一个第二管芯；
一组导电元件，用于将所述至少一个第一管芯和所述至少一个第二管芯电连接至衬底，其中，所述至少一个第一管芯位于所述至少一个第二管芯与所述衬底之间；以及
热接触垫，位于所述至少一个第一管芯和所述至少一个第二管芯之间，其中，所述热接触垫的下表面与所述至少一个第一管芯的顶表面直接接触，并在所述衬底到所述至少一个第二管芯的延伸方向上连续，用于将所述至少一个第一管芯热隔离于所述至少一个第二管芯；
密封环，包围所述热接触垫，位于所述至少一个第一管芯和所述至少一个第二管芯之间，以提供热隔离。
2.根据权利要求1所述的半导体器件，其中，所述一组导电元件包括导电焊盘、导电柱和导电通孔，并且所述至少一个第二管芯通过所述导电焊盘和所述导电柱与所述衬底连接，所述至少一个第一管芯通过所述导电通孔与所述衬底电连接。
3.根据权利要求2所述的半导体器件，还包括位于所述衬底和所述至少一个第二管芯之间、位于部分所述热接触垫和所述密封环之间以及位于所述一组导电元件之间的模塑料。
4.根据权利要求1所述的半导体器件，其中，所述热接触垫是非连续层。
5.根据权利要求1所述的半导体器件，其中，所述热接触垫是夹置在所述至少一个第一管芯和所述至少一个第二管芯之间的连续层。
6.根据权利要求1所述的半导体器件，还包括位于所述衬底上的模塑料，所述模塑料包围所述至少一个第一管芯和所述至少一个第二管芯并且位于所述热接触垫的多个部分之间和所述一组导电元件之间。
7.一种半导体器件，包括：
第一封装件，具有位于第一衬底上的至少一个第一管芯；
第二封装件，具有位于第二衬底上的至少一个第二管芯；
第一组导电元件，用于将所述第一封装件与所述第二封装件电连接；
热接触垫，位于所述第一封装件和所述第二封装件之间，用于将所述第一封装件热隔离于所述第二封装件，其中，所述热接触垫的上表面与所述第一衬底直接接触，所述热接触垫的下表面与所述至少一个第二管芯的顶表面直接接触；以及
密封环，包围所述热接触垫，位于所述第一封装件和所述第二封装件之间，以提供热隔离；
模塑料，包围所述热接触垫并且夹置在所述热接触垫的多个部分之间。
8.根据权利要求7所述的半导体器件，其中，所述热接触垫包括氧化物材料、氮化物材料、聚合物材料或粘合材料中的至少一种。
9.根据权利要求7所述的半导体器件，其中，所述热接触垫是非连续层。
10.根据权利要求7所述的半导体器件，其中，所述热接触垫是覆盖所述至少一个第二管芯的全部表面且位于所述第二管芯和所述第一衬底之间的连续层。
11.根据权利要求7所述的半导体器件，其中，所述模塑料包括位于所述第一衬底上并包围包括所述第一组导电元件和所述至少一个第一管芯的第一封装件的第一模塑料。
12.根据权利要求11所述的半导体器件，其中，所述模塑料还包括位于所述第二衬底上且包围所述第一模塑料的第二模塑料，所述第二模塑料位于所述第一封装件和所述第二封装件之间的所述热接触垫的多个部分和所述密封环之间。
13.根据权利要求7所述的半导体器件，其中，所述热接触垫具有大于10微米的厚度。
14.根据权利要求7所述的半导体器件，其中，所述热接触垫具有小于0.5瓦特/摄氏度的导热系数。
15.根据权利要求7所述的半导体器件，还包括：
第二组导电元件，用于将所述至少一个第一管芯电连接至所述第一衬底；以及
第三组导电元件，用于将所述至少一个第二管芯电连接至所述第二衬底。
16.一种形成叠层封装半导体器件的方法，所述方法包括：
在载体上形成粘合层；
在所述载体上形成第一封装件；
在所述第一封装件上形成第二封装件；
在所述第一封装件和所述第二封装件之间形成热接触垫，以将所述第一封装件热隔离于所述第二封装件，其中，所述热接触垫的上表面与所述第一封装件的下表面直接接触，所述热接触垫的下表面与所述第二封装件的顶表面直接接触；
在所述第一封装件和所述第二封装件之间形成密封环，所述密封环包围所述热接触垫，以提供热隔离；
通过第一组导电元件将所述第一封装件电连接至所述第二封装件；以及
移除所述载体以形成所述叠层封装半导体器件。
17.根据权利要求16所述的形成叠层封装半导体器件的方法，其中，形成所述第一封装件包括：
在封装衬底上形成至少一个第一管芯；以及
通过第二组导电元件将所述至少一个第一管芯电连接至所述封装衬底。
18.根据权利要求17所述的形成叠层封装半导体器件的方法，其中，形成所述第二封装件包括：
在衬底上形成至少一个第二管芯；以及
通过第三组导电元件将所述至少一个第二管芯电连接至所述衬底。
19.根据权利要求18所述的形成叠层封装半导体器件的方法，其中，在所述衬底上形成所述至少一个第二管芯包括：
蚀刻所述衬底的表面以形成所述至少一个第二管芯；
在所述至少一个第二管芯上沉积热接触材料；
将所述热接触材料蚀刻成预定形状以形成所述热接触垫；
模制包围所述第一封装件和所述第二封装件的第二模塑料以包围所述第一封装件的第一模塑料，所述第二模塑料位于所述第一封装件和所述第二封装件之间的所述热接触垫的多个部分和所述密封环之间，并且所述第二模塑料包围所述第二组导电元件和所述第三组导电元件；以及
将导电元件安装在所述衬底的与所述至少一个第二管芯相对的一侧。
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