CN103026476B - 在衬底上形成焊料合金沉积的方法 - Google Patents

在衬底上形成焊料合金沉积的方法 Download PDF

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CN103026476B
CN103026476B CN201180033313.1A CN201180033313A CN103026476B CN 103026476 B CN103026476 B CN 103026476B CN 201180033313 A CN201180033313 A CN 201180033313A CN 103026476 B CN103026476 B CN 103026476B
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solder
alloy
substrate
layer
copper
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CN103026476A (zh
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K-J.马特雅特
S.兰普雷希特
I.埃沃特
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Atotech Deutschland GmbH and Co KG
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Atotech Deutschland GmbH and Co KG
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    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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Abstract

描述了一种在衬底上形成焊料合金沉积的方法，其包括下述步骤：i) 提供包括表面承载电路的衬底，所述表面承载电路包括至少一个内层接触焊盘，ii) 形成焊料掩模层，所述焊料掩模层被置于所述衬底表面上并且被图案化以暴露所述至少一个接触区域，iii) 使包括所述焊料掩模层和所述至少一个接触区域的整个衬底区域与适于在所述衬底表面上提供金属种层的溶液相接触，iv) 在所述金属种层上形成结构化的抗蚀剂层，v) 将含有锡的第一焊料材料层电镀到所述导电层上，vi)将第二焊料材料层电镀到所述第一焊料材料层上，vii) 去除所述结构化的抗蚀剂层，并且蚀刻掉一定量的金属种层，其足以将所述金属种层从所述焊料掩模层区域去除，以及对所述衬底进行回流，并且在这样做时根据所述金属种层、第一焊料材料层和第二焊料材料层形成焊料合金沉积。

Description

在衬底上形成焊料合金沉积的方法
技术领域
本发明涉及通过电镀形成焊料合金沉积，并且涉及例如IC衬底和有效组分之间的焊点。
背景技术
自从20世纪60年代早期由IBM引入了倒装芯片技术起，就已经将倒装芯片器件安装在昂贵的陶瓷衬底上，在这种情况下，硅芯片和陶瓷衬底之间的热膨胀失配不是很关键。与丝焊技术相比，倒装芯片技术更好在于能够提供更高的封装密度（更小的器件外形轮廓）和更高的电性能（尽可能更短的引线和更低的电感）。在此基础上，在过去的40年里已经通过在陶瓷衬底上使用高温焊料（受控塌陷芯片连接，C4）对倒装芯片技术在工业上进行实践。然而，近年来，针对现代电子产品的微型化的趋势，由高密度、高速和低成本的半导体器件的需求所驱使，安装在具有环氧树脂底层填料（epoxy underfill）的低成本有机电路板（例如，印刷电路板或衬底）上的倒装芯片器件已经经历了明显爆炸性增长，该底层填料缓解了由硅芯片和有机板结构之间的热膨胀失配所诱发的热应力。低温倒装芯片接点和基于有机物的电路板的引人注意的事件已经使得当前的行业能够获得用于倒装芯片器件的制作的廉价解决方案。
在当前的低成本倒装芯片技术当中，半导体集成电路（IC）芯片的顶表面具有电接触焊盘阵列。有机电路板还具有对应的接触网格。将低温焊料凸点或者其他导电粘合材料在芯片和电路板之间被放置并使其准确地对准。芯片被颠倒翻转并安装在电路板上，其中，焊料凸点或导电粘合材料在所述芯片和电路板之间提供电输入/输出（I/O）和机械互连。对于焊料凸点接点而言，可以将有机底层填料密封剂进一步分配到芯片和电路板之间的缝隙中，从而约束热失配，以及降低焊点上的应力。
一般而言，为了通过焊点实现倒装芯片组装，通常在芯片的焊盘电极表面上预先形成金属凸点，诸如，焊料凸点、金凸点或铜凸点，其中，所述凸点可以是任何形状，诸如，纽扣形凸点、球形凸点、圆柱形凸点或其他凸点。通常还使用低温焊料在电路板的接触区域上形成对应的焊料凸点（或者说预焊凸点）。在回流温度下，借助于焊点来将芯片接合到电路板。在分配了底层填料密封剂之后，倒装芯片器件因此被构造。这样的方法是本领域所熟知的，并且例如，在美国专利No.7098126（H.-K. Hsieh等）中描述了使用焊点的倒装芯片器件的典型例子。
当前，用于在电路板上形成预焊凸点的最常见的方法是模版印刷法。与模版印刷法相关的一些先前提议可以参考美国专利No. 5203075（C. G. Angulas等）、美国专利No.5492266（K. G. Hoebener等）和美国专利No. 5828128（Y. Higashiguchi等）。用于倒装芯片组装的焊料隆凸（bumping）技术需要关于凸点间距和尺寸微型化这两方面的设计考虑。根据实际经验，一旦凸点间距降到了0.15毫米以下，模版印刷就将变得不可行。相比之下，通过电镀所沉积的焊料凸点则提供了使凸点间距进一步降至0.15毫米以下的能力。可以在美国专利No. 5391514（T. P. Gall等）和美国专利No. 5480835（K. G. Hoebener等）中找到与用于倒装芯片接合的电路板上的电镀凸点有关的先前提议。尽管电路板上的电镀焊料隆凸相比模版印刷提供了更为精细的凸点间距，但是其对于初始实现存在一些挑战。
在美国专利No. 7098126（H.-K. Hsieh等）中描述了一种在有机衬底上形成焊料的多步骤过程。在所述方法中，最初提供包括表面承载电路的有机电路板，所述表面承载电路包括至少一个接触区域。焊料掩模层被置于板表面上，并被图案化，从而使焊盘暴露。随后，通过物理气相沉积、化学气相沉积、利用催化铜的无电镀、或者利用催化铜的电镀来在板表面上沉积金属种层。在金属种层上形成具有位于所述焊盘处的至少一个开口的抗蚀剂层。然后，通过电镀在所述开口中形成焊料材料。最后，去除所述抗蚀剂和处于所述抗蚀剂之下的金属种层。要应用这种方法，需要各种图案化步骤，这从过程效率的总体观点来看是不期望的。此外，如果作为电子器件的微型化的结果而使得相邻接触区域之间的距离（间距）非常小，那么所述方法具有其局限性。
在US 2006/0219567 A1中公开了一种电路板的导电凸点结构的制作方法。将焊料材料电镀到受到焊料掩模局部保护但是不具有附加抗蚀剂的衬底上。接下来，将粘合层沉积到焊料材料层上。然后以一种方式使所述粘合层图案化，该方式在随后的蚀刻步骤期间使焊料材料涂覆的连接焊盘受到保护。然后将对于焊料储存（solder depot）不需要的焊料材料蚀刻掉，只留下连接焊盘之上的受到蚀刻抗蚀剂保护的焊料储存。所述粘合层既起着用于焊料材料回蚀的金属抗蚀剂的作用，又在以后起到对焊料材料的腐蚀保护的作用。
专利文件US 7174630 B2公开了一种用于制造焊料沉积的方法。第一抗蚀剂层被沉积到衬底表面上，并被图案化，随后是电镀第一金属层。接下来，第二抗蚀剂层被沉积到衬底表面上，并被图案化，随后是电镀第二金属层。所述过程需要两次不同的抗蚀剂施加、结构化和去除过程，这导致了附加的不期望的过程步骤。
因此，需要提供一种涉及降低数量的过程步骤的用于在如电路板之类的衬底上形成焊料沉积的方法。此外，还需要提供一种镀敷方法，其按照适合于在非常精细的结构上形成焊料沉积的焊料合金成分产生高度均匀性的焊料材料。
发明内容
因此，本发明的目的在于提供一种焊料材料层的电镀方法，其用于在衬底上产生焊料合金沉积的均匀的层和体积。这样的方法应当适于在不留下空洞或微坑的情况下填充具有高纵横比的凹陷结构。此外，在回流操作之后，所述焊料合金沉积应当具有期望的合金成分，所述合金成分具有期望的熔点。优选的焊料合金沉积为三元合金Sn-Ag-Cu和四元合金Sn-Ag-Cu-Ni，并且被称为缩写词SAC合金（Sn-Ag-Cu(-Ni)合金），通过之前沉积的金属种层、第一电镀焊料材料层和第二电镀焊料材料层的体积和成分来控制回流操作之后的焊料合金沉积成分。
本发明的另一目的在于提供一种用于焊料合金沉积的方法，其具有降低数量的镀敷步骤，并且即使当焊料抗蚀剂开口具有不同尺寸时，是普遍可适用的。
本发明的另一目的在于提供一种在例如印刷电路的非导电衬底上形成金属种层的方法，所述金属种层被用于产生用于形成倒装芯片焊点和板到板焊点的电镀焊料。此外，所述金属种层在回流操作期间起着用于合金形成的源的作用，例如，由所述金属种层提供了以后形成SAC合金的Cu组分。
总之，公开了一种在衬底上制作电镀焊料合金沉积以便形成倒装芯片焊点和板到板焊点的方法。根据本发明，提供了一种如电路板之类的非导电衬底，其包括具有至少一个接触区域的表面承载电路。这样的接触区域可以是任何导电表面区域，例如，接触焊盘或者电路朝向衬底之外的最顶端的区域。
在将焊料掩模施加在衬底表面的一部分上并且形成了使所述至少一个接触区域暴露的至少一个焊料掩模开口之后，在整个表面区域上形成导电种层。
接下来，抗蚀剂层被沉积到所述金属种层上，并被结构化，从而使所述至少一个焊料掩模开口和所述至少一个接触区域暴露。
然后，优选将含有锡的第一焊料材料层电镀在衬底的导电区域上，从而形成焊料沉积。
此后，将优选由锡合金构成的第二焊料材料层电镀到第一焊料材料层上。去除所述金属种层上的抗蚀剂层。而且，从所述焊料掩模层区域去除所述金属种层。
然后，使如是处理的衬底受到回流操作，其中，所述第一焊料材料层熔化，并且所述金属种层和所述第二焊料材料层被溶解到熔化的第一焊料材料层中，形成了具有期望成分的合金焊料沉积。
附图说明
图1示出了一种获得具有微盲孔（blind micro via，BMV）的焊料掩模限定的焊盘的方法，所述微盲孔具有含有期望成分的电镀合金焊料沉积。
图2示出了一种获得具有微盲孔（BMV）的非焊料掩模限定的焊盘的方法，所述微盲孔具有含有期望成分的电镀合金焊料沉积。
101 非导电衬底
102 接触焊盘
103 焊料掩模层
104 金属种层
105 抗蚀剂层
106 第一焊料材料层
107 第二焊料材料层
108 均匀焊料合金沉积
109 焊料掩模开口
110 抗蚀剂开口。
具体实施方式
本发明提供了一种通过沉积优选由铜或铜合金构成的金属种层，电镀优选由锡构成的第一焊料材料层，并且此后电镀优选由锡合金构成的第二焊料材料层，来在衬底上形成具有均一的且作为目标的成分的焊料合金沉积的方法。所述过程尤其适于在电路板、IC衬底或插入机构上制作焊料凸点。本发明的方法导致了具有良好的镀覆均匀性和均一的元素成分的焊料凸点。
术语“均一成分”指的是在回流之后焊料沉积中的化学元素的均一分布。
术语“均匀性”和“均匀”指的是均匀镀敷的体积和层厚度，其在回流之后，导致了相似或相等高度的焊料合金沉积。
术语“元素成分”指的是诸如第二焊料材料层107的材料的体积中的化学元素的浓度。
在下文中将更详细地描述所述方法。本文中所示出的附图只是对所述过程的说明。附图不是按比例绘制的，即，它们不反映芯片封装结构中的各层的实际尺寸或特征。遍及说明书，相同的数字指代相同的元件。
现在参考图1，根据本发明的优选实施例，提供了一种非导电衬底101，其具有作为接触区域实施例（图1a）的接触内层焊盘102。所述内层接触焊盘102通常由诸如铜的金属形成。非导电衬底101可以是电路板或IC衬底，其可以由有机材料或者纤维强化有机材料或颗粒强化有机材料等制成，例如，环氧树脂、聚酰亚胺、双马来酰亚胺三嗪、氰酸盐酯、聚苯并环丁烯或者其玻璃纤维合成物等。
在所述非导电衬底101的表面上沉积焊料掩模层103。
所述焊料掩模层103是永久性焊料掩模，并且在制造印刷电路板之后保持附着到所述非导电衬底101的表面。
通过已知技术将焊料掩模层103沉积到所述非导电衬底101的表面上。可适用于本发明的例子为丝网印刷和/或光刻工艺。根据本发明可以使用各种类型的焊料掩模：UV-硬化焊料掩模、可热固二组分焊料掩模和光可成像焊料掩模。
任选地，在接触焊盘102上形成阻挡层（图1中未示出）。所述阻挡层可以是镍的粘合层、镍合金或者金的保护层。所述阻挡层还可以由镍、镍磷光体、钯、钯磷光体、银、锡、镍/钯、铬/钛、钯/金或者镍/钯/金等制成，其可以通过电镀、无电镀、浸渍或者物理气相沉积等来制成。
为了通过非导电表面上的电镀和回流来制作优选含有锡的均匀焊料合金沉积，需要在所述非导电表面上形成金属种层104以开始电镀。在图1b中描绘了这样的金属种层104。一般而言，所述金属种层104例如通过非导电表面的常规制造业中的并且本领域中熟知的无电沉积所形成。
根据本发明，在包括接触焊盘区域102和焊料掩模层103的非导电衬底101的整个表面上沉积金属种层104。最优选的金属种层104材料为铜和铜合金，诸如，铜镍合金、铜钌合金以及铜铑合金。
所述金属种层104是导电的，其提供粘附力，允许对其上表面的暴露部分进行电镀，并且可以防止随后的焊料沉积金属向接触区域的底层金属的迁移。替代地，所述金属种层可以由两个金属层构成。
例如，可以通过Printed Circuits Handbook, C. F. Coombs Jr. (Ed.), 6thEdition, McGraw Hill, 28.5至28.9以及30.1至30.11页中描述的各种方法来使所述非导电衬底活化。这些过程涉及形成包括碳颗粒、Pd离子、Pd胶体或导电聚合物的导电层。
专利文献中描述了这些过程中的一些，并且下面给出了例子：
欧洲专利EP 0616053描述了用于对（不具有无电涂层的）非导电衬底施加金属涂层的过程，其包括：
a.利用包括贵金属/IVA族金属溶胶的活化剂来接触所述衬底，以获得处理的衬底；
b.利用具有pH 11以上到pH 13的自加速和补充浸渍金属成分来接触所述处理的衬底，所述金属成分包括下述的溶液：
(i)Cu(II)、Ag、Au或Ni的可溶金属盐或其混合物，
(ii)IA族金属氢氧化物，
(iii)包括有机材料的络合剂，对于所述金属盐的金属的离子而言，其具有从0.73到21.95的累计形成常数log K。
该过程导致了可被用于随后的电涂覆的薄导电层。在本领域中将该过程称为“连接（Connect）”过程。
美国专利5503877描述了非导电衬底的金属化，其涉及使用络合物以便在非金属衬底上生成金属种子。这些金属种子为随后的电镀提供了充分的导电性。在本领域中将该过程称为所谓的“Neoganth”过程。
美国专利5693209涉及一种用于非导电衬底的金属化的过程，其涉及使用导电吡咯聚合物。本领域中将所述过程称为“Compact CP”过程。
欧洲专利1390568B1还涉及非导电衬底的直接电解金属化。其涉及使用导电聚合物来获得用于后续的电涂覆的导电层。所述导电聚合物具有噻吩单元。本领域将所述过程称为“Seleo CP”过程。
最后，还可以用胶质的或者含有离子化钯离子的溶液来使所述非导电衬底活化，例如，在Printed Circuits Handbook, C. F. Coombs Jr. (Ed.), 6th Edition, McGrawHill, 28.9和30.2至30.3页中描述了用于此的方法。
可以任选执行薄中间金属涂层的随后的无电镀，以便提高金属种层104的厚度。然后，可利用所述种层的辅助来执行根据本发明的对焊料材料层的电镀。
根据本发明，所述导电种层104可以由单个金属层、单个金属合金层制成，或者由至少两个不同的单层的多层制成。从由铜、锡、钴、镍、银、锡铅合金、铜镍合金、铜铬合金、铜钌合金、铜铑合金、铜银合金、铜铱合金、铜钯合金、铜铂合金、铜金合金和铜稀土合金、铜镍银合金、铜镍稀土金属合金构成的组中选择适于作为导电种层的金属和金属合金。铜和铜合金被优选作为导电种层104。
根据本发明的优选实施例，也可以通过无电镀方法来形成所述金属种层104，其中，催化金属不使用贵金属，而是使用铜作为催化金属。可以在美国专利No. 3993491和No.3993848中找到用于在非导电表面上形成这样的催化铜的典型例子。
所述金属种层104的厚度优选小于0.1毫米，并且更优选处于0.0001毫米和0.005毫米之间。根据所述金属种层104在焊料材料层中的溶解度，所述金属种层104能完全溶解到焊料沉积中，或者在回流过程之后仍然至少部分地存在。在本发明的优选实施例中，金属种层104在回流期间或者回流之后被完全溶解到焊料材料层中。
由于可以在蚀刻溶液中更快地去除较薄的种层，因而较薄的所述金属种层104是优选的。由于在蚀刻液中的较短的接触时间，因而由所述蚀刻溶液对所述焊料掩模层103的损害将被降低至可接受的低水平。
现在参考图1c，利用已知技术来将抗蚀剂层105施加到焊料掩模层103，并使其图案化，以便暴露焊料掩模开口以及至少一个接触焊盘102。
接下来，然后通过电镀在金属种层104上形成第一焊料材料层106（图1d）。用于第一焊料材料层106的第一焊料材料从以下构成的组中选择：锡、铟、铋以及含有上述金属中的至少一种的合金。最优选的金属为纯锡。
然后，通过电镀将第二焊料材料107沉积到所述第一焊料材料层106上。第二焊料材料含有从以下构成的组中选择的至少一种元素：锡、铅、银、金、铜、铋、锑、锌、镍、铝、镁、铟、碲、镓、钌、铑、铱、钯和铂。
更优选地，第二焊料材料107是由锡和从以下元素构成的组中选择的至少一种元素的混合物所制成的锡合金：铅、银、铜、铋、锑、锌、镍、铝、镁、铟、碲、镓、钌、铑、铱、钯和铂。
用于第二焊料材料层107的最优选的第二焊料材料是锡银合金。
在第一焊料材料层106和第二焊料材料107的优选组合中，第一焊料材料层106由纯锡构成，并且第二焊料材料层107由锡合金构成。
在第一焊料材料层106和第二焊料材料层107的最优选的组合中，第一焊料材料层106由纯锡构成，并且第二焊料材料层107由锡银合金构成。
锡和锡合金电镀液（plating bath）在本领域是已知的。通常使用的锡或锡合金电镀液成分以及用于镀敷的工艺参数在下文中被描述。
连同其他镀液的组分一起可以添加抗氧化剂和表面活性剂。
Sn2+离子源可以是可溶解的含锡阳极，或者在使用不可溶阳极的情况下，其可以是可溶解Sn2+离子源。甲烷磺酸锡Sn(MSA)2因为它的高溶解度而是优选的Sn2+离子源。典型地，Sn2+离子源的浓度足以向所述镀液中提供处于大约10g/l和大约200g/l之间的Sn2+离子，优选处于大约15g/l和大约95g/l之间的Sn2+离子，更优选处于大约40g/l和大约60g/l之间的Sn2+离子。例如，可以添加Sn(MSA)2，从而向电镀液提供处于大约30g/l和大约60g/l之间的Sn2+离子。
优选的合金为锡银合金。在这样的情况下，电镀液附加地含有可溶解的银盐，通常使用的是硝酸盐、醋酸盐，并且优选使用甲烷磺酸盐。典型地，Ag+离子源的浓度足以向所述镀液中提供处于大约0.01g/l和大约1.5g/l之间的Ag+离子，优选处于大约0.3g/l和大约0.7g/l之间的Ag+离子，更优选处于大约0.4g/l和大约0.6g/l之间的Ag+离子。例如，可以添加Ag(MSA)，从而向电镀液提供处于大约0.2g/l和大约1.0g/l之间的Ag+离子。
可以向本发明的镀液添加抗氧化剂，从而对抗溶液中的Sn2+离子的氧化而使镀液稳定。可以以处于大约0.1g/l和大约10g/l之间的浓度，优选处于大约0.5g/l和大约3g/l之间的浓度来添加诸如对苯二酚、儿茶酚以及羟基、二羟基或三羟基苯甲酸中的任何一种的优选的抗氧化剂。例如，可以将对苯二酚以大约2g/l的浓度添加到镀液。
可以添加表面活性剂以促进衬底的润湿。表面活性剂似乎起着温和的沉积抑制剂的作用，其能在一定程度上抑制三维生长，由此改善薄膜的形态和形貌。其还有助于使晶粒尺寸细化，这产生了更加均匀的凸点。示范性阴离子表面活性剂包括烷基磷酸酯、烷基醚磷酸盐、烷基硫酸盐、烷基醚硫酸盐、烷基磺酸盐、烷基醚磺酸盐、羧酸醚、羧酸酯、烷基芳基磺酸盐、芳基烷基醚磺酸盐、芳基磺酸盐和磺基丁二酸酯。
本发明的电解电镀液优选具有酸性pH，以抑制阳极钝化，实现更好的阴极效率，并且实现更具延展性的沉积。因此，镀液pH优选处于大约0和大约3之间。在优选实施例中，镀液的pH为0。因此，可以使用硝酸、乙酸和甲烷磺酸来实现优选的酸性pH。在一个优选实施例中，所述酸为甲烷磺酸。所述酸的浓度优选处于大约50g/l和大约200g/l之间，更优选处于大约70g/l和大约120g/l之间。例如，可以将处于大约50g/l和大约160g/l之间的甲烷磺酸添加到电镀液，从而实现pH 0的镀液，并且所述甲烷磺酸充当导电电解质。
例如，在Jordan: The Electrodeposition of Tin and its Alloys, 1995, p.71-84中公开了典型的镀液成分。
可以通过直流（DC）或脉冲镀敷来执行用于焊料储存镀敷的锡和锡合金的镀敷。脉冲镀敷技术尤其适于填充如图1和图2中所示的本发明的结构。脉冲镀敷的优点是更高的表面分布均匀性和改善的晶体结构，其中，锡沉积具有更加精细的晶粒尺寸，并且因此具有更好的可焊性属性。而且，与DC镀敷相比，通过脉冲镀敷可以获得更高的可适用电流密度，并且因此可以获得更高的吞吐量。
一般而言，可以施加1-20A/dm2的有效电流密度下的电流脉冲。替代地，可以利用0.3-5A/dm2的电流密度下的DC来执行镀液的操作。
例如，施加具有3A/dm2的电流密度的锡脉冲镀敷在30分钟的镀敷时间内产生了40μm的锡沉积的平均厚度。表面上的厚度变化仅为+/-15%。施加DC镀敷可以获得仅1A/dm2的最大电流密度。获得40μm的锡沉积的厚度的镀敷时间为86分钟。表面上的变化为+/-33%，因而比脉冲镀敷高得多。
优选脉冲参数如下：
将至少一个正向电流脉冲的持续时间与至少一个反向电流脉冲的持续时间的比值调整为至少1:0-1:7，优选为至少1:0.5-1:4，以及更优选为至少1:1-1:2.5。
可以将至少一个正向电流脉冲的持续时间调整为优选至少5ms到1000ms。
优选将至少一个反向电流脉冲的持续时间调整为0.2-5ms，以及最优选为0.5-1.5ms。
优选将工件处的至少一个正向电流脉冲的峰值电流密度调整为1-30A/dm2的值。尤其优选的是在水平过程中工件处的至少一个正向电流脉冲的峰值电流密度具有2-8A/dm2。在垂直过程中，工件处的至少一个正向电流脉冲的最优选的峰值电流密度为1-5A/dm2。
工件处的至少一个反向电流脉冲的峰值电流密度将被优选地调整为0-60A/dm2的值。尤其优选的是在水平过程中工件处的至少一个反向电流脉冲的峰值电流密度具有0-20A/dm2。在垂直过程中，工件处的至少一个正向电流脉冲的最优选的峰值电流密度为0-12A/dm2。
诸如锡阳极的本领域已知的阳极可以被用于通过电镀来沉积锡和锡合金。然而，对于其中有比锡更加贵重的合金金属（例如，银）的锡合金而言，诸如钛阳极、镀铂钛阳极和钛混合氧化物阳极的惰性阳极是优选的。
根据图1的结构中的焊料掩模开口109优选具有大约5-1.000μm的尺寸，该尺寸优选为大约10-500μm，甚至更优选为20-100μm。
焊料掩模开口109的宽度在5-250μm之间变化，优选具有10-50μm（图1a）。将相邻接触区域的中心点的距离表示为间距，并且对于IC衬底而言，其从90-300μm的范围变动，以及对于印刷电路而言，其从150-1.000μm的范围的变动。
参考图1f，正在从焊料掩模层103去除图案化的抗蚀剂层105以及金属种层104。优选地通过从焊料掩模层区域103化学蚀刻一定量的金属种层104，在至少一个接触区域上留下第一和第二焊料材料层106和107，来执行所述去除。可以电解地或者化学地执行铜和铜合金的蚀刻，其也被称为剥离。可以通过应用例行实验来选择合适的蚀刻溶液。
而且，可以单独地或者与电解或化学剥离结合来施加机械抛光，从而去除金属种层104。
例如，在 Printed Circuits Handbook, C. F. Coombs Jr. (Ed.), 6thEdition, McGraw Hill, 34.6至34.18页中公开了用于铜和铜合金的典型蚀刻或剥离成分。
用于铜和铜合金的典型蚀刻成分为过硫酸盐和硫酸、卡罗酸的混合物、过氧化物和无机酸的混合物、CuCl2、过氧化物和无机酸的混合物、CuCl2和氨水的混合物。
任选地，然后使所述衬底与处理后的成分接触，从而防止锡或锡合金表面的氧化和褪色。用于所述目的的合适的处理后的成分经常是以无机或有机含磷化合物及其混合物为基础的。例如，在EP 2014798A1和EP 1716949B1中公开了具体的成分。
可以在回流温度下形成倒装芯片或BGA接点。此外，在回流操作期间（图1g），所述金属种层104、第一焊料材料层和第二焊料材料层溶解到彼此当中，同时形成了均匀的合金焊料沉积108。本发明提供了用于所述均匀合金焊料沉积108的成分的两种调整模式。至少一个个体金属种层、第一焊料材料层和第二焊料材料层中的每个的成分以及它们在沉积后的相应的体积被用来获得具有恰好定义的成分的最终的合金焊料沉积108，即合金焊料沉积108的期望的溶化温度。
优选的最终焊料合金焊料沉积108含有大于50wt.-%的锡。
最终的焊料合金沉积108中的优选的银浓度从1到6wt.-%的范围变动。
最终的焊料合金沉积108内的优选的铜浓度从0.05到2wt.-%的范围变动。
根据本发明的优选实施例，所述电镀焊料凸点可以被应用于形成倒装芯片接点以及板到板焊点。
所述焊料凸点可以是任何形状，例如，纽扣形凸点、球形凸点、圆柱形凸点或其他凸点。
尽管已经针对根据图1的衬底详细描述了该过程顺序，但是其不限于此，并且可以被应用于所有种类的衬底。在图2中示出了能被相应地处理的本发明的附加的优选实施例。
根据本发明，所述焊料掩模层103不限于覆盖所述接触焊盘102表面的一部分。如图2中所示，将所述焊料掩模层103沉积在所述非导电表面101的表面上，但是其不覆盖所述接触焊盘102表面的任何部分。转而，形成了所述导电种层104。随后，在覆盖所述接触焊盘102的所述开口中形成焊料沉积层106和107。这样的结构被称为非焊料掩模限定的焊盘衬底。
下面的例子进一步说明了本发明。
范例
例1
使用具有根据图1a的接触焊盘结构的IC衬底。
镀敷顺序是根据图1的。
首先利用标准过程对IC衬底进行清洁，然后在包括过氧化氢和硫酸的含水成分中对所述IC衬底进行微蚀刻。
接下来，将具有25µm的厚度的焊料掩模（Lackwerke Peters, ELPEMER SD 2467SG-DG(525)）沉积到所述非导电衬底101上（图1a）。对所述焊料掩模进行光结构化，以便使至少一个接触焊盘102暴露。
在整个衬底表面上形成铜的金属种层104（图1b）。为此，首先利用含有离子化钯的酸性溶液接触所述表面，并且然后利用用于无电铜沉积的溶液接触所述表面。
接下来，将干膜光致抗蚀剂105（PM 250，DuPont）层压到焊料掩模层103上。在标准过程中对所述干膜光致抗蚀剂进行图案化（图1c）。
此后，根据含有下述成分的镀液在所述导电层（图1d）上镀敷锡层（第一焊料材料层106）：
作为Sn(MSA)2的45 g/l的Sn2+、60 ml/l的MSA（70%溶液）、2 g/l的氢醌和100 mg/l的苯亚甲基丙酮。
所述镀液的pH低于1，温度为25°C。镀敷时间为20分钟。应用下述参数来使用DC镀敷：
平均电流密度：2.5 A/dm2。
在没有任何空洞形成的情况下利用锡焊料材料来完全填充根据图1d的焊料掩模开口。
接下来，根据含有下述成分的镀液通过电镀（图1e）向所述第一焊料材料层106上沉积锡银合金层（第二焊料材料层107）：
作为Sn(MSA)2的40 g/l的Sn2+、作为Ag(MSA)的1.5 g/l的Ag+、60 ml/l的MSA （70%溶液）、2 g/l的氢醌和100 mg/l的苯亚甲基丙酮。
所述镀液的pH低于1，温度为25°C。镀敷时间为15分钟。应用下述参数来使用DC镀敷：
平均电流密度：2 A/dm2。
在没有任何空洞形成的情况下利用锡银合金材料来填充根据图1e的抗蚀剂开口110。
在沉积第一焊料材料层106和第二焊料材料层107之后，利用2wt.-％的碳酸钾的水溶液来去除所述图案化的干膜光致抗蚀剂（图1f）。
此后，通过在40°C的温度下在含有30vol.-%的硝酸的溶液中处理1分钟，来移除焊料掩模层103上的金属种层104（图1f）。在所述蚀刻过程之后，已经完全去除了所述焊料掩模区域103上的铜的金属种层104。
然后，所述衬底受到回流操作，其中，所述金属种层104、第一焊料材料106和第二焊料材料107形成了均匀的SAC合金焊料沉积108。
锡焊料沉积示出了非常均一的表面分布，并且是无晶须的（whisker free）。其适于被焊接到芯片或电路。
例2
利用作为金属种层104的无电镀的铜镍来涂覆具有焊料掩模开口的衬底，所述焊料掩模开口具有50µm的直径和20µm的高度。沉积抗蚀剂层，并形成具有80µm的直径和50µm的高度的抗蚀剂开口110。然后，通过电镀利用作为第一焊料材料层106的锡来填充焊料掩模开口109以及按照抗蚀剂开口110的高度的15µm。接下来，通过电镀向第一焊料材料层106上电镀作为第二焊料材料层107的锡银合金，其填充按照抗蚀剂开口110的高度的15µm。
所述金属种层104具有0.2µm的厚度和1.055µg的重量。所述金属种层由95wt.-%的铜和5wt.-%的镍构成。
作为第一焊料材料层106而沉积在每个开口中的锡的重量为83.7µg。
作为第二焊料材料层107而沉积在每个开口中的锡银合金的重量为55µg，并且银含量为6wt.-%。
接下来，去除抗蚀剂层106，并使所述衬底受到回流操作。所得到的焊料合金沉积108具有96.9wt.-%的锡、2.36wt.%的银、0.75wt-%的铜和0.04wt.-%的镍的均匀成分，其与被用作焊料的典型的四元SAC合金的成分类似。
例3
利用50µm的焊料掩模开口直径和60µm的抗蚀剂开口110直径来重复例2。沉积具有0.25µm的厚度和5wt.-%的镍含量的铜层作为金属种层104。通过电镀来沉积具有90.6µg的重量的纯锡层作为第一焊料材料层106。接下来，通过电镀向抗蚀剂开口110中沉积具有10µm的高度和20.6µg的重量的锡银合金层作为第二焊料材料层107。所述第二焊料材料层107含有6wt.-%的银。
接下来，去除抗蚀剂层106，并使所述衬底受到回流操作。所得到的焊料合金沉积108具有98.1wt.-%的锡、1.1wt.%的银、0.76wt-%的铜和0.04wt.-%的镍的均匀成分，其与被用作焊料的典型的四元SAC合金的成分类似。

Claims (6)

1.一种在衬底上形成焊料合金沉积的方法，其包括下述步骤：
i) 提供包括表面承载电路的衬底（101），所述表面承载电路包括至少一个接触焊盘（102），
ii) 形成焊料掩模层（103），所述焊料掩模层被置于所述衬底表面上并且被图案化以暴露所述至少一个接触焊盘（102），
iii) 使包括所述焊料掩模层（103）和所述至少一个接触焊盘（102）的整个衬底区域与适于在所述衬底表面上提供金属种层（104）的溶液相接触，
iv) 在所述金属种层上形成抗蚀剂层，并在所述抗蚀剂层（105）中创建开口，其使所述焊料掩模开口（110）和所述至少一个接触焊盘（102）暴露，
v) 将由纯锡构成的第一焊料材料层（106）电镀到所述金属种层（104）上，
vi) 将由锡银合金构成的第二焊料材料层（107）电镀到所述第一焊料材料层（106）上，
vii) 去除抗蚀剂层（105），并且蚀刻掉一定量的金属种层（104），其足以将所述金属种层从所述焊料掩模层区域去除，在所述至少一个接触焊盘（102）上留下两个堆叠的焊料材料层，
viii) 对所述衬底进行回流，并且由此根据所述金属种层（104）、第一焊料材料层（106）和第二焊料材料层（107）形成焊料合金沉积（108），
其中，通过所述金属种层（104）、第一焊料材料层（106）和第二焊料材料层（107）的体积以及它们的相应元素成分来控制所述焊料合金沉积（108）的成分，
并且其中，所述焊料合金沉积（108）含有大于50wt.%的锡、1到6wt.%的银和0.05到2wt.%的铜。
2.根据权利要求1所述的在衬底上形成焊料合金沉积的方法，其中，所述金属种层（104）从以下构成的组中选择：铜、锡、钴、镍、银、锡铅合金、铜镍合金、铜铬合金、铜钌合金、铜铑合金、铜银合金、铜铱合金、铜钯合金、铜铂合金、铜金合金和铜稀土合金、铜镍银合金、铜镍稀土金属合金、铜/锡双层、铬/铜铬合金/铜多层以及镍/锡/铜多层。
3.根据权利要求1或2所述的在衬底上形成焊料合金沉积的方法，其中，所述焊料合金沉积（108）从以下构成的组中选择：锡银铜合金和锡银铜镍合金。
4.根据权利要求1 或2所述的在衬底上形成焊料合金沉积的方法，其中，所述衬底是印刷电路板。
5.根据权利要求1 或2所述的在衬底上形成焊料合金沉积的方法，其中，所述衬底是IC衬底。
6.根据权利要求1 或2所述的在衬底上形成焊料合金沉积的方法，其中，所述衬底是插入机构。
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