CN102804363A - 半导体装置及半导体装置的制造方法 - Google Patents
半导体装置及半导体装置的制造方法 Download PDFInfo
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- CN102804363A CN102804363A CN2009801600414A CN200980160041A CN102804363A CN 102804363 A CN102804363 A CN 102804363A CN 2009801600414 A CN2009801600414 A CN 2009801600414A CN 200980160041 A CN200980160041 A CN 200980160041A CN 102804363 A CN102804363 A CN 102804363A
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Abstract
本发明由下述工序制造半导体装置,从而提高生产率,所述工序是:将多个半导体芯片(11)按照与上述金属薄膜电绝缘的方式固定在金属薄膜(30)上的工序;通过连接部件(13)将半导体芯片的电极焊盘(12)和上述金属薄膜进行电连接的工序;通过树脂层(15)来密封上述金属薄膜的上述半导体芯片和上述连接部件的工序;以及通过分割上述金属薄膜来形成薄膜端子(30A)的工序。
Description
技术领域
本发明涉及半导体装置及半导体装置的制造方法。
背景技术
已知不使用引线框而将半导体芯片封装化的半导体装置。这样的半导体装置预先在引线框上形成与电极焊盘的数量对应的数量的凹部,并在凹部内形成镀敷层,将电极焊盘和镀敷层进行引线接合,并通过成形进行树脂密封后,除去引线框。(例如,参照专利文献1)
现有技术文献
专利文献
专利文献1:日本专利第3181229号公报
发明内容
发明要解决的课题
上述方法中,由于工序数多,因此生产率降低。另外,由于半导体芯片的电极焊盘的数量、位置根据半导体芯片的功能.用途.尺寸不同而不同,因此需要对每个半导体芯片设计、形成引线框的数量和配置、进而在引线框上形成的镀敷层形成用的沟槽的位置,开发效率非常差。
解决课题的方法
本发明的半导体装置的特征在于,具有:上表面具有多个电极焊盘的半导体芯片;在半导体芯片的下表面,分别以分离部进行分离而设置的多个薄膜端子;在半导体芯片和各薄膜端子之间设置的绝缘层;连接各半导体芯片的电极焊盘和各薄膜端子的连接部件;以及覆盖半导体芯片、从半导体芯片露出的多个薄膜端子、分离部上和连接部件而设置的树脂层。
另外,本发明的半导体装置的制造方法的特征在于,具有:准备具有电极焊盘的半导体芯片的工序;准备面积比半导体芯片大的金属薄膜,并将半导体芯片按照与金属薄膜电绝缘的方式固定在金属薄膜上的工序;通过连接部件将电极焊盘和金属薄膜进行电连接的工序;在金属薄膜上形成覆盖半导体芯片和连接部件的绝缘层的工序;以及将金属薄膜形成为规定形状的薄膜端子的工序。
进而,本发明的半导体装置的制造方法的特征在于,按照以下工序的顺序进行,所述工序是:准备具有电极焊盘的半导体芯片的工序;准备面积比上述半导体芯片大的金属薄膜,并将上述半导体芯片按照与上述金属薄膜电绝缘的方式固定在上述金属薄膜上的工序;通过连接部件将上述电极焊盘和上述金属薄膜进行电连接的工序;在上述金属薄膜上形成覆盖上述半导体芯片和上述连接部件的绝缘层的工序;以及将上述金属薄膜形成为规定形状的薄膜端子的工序。
发明效果
根据本发明,由于在形成与半导体芯片的电极焊盘连接的薄膜端子时,不需要使用引线框,因而不需要对引线框实施加工,因此可提高开发效率和生产率。
附图说明
图1是表示本发明的半导体装置的第一实施方式的放大立体图。
图2是用于说明图1的半导体装置的制造方法的立体图。
图3是用于说明接着图2的工序的立体图。
图4是用于说明接着图3的工序的立体图。
图5是用于说明接着图4的工序的立体图。
图6是用于说明接着图5的工序的立体图。
图7是用于说明接着图6的工序的立体图。
图8是用于说明接着图7的工序的立体图,是相对于图2~图7将正反面反转而从背面侧观察的图。
图9是用于说明图1的半导体装置的制造方法的放大截面图,是在图2表示的工序中,图示了1个半导体装置形成区域内的图。
图10是用于说明接着图9的工序的放大截面图,对应于图3表示的工序。
图11是用于说明接着图10的工序的放大截面图,对应于图4表示的工序。
图12是用于说明接着图11的工序的放大截面图,对应于图5表示的工序。
图13是用于说明接着图12的工序的放大截面图,对应于图6表示的工序。
图14是用于说明接着图13的工序的放大截面图,对应于图7表示的工序。
图15是用于详细说明金属薄膜的变形部的放大截面图。
图16是表示将本发明的半导体装置安装在电路基板上的状态的放大截面图。
图17是用于说明本发明的半导体装置及其制造方法的第二实施方式的放大截面图。
图18是用于说明接着图17的工序的放大截面图。
图19是用于说明接着图18的工序的放大截面图。
图20是用于说明接着图19的工序的放大截面图。
图21是用于说明接着图20的工序的放大截面图。
图22是表示本发明的半导体装置的第一变形例的放大截面图。
图23是表示本发明的半导体装置的第二变形例的放大截面图。
图24是表示本发明的半导体装置的制造方法的其他例的放大立体图。
图25是表示涉及本发明的半导体装置的制造方法且与图24不同的其他例的放大立体图。
图26是用于说明本发明的半导体装置的第三实施方式的图,图26(A)为俯视图,图26(B)为图26(A)的XXVIB-XXVIB线切断截面图,图26(C)为仰视图。
具体实施方式
(实施方式1)
以下,对于本发明的半导体装置的第一实施方式进行说明。
图1为本发明的半导体装置的放大立体图。半导体装置10在半导体芯片11的下表面具有被分离部16分离的多个薄膜端子30A。半导体芯片11通过将形成集成电路的半导体晶片进行切割而得到。半导体芯片11具有露出表面的多个电极焊盘12。虽然未图示,但在电极焊盘12的周围形成二氧化硅或者进而在其上形成聚酰亚胺膜等的保护膜。虽然在图1中,电极焊盘12形成为凸块状,但不一定必须从上表面突出。
薄膜端子30A具有从半导体芯片11的周围突出的部分,在该突出的部分接合导线(连接部件)13的一端。将导线13的另一端与电极焊盘12进行接合。因此,各薄膜端子30A与对应的电极焊盘12通过导线13进行电连接。
并且,半导体芯片11、从半导体芯片11的外表突出的薄膜端子30A以及分离部16和导线13被环氧树脂等热固型的树脂层15覆盖。
另外,图1的半导体装置10作为分别具有4个半导体芯片11的电极焊盘12和薄膜端子30A的例子来进行图示,但这是为了图示的方便,实际上在半导体芯片11的上表面形成了许多电极焊盘12,在半导体芯片11的下表面侧形成了与电极焊盘20对应的数量的薄膜端子30A。
薄膜端子30A由铝等的金属箔形成,没有限定的意思,但以其厚度为30~100μm左右的方式非常薄地形成。
各薄膜端子30A具有变形部20。图15为变形部20的放大截面图。
变形部20从与树脂层15相对的面侧向外面侧(换言之,从图15的上表面侧向下表面侧)突出,大致具有外形为半球形状、其中央部有下陷部的形状。
更详细地说,变形部20的半球状的突出部22的内侧形成具有最深部23a的沟槽23,具有从沟槽23的最深部23a向内侧以直线状立起的斜面部23b。
就变形部20的中央部分而言,上表面21a具有与变形部20的周围的20a处在同一平面的平坦的连接部21,沟槽23的斜面部23b支持该连接部21。在连接部21的上表面21a上接合上述的导线13的一端。双点划线表示导线13的接合状态。
从外侧看时,连接部21和沟槽23的斜面部23b形成圆锥体形状的下陷部24,在该下陷部24内填充用于与外部端子连接的导电性的连接材料,后面会详述。
回到图1,树脂层15也填充在变形部20的沟槽23内,如后所述,成为伴随树脂层15的固化而确实保持各薄膜端子30A的构成。
半导体装置10的外形尺寸可以设为2~5mm(长度)×2~5mm(宽度)×0.3~0.8mm(厚度),从而可以生产效率和可靠性高、且有效地生产小尺寸的半导体装置10。
以下,说明第一实施方式的半导体装置的制造方法的一例。
图2~图8为用于说明本发明的半导体装置的制造方法的一例的放大立体图,图9~图14分别为图2~图7对应的放大截面图。但是,图2~图8图示了同时形成许多半导体装置的方法,与此相对,图9~图14为了说明的方便,对于一个半导体装置图示了用于说明其制造过程的截面图。
首先,如图2图示的那样,准备可形成许多半导体装置10的尺寸的金属薄膜30,并通过具有粘接性的绝缘层42粘接在由具有同样尺寸的不锈钢(SUS)等构成的基台41上。
如图9图示的那样,基台41、绝缘层42、金属薄膜30以该顺序进行密合而层叠。
接着,通过加压在金属薄膜30上形成许多变形部20(参照图3、图10)。各变形部20如上所述,具有图15所图示的截面形状,且具有在突出部22的中央有连接部21的形状。变形部20以其整体纳入绝缘层42内的方式形成。即,变形部20的高度H比绝缘层42的厚度T小。
作为一例,可以将变形部20的高度H为30~70μm、直径D设为200~300μm、绝缘层42的厚度T设为50~200μm。但是,带有上述的T>H的条件。
接着,如图4所图示的那样,在金属薄膜30的各半导体装置形成区域内粘着上表面具有电极焊盘12的半导体芯片11。半导体芯片11与金属薄膜30的粘着是使贴片(die attach)材等的绝缘材43介于两部件之间来进行的(参照图11)。绝缘材43可预先粘接于各半导体芯片11的下表面,也可粘接于金属薄膜30的上表面。
接着,将半导体芯片11的各电极焊盘12与金属薄膜30进行引线接合(参照图5及图12)。
通过毛细管(未图示)加热导线,将导线的一端成形为球状,并与金属薄膜30的变形部20的连接部21接合,将另一端与电极焊盘12接合。由此,通过导线13将电极焊盘12和金属薄膜30进行电连接。
如上所述,由于连接导线13的一端的变形部20的连接部21在金属薄膜30的任意的位置形成,因此没有必要像使用引线框并在该引线框的规定的位置进行接合的以往的方法那样,预先根据半导体芯片的功能·用途·尺寸来设计引线框的尺寸、形状、位置等。即,在该状态下,金属薄膜30如以下说明的那样,尚未形成分离的端子形状,因此各变形部20可以在接合导线13后设定在最佳的位置。由此,在本发明中,可以在金属薄膜30的最佳的位置、以最佳的尺寸接合导线13。
接着,保持图5和图12的状态,安装于未图示的金属模内,并使树脂流入金属模内,如图6和图13图示的那样,以树脂层15覆盖金属薄膜30上的整体。即,在半导体芯片11的上表面及整个侧面、从半导体芯片11露出的金属薄膜30的上表面及导线13的周围整体形成树脂层15。
该状态下,在变形部20的沟槽23内也填充有树脂层5。然后,冷却树脂层15。在图6和图13所图示的状态下,金属薄膜30仅以绝缘材43和树脂层15对于金属薄膜30的粘接力来保持。但是,在本发明中,由于在变形部20的沟槽23内也填充有树脂层15,因此通过树脂层15因冷却而收缩,从而增强金属薄膜30与树脂层15的粘着力。
接着,除去基台41和绝缘层42,露出金属薄膜30的下表面(参照图7)。
然后,如图8图示的那样,使用切割刀片51,将位于各半导体芯片11的下表面的金属薄膜30按照在行方向和列方向的任一方向上均被分离部16分离的方式进行切断。
接着,如果在各半导体装置形成区域的边界部,使用切割刀片52将金属薄膜30和树脂层15在行方向和列方向上进行切断,则金属薄膜30各自被分离而形成薄膜端子30A,如图14和图1图示的那样,得到本发明的半导体装置10。
使用切割刀片52来切断金属薄膜30和树脂层15时,如果金属薄膜30与树脂层15的粘着力小,则有时金属薄膜30剥离而难以形成薄膜端子30A。对此,在本发明中,在金属薄膜30上设置变形部20,通过树脂层15收缩,填充于变形部20内的树脂层15压接于变形部20的突出部22,因此金属薄膜30与树脂层15的粘着力增大,可防止薄膜端子30的剥离。
切断金属薄膜30而形成分离部16的方法以及在各半导体装置形成区域的边界部切断金属薄膜30和树脂层15的方法不限于利用使用切割刀片的切割的方法,可以利用使用蚀刻液的湿蚀刻法、使用化学反应气体和/或非活性气体的等离子体蚀刻等的干蚀刻法。
如上所述,根据本发明的半导体装置及半导体装置的制造方法,在形成与半导体芯片的电极焊盘连接的薄膜端子时,没有必要使用引线框,因而没有必要对引线框实施加工,因此开发效率和生产率提高。特别是由于不需要形成引线框时的图案掩模,因此可大幅降低成本。另外,由于在外形尺寸比半导体芯片11的外形尺寸大的金属薄膜30上的任意位置接合导线,因此可使导线和薄膜端子的位置、尺寸适当并提高接合密度。
另外,由于薄膜端子可形成非常薄的厚度,因而也可由此谋求低成本化和进一步的薄型化。
另外,由于在薄膜端子30A上设置有具有沟槽23的变形部20,因此可谋求薄膜端子30A与树脂层15的粘着力的提高。
图16表示在电路基板60上安装本发明的半导体装置10的状态的放大截面图。
就电路基板60而言,在上表面形成有连接端子61。使半导体装置10的薄膜端子30A与该连接端子61对准,通过焊锡等的接合材62来接合两部件。
薄膜端子30A在变形部20的中央部形成下陷部24,接合材62填充在该下陷部24内而强化接合强度。接合材62可设置于连接端子61上,也可设置于变形部20的突出部22的表面和下陷部24内。
另外,接合材62不限于焊锡,也可以适使银糊等的导电性连接材料、面方向上显示绝缘性且仅在厚度方向显示导电性的各向异性导电性连接材等。
(实施方式2)
第一实施方式中,在半导体装置10的各薄膜端子30A上,仅在连接导线13的位置形成变形部20。但是,也可在各薄膜端子30A上形成多个变形部20。
图21为这种半导体装置70的放大截面图。在该半导体装置70的各薄膜端子35A上有许多变形部20。各变形部20具有第一实施方式所示的结构,突出部22和连接部21沿着长度方向交替排列。将另一端与电极焊盘12连接的导线13的一端与多个变形部20的一个连接。变形部20是在垂直于图面的方向上也以多个、多列进行排列而形成的。
以下,参照图17~图21来说明图21图示的半导体装置的制造方法的一例。
予以说明,在第二实施方式中,与第一实施方式相同的部件赋予相同的参照编号,适当省略其说明。
与第一实施方式同样地将金属薄膜35通过绝缘层42粘接在基台41上,通过热加压在金属薄膜35上形成许多变形部20。此时,与第一实施方式不同,沿着金属薄膜35的长度方向形成有许多变形部20。即,如图17图示的那样,沿着金属薄膜35的长度方向,具有平坦的上表面的连接部21和突出部22交替反复地形成。在各变形部20的突出部22的内部形成沟槽23,在连接部21的外面形成圆锥台形状的下陷部24。此时,虽然没有图示,但变形部20在金属薄膜35的纵深方向(垂直于图面的方向)上平行多列而进行排列。此时,变形部20在各列分别以等间隔形成时,后述的在各薄膜端子上形成的变形部的数量相同,与树脂层的粘着力均匀,因此优选。但是,不一定要等间隔排列,也可以不均匀的间隔设置。
接着,在金属薄膜35的各半导体装置形成区域内粘着具有电极焊盘12的半导体芯片11。半导体芯片11与第一实施方式同样地通过绝缘材43粘着在金属薄膜35上。但是,与第一实施方式不同,绝缘材43覆盖金属薄膜35的变形部20的至少一个变形部20而形成。即,如图18图示的那样,在一部分的变形部20的沟槽23内进行填充。因此,与第一实施方式的情况相比,绝缘材43与金属薄膜35的粘着力被强化。
接着,如图19图示的那样,将各电极焊盘12通过导线13与金属薄膜35的多个变形部20中的一个连接。这种情况下,虽然变形部20形成有多个,但只要与其中处于最佳位置的变形部20的连接部21连接即可。
接着,如图20图示的那样,以树脂层15覆盖金属薄膜35上的整体。树脂层15覆盖半导体芯片11的上表面和整个侧面、从半导体芯片11露出的金属薄膜35和导线13的周围而形成。因此,填充于从半导体芯片11露出的全部变形部20的沟槽23内。
如第一实施方式中说明的那样,通过在变形部20的沟槽23内填充树脂层15,金属薄膜35与树脂层15的粘着力被强化,但在第二实施方式中,由于与第一实施方式相比形成了许多变形部20,因此金属薄膜35与树脂层15的粘着力与第一实施方式相比进一步变大。
接着,除去基台41和绝缘层42,露出金属薄膜35的下表面。
然后,如图21图示的那样,将位于各半导体芯片11的中央部的下表面的金属薄膜35通过切割等适宜的方法除去。之后,通过在各半导体装置形成区域的边界部切断树脂层15和金属薄膜35,得到具有分别被分离的薄膜端子35A的半导体装置70。
第二实施方式的半导体装置70的情况下也可发挥与第一实施方式的半导体装置10的情况同样的效果。
而且,第二实施方式的半导体装置70的情况下,由于变形部20除了连接导线13的部分以外还形成有多个,因此可进一步提高金属薄膜35与树脂层15的粘着力。
(变形例)
以下,表示第一实施方式及第二实施方式所示的半导体装置的变形例。
图22表示作为半导体装置10的变形例的半导体装置10A。半导体装置10A与半导体装置10的不同点在于,在半导体装置10A中,分离部16不仅贯通薄膜端子30A,还贯通绝缘材43,形成到达半导体芯片11的下表面部的构成。
为了形成这样的半导体装置10A,在通过切割刀片51切断金属薄膜30而形成薄膜端子30A的图8所示的工序中,将切割刀片51的前端设定在到达切断半导体芯片11下表面的一部分的深度的位置进行切断即可。
图22作为半导体装置10的变形例进行图示,对于图21所示的半导体装置70也同样可使分离部16为到达半导体芯片11的下部的深度。
图23表示半导体装置70的变形例70A。该半导体装置70A与半导体装置70的不同点在于,分离部16以不仅将薄膜端子70A进行开口、还将绝缘材43的至少下部进行开口的方式来形成。为了形成这样的半导体装置70A,在用于通过切割刀片切断金属薄膜70而形成薄膜端子70A的图8所示的工序中,将切割刀片51的前端设定在到达绝缘材43但未到达导体元件11的位置进行切断即可。
图23作为半导体装置70的变形例进行图示,但对于半导体装置10也同样可使分离部16为到达绝缘材43但未到达半导体芯片11的深度。
图24是表示本发明的半导体装置的制造方法的变形例的放大立体图。
第一及第二实施方式中,是通过导线13将金属薄膜30或35与半导体芯片11的电极焊盘12连接后,通过切割刀片切断金属薄膜30或35,形成薄膜端子30A或35A的方法。图24所图示的方法中,搭载半导体芯片11之前,在金属薄膜36上与变形部20一起形成分离部16。分离部16在通过半导体芯片11的中央部的行方向和列方向上延出,其长度设为到达超过所形成的薄膜端子的外形尺寸的位置的长度。
然后,将半导体芯片11粘着在金属薄膜36上,用导线连接变形部20的连接部21和电极焊盘12,以树脂层覆盖整体后,在用双点划线表示的位置切断金属薄膜36和树脂层。由此,金属薄膜36分别分离而形成薄膜端子36A。利用该方法的情况下,在形成薄膜端子36A的工序中,对金属薄膜36赋予的冲击等外力小,因此薄膜端子36A的形成容易且可靠。
图25是表示本发明的半导体装置的制造方法的另外的变形例的放大立体图。
图25所图示的例子中,在搭载半导体芯片11之前,在金属薄膜37上,与变形部20一起在与所搭载的半导体芯片11的中央部对应的位置形成外形尺寸比半导体芯片11的外形尺寸小的开口部17。
然后,将半导体芯片11粘着在金属薄膜37上,用导线连接变形部20的连接部21和电极焊盘12,以树脂层覆盖整体后,如双点划线所示沿着通过开口部17的行方向和列方向除去金属薄膜37,形成分离部16。由此,金属薄膜37被分别分离。
之后,以外形尺寸切断金属薄膜37和树脂层,则可得到各个半导体装置。
(实施方式3)
图26表示本发明的半导体装置的第三实施方式。该实施方式的半导体装置80表示薄膜端子沿着半导体芯片11的整个侧边部进行排列的例子,图26(A)为俯视图,图26(B)为图26(A)的XXVIB-XXVIB线切断截面图,图26(C)为仰视图。
该实施方式的半导体芯片11具有沿着四边全部的侧边部进行排列的电极焊盘12。另外,薄膜端子38A也排列在与配置应该连接的电极焊盘12的侧边部相同的侧边部。
然后,各薄膜端子38A在通过绝缘材43粘着于半导体芯片11的下表面的状态下,通过导线13与电极焊盘12连接。另外,包含半导体芯片11和薄膜端子38A上的整体被树脂层15被覆。
虽然图26中,电极焊盘12和薄膜端子38A在各侧边部各配置三个,但配置于各侧边部的电极焊盘12和薄膜端子38A的数量可增大至定线和薄膜端子形成时的分辨率的界限,对于涉及该点的本发明的可适用性没有限制。
予以说明,在上述第一~第三实施方式中,是在与树脂层15相对的面侧设置具有沟槽部23的变形部20,通过填充于沟槽23内的树脂层15的收缩来增大树脂层15与金属薄膜30的粘着力的结构。但是,作为增大树脂层15与金属薄膜30粘着力的方法,并不限定于上述结构。例如,可以使金属薄膜30的与树脂层15的接触面侧形成表面粗糙度例如为6~10μm左右的微细的凹凸。另外,也可以形成这样在金属薄膜30上形成微细的凹凸、并且如第一~第三实施方式表示的那样在与树脂层15相对的面侧设置具有沟槽部23的变形部20的结构。
进而,可将上述实施方式如以下那样进行变形来实施。
作为半导体芯片,以具有集成电路的集成电路元件为例进行说明。
但是,本发明也可适用于LED、网络用被动元件、半导体传感器等、离散部件、被动部件或者混合部件。
变形部20的连接部21的上表面21a的高度与薄膜端子30A的上表面20a在同一平面,但不限于此,连接部21的上表面21a低于薄膜端子30A也没关系。此时,也可以使连接部21的上表面21a与变形部20的最深部23a为相同面。
作为形成树脂层15的方法,以将半导体芯片11接合于金属薄膜30后,与基台41一起收纳于金属模内并通过成形来形成树脂层15的方法进行说明。但是,也可以将半导体芯片11接合于金属薄膜30,除去基台41后,将树脂层15进行成形。作为一例,可以在将金属薄膜30的周边部上表面按压在上金属模的底面、用下金属模按住周边部下表面的状态下进行合模,在金属模内导入树脂而形成树脂层15。
另外,本发明的半导体装置在发明宗旨的范围内可进行各种变形来构成,主要具有如下构成即可:上表面具有多个电极焊盘的半导体芯片;在半导体芯片的下表面,分别以分离部进行分离而设置的多个薄膜端子;在半导体芯片和各薄膜端子之间设置的绝缘层;连接各半导体芯片的电极焊盘和各薄膜端子的连接部件;以及覆盖半导体芯片、从半导体芯片露出的多个薄膜端子、分离部上和连接部件而设置的树脂层。
另外,本发明的半导体装置的制造方法具有以下工序即可:准备具有电极焊盘的半导体芯片的工序;准备面积比半导体芯片大的金属薄膜,并将半导体芯片以与金属薄膜电绝缘的方式固定在金属薄膜上的工序;通过连接部件将电极焊盘和金属薄膜进行电连接的工序;在金属薄膜上形成覆盖半导体芯片和连接部件的绝缘膜的工序;以及将金属薄膜形成为规定形状的薄膜端子的工序。
符号说明
10、10A半导体装置
11半导体芯片
12电极焊盘
13导线(连接部件)
15树脂层
16分离部
17开口部
20变形部
20a、21a上表面
21连接部
22突出部
23沟槽
23a最深部
24下陷部
30、35、36、37金属薄膜
30A、35A、36A、38A薄膜端子
31上表面
41基台
42绝缘层
43绝缘材料
70、70A、80半导体装置
Claims (16)
1.一种半导体装置,其特征在于,具有:
上表面具有多个电极焊盘的半导体芯片;
在所述半导体芯片的下表面,分别以分离部进行分离而设置的多个薄膜端子;
在所述半导体芯片和所述各薄膜端子之间设置的绝缘层;
连接所述各半导体芯片的电极焊盘和所述各薄膜端子的连接部件;以及
覆盖所述半导体芯片、从所述半导体芯片露出的所述多个薄膜端子、所述分离部上和所述连接部件而设置的树脂层。
2.根据权利要求1所述的半导体装置,其特征在于,所述各薄膜端子在与所述树脂层的接触面侧具有微细的凹凸。
3.根据权利要求1或2的任一项所述的半导体装置,其特征在于,所述薄膜端子具有从与所述树脂层的对面侧向外面侧突出的变形部,在所述变形部内填充有所述树脂层的一部分。
4.根据权利要求3所述的半导体装置,其特征在于,将所述连接部件的一端与所述薄膜端子连接的连接部在所述薄膜端子的变形部内形成。
5.根据权利要求4所述的半导体装置,其特征在于,所述连接部与所述薄膜端子一体地形成,并设置在比所述变形部的最深部浅的位置。
6.根据权利要求4所述的半导体装置,其特征在于,所述薄膜端子具有层叠于所述半导体芯片的下表面的区域和所述半导体芯片的外侧的区域,所述变形部在所述薄膜端子的所述半导体芯片的外侧的区域形成。
7.根据权利要求1~6中任一项所述的半导体装置,其特征在于,所述变形部比所述连接部件更多地形成。
8.根据权利要求1~7中任一项所述的半导体装置,其特征在于,所述薄膜端子的厚度为30~200μm。
9.一种半导体装置的制造方法,其特征在于,具有:
准备具有电极焊盘的半导体芯片的工序;
准备面积比所述半导体芯片大的金属薄膜,将所述半导体芯片按照与所述金属薄膜电绝缘的方式固定在所述金属薄膜上的工序;
通过连接部件将所述电极焊盘和所述金属薄膜进行电连接的工序;
在所述金属薄膜上形成覆盖所述半导体芯片和所述连接部件的绝缘层的工序;以及
将所述金属薄膜形成为规定形状的薄膜端子的工序。
10.根据权利要求9所述的半导体装置的制造方法,其特征在于,准备所述金属薄膜的工序包含在与所述半导体芯片对应的区域形成开口部的工序。
11.根据权利要求10所述的半导体装置的制造方法,其特征在于,所述开口部具有延出至与所述半导体芯片不对应的区域的部分。
12.根据权利要求9~11中任一项所述的半导体装置的制造方法,其特征在于,准备所述金属薄膜的工序包含在所述金属薄膜上形成从与所述树脂膜的对面侧向外面突出的变形部的工序。
13.根据权利要求12所述的半导体装置的制造方法,其特征在于,准备面积比所述半导体芯片大的金属薄膜的工序包含通过所述绝缘层在基台上粘接所述金属薄膜的工序,在所述金属薄膜上形成所述变形部的工序包含在所述绝缘层的内部形成所述金属薄膜的工序。
14.根据权利要求13所述的半导体装置的制造方法,其特征在于,通过所述绝缘层在基台上粘接所述金属薄膜的工序包含在所述变形部内填充所述绝缘层的工序。
15.根据权利要求13或14的任一项所述的半导体装置的制造方法,其特征在于,在所述金属薄膜上形成覆盖所述半导体芯片和所述连接部件的绝缘膜的工序之后,在将所述金属薄膜形成为规定形状的薄膜端子的工序之前,包含除去所述基台的工序。
16.一种半导体装置的制造方法,其特征在于,按照以下工序的顺序进行,所述工序是:
准备具有电极焊盘的半导体芯片的工序;
准备面积比所述半导体芯片大的金属薄膜,将所述半导体芯片按照与所述金属薄膜电绝缘的方式固定在所述金属薄膜上的工序;
通过连接部件将所述电极焊盘和所述金属薄膜进行电连接的工序;
在所述金属薄膜上形成覆盖所述半导体芯片和所述连接部件的绝缘层的工序;以及
将所述金属薄膜形成为规定形状的薄膜端子的工序。
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TWI514635B (zh) * | 2011-12-29 | 2015-12-21 | Hon Hai Prec Ind Co Ltd | 發光二極體燈條及其製造方法 |
KR101540070B1 (ko) * | 2014-10-27 | 2015-07-29 | 삼성전자주식회사 | 패키지 기판 및 반도체 패키지의 제조방법 |
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JP7304145B2 (ja) * | 2018-11-07 | 2023-07-06 | 新光電気工業株式会社 | リードフレーム、半導体装置及びリードフレームの製造方法 |
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JP5497030B2 (ja) | 2014-05-21 |
JPWO2010150365A1 (ja) | 2012-12-06 |
WO2010150365A1 (ja) | 2010-12-29 |
US8866296B2 (en) | 2014-10-21 |
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