CN102656677A - 半导体装置和该半导体装置的制造方法 - Google Patents

半导体装置和该半导体装置的制造方法 Download PDF

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CN102656677A
CN102656677A CN2010800567642A CN201080056764A CN102656677A CN 102656677 A CN102656677 A CN 102656677A CN 2010800567642 A CN2010800567642 A CN 2010800567642A CN 201080056764 A CN201080056764 A CN 201080056764A CN 102656677 A CN102656677 A CN 102656677A
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barrier metal
metal layer
semiconductor device
projection
electronic pads
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CN102656677B (zh
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辻本晋也
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

本发明公开了一种半导体装置和该半导体装置的制造方法。半导体装置包括半导体芯片(1)、电极垫(2)、底部阻挡金属层(10)、焊锡凸块(6)以及底部填充材(18)，该电极垫(2)形成在半导体芯片(1)上，该底部阻挡金属层(10)形成在电极垫(2)上，该焊锡凸块(6)形成在底部阻挡金属层(10)上，该底部填充材(18)覆盖底部阻挡金属层(10)和焊锡凸块(6)的周围而形成。焊锡凸块(6)上与底部阻挡金属层(10)接合的界面为该底部阻挡金属层(10)的上表面，底部填充材(18)在凸块(6)的侧面和底部阻挡金属层(10)的端面接合的部分上的角度为直角或钝角。

Description

半导体装置和该半导体装置的制造方法
技术领域
本发明涉及一种半导体装置和该半导体装置的制造方法，特别是涉及一种对外部电极端子设置有底部阻挡金属层(Under Barrier Metal：UBM)，并具有通过倒装芯片方式安装在电路布线衬底上的半导体芯片的半导体装置和该半导体装置的制造方法。
背景技术
近年来，伴随信息通信设备和办公用电子设备等的小型化和高性能化的不断发展，要求安装在上述电子设备中的半导体装置实现小型化并增加输出入用外部端子的数量。
另一方面，伴随半导体制造工艺的显著发展，半导体芯片的结构的细微化和高度集成化不断发展，用相对介电常数较低的、所谓的Low-k(低介电常数)膜作层间绝缘膜的情况越来越多。
因为Low-k膜的物理强度比现有绝缘膜低多了，所以半导体芯片的有源区域容易因来自外部的应力等而损伤。为了防止该损伤的发生，在已达成细微化和高度集成化的半导体芯片中，特别是当通过倒装芯片方式使半导体芯片与外部电路连接时，使用焊锡凸块的熔融连接备受注目。
近年来不断研发的半导体芯片的特征在于将电极垫形成在有源区域上而进行的倒装芯片安装以及用Low-k材料形成的层间绝缘膜。然而，上述安装方式和构成材料具有半导体芯片的可靠性会下降的问题。
当半导体芯片的构成材料和安装半导体芯片的电路布线衬底的构成材料互不相同时，在半导体装置和电路布线衬底之间往往会产生因热膨胀系数的差异而产生的位移。已产生的位移在使半导体装置和电路布线衬底连接的凸块中产生应变，该应变会破坏用来进行倒装芯片安装的凸块和电极垫之间的接合面。对因热膨胀而产生的应变所采取的对策为：将底部填充(underfill)材或封装树脂材(以下，统称为底部填充材)填充在电极垫的周边区域。
然而，底部填充材由填料和溶剂构成，该填料具备用来让因热膨胀而产生的应变的影响缓和的强度。因此，若填充底部填充材的区域的形状比较复杂，就会发生下述现象，即：填料填充得不均匀，只有溶剂被填充。在该情况下，在通过加热将底部填充材固化时，已填充有填料的区域内填料和凸块的接触面紧密接触，能够形成具备能够耐住应变等的强度的构造体。另一方面，在仅填充有溶剂的区域，若对该区域进行加热，溶剂就会挥发，因而会产生空隙(void)或气泡(以下统称为空隙。)。其结果是，形成在凸块和电极垫之间的接合面上的空隙会成为起点，形成龟裂，半导体芯片即半导体装置的可靠性会由于形成的龟裂而下降。
作为让半导体芯片所受到的负担减轻的措施提出了下述方法(例如参照专利文献1)，即：在焊锡凸块形成区域的周围形成呈环状的抗蚀膜，以使由于焊锡凸块和半导体芯片的热膨胀差而在其连接面上发生的应力集中缓和，该焊锡凸块让半导体芯片和电路布线衬底物理连接。在形成焊锡凸块后，在将底部填充材填充在焊锡凸块的周围时，电极垫的周围被该环状抗蚀膜保护，以免该底部填充材渗进焊锡凸块和电极垫的接合面处。
如上所述，在有源区域上形成电极垫，并使该电极垫经被称为凸块的外部连接端子与外部电路连接的倒装芯片方式逐渐成为半导体芯片安装方式的主流。并且，伴随半导体制造工艺的显著发展，半导体装置的结构的细微化和高度集成化不断发展，用相对介电常数较低的Low-k材料作层间绝缘膜的情况越来越多。因此，例如采取如专利文献1所公开的措施，以使外部连接端子对电极垫产生的热应力负担减轻。
然而，伴随半导体装置的进一步的小型化、细微化和高度集成化，开始出现了不能够再维持半导体芯片的可靠性的情况。于是，今后的紧急任务是确立下述技术，即：能够使形成凸块的电极垫所受到的负担减轻，特别是能够应对凸块相互间的间距缩短化，例如能够应对50μm～200μm的间距。
半导体装置由硅(Si)或砷化镓(GaAs)等形成，电路布线衬底用玻璃、芳香族聚酰胺纤维或陶瓷等无机材料以及铜(Cu)等金属材料形成，半导体装置的构成材料和安装半导体装置的电路布线衬底的构成材料互不相同，如上所述。
在半导体装置的制造工艺中包括以250℃～300℃左右对半导体衬底进行加热的工序，以硅为主要成分的半导体芯片的热膨胀系数为3ppm/℃左右，以玻璃纤维为主要成分的电路布线衬底的热膨胀系数为10ppm/℃左右，因而在加热时两者的膨胀程度会产生差异。在此，半导体装置和电路布线衬底因热膨胀系数差而产生的位移在使两者连接的凸块中产生应变。凸块会由于产生的应变而破坏，导致电连接不良。
如图8所示，在专利文献1中，半导体芯片101具有电极垫102、底部阻挡金属层(UBM)110和焊锡凸块106，该电极垫102选择性地形成在该半导体芯片101上，该UBM110覆盖该电极垫102而形成在该电极垫102上，该焊锡凸块106形成在该UBM110上。在此，UBM110形成为：该UBM110的周缘部分跨越到形成在电极垫102的周围的绝缘膜109的周缘部分上。在绝缘膜109上形成有呈环状的抗蚀膜126，该抗蚀膜126的内侧端面与UBM110和焊锡凸块106的端面彼此接触。如上所述，环状抗蚀膜126形成在焊锡凸块106的外侧，以防止UBM10在倒装芯片安装后的加热冷却循环中由于在焊锡凸块106和电极垫102的接合部分附近产生的应力而剥离。也就是说，通过在半导体芯片101上的电极垫102的外周区域形成呈环状的抗蚀膜126，则能够将焊锡凸块106固定，来提高焊锡凸块106和UBM110的连接性。
专利文献1：日本公开特许公报特开2005-268442号公报
发明内容
-发明要解决的技术问题-
然而，在上述现有半导体装置中，当向焊锡凸块106的周围注入底部填充材118时会发生问题。
底部填充材118填充在焊锡凸块106的周围，以提高该焊锡凸块106的接合强度。底部填充材118通过向溶剂中添加填料119而制成，该填料119作为具备用来让因热膨胀而产生的应变的影响缓和的强度的材料使用。填料119呈颗粒状。底部填充材118在被填充后由于毛细管现象而沿焊锡凸块106的外缘部分浸透。
在此，如图8所示，当底部填充材118的位于抗蚀膜126上的填充区域120的角度θ1为锐角时，不能确保均匀地填充填料119的空间，填料119不被填充，使得仅有溶剂填充在该填充区域120内。若在该状态下通过加热使底部填充材118固化，溶剂就会挥发，在溶剂挥发后的区域会形成空隙121。由于该形成在焊锡凸块106和UBM110之间的接合面附近的空隙121，出现焊锡凸块106和底部填充材118不紧密接触的部位。其结果是，焊锡凸块106不能够确保该焊锡凸块106与底部填充材118紧密接触所带来的刚性，因此会由于之后的加热冷却应力而从位于焊锡凸块106的外缘部分的空隙121开始形成龟裂122。
本发明正是鉴于上述问题而完成的。其目的在于：得到维持强度且能够耐住凸块相互间的间距缩短化的凸块和UBM结构。
-用以解决技术问题的技术方案-
为达成上述目的，在本发明中，将半导体装置构成为：能够确保位于凸块和底部阻挡金属层的接合部分附近的底部填充材填充区域较宽。
具体而言，本发明所涉及的半导体装置包括半导体芯片、电极垫、底部阻挡金属层、凸块以及底部填充材，该电极垫形成在半导体芯片上，该底部阻挡金属层形成在电极垫上，该凸块主要由金属形成且形成在底部阻挡金属层上，该底部填充材覆盖底部阻挡金属层和凸块的周围而形成，凸块上与底部阻挡金属层接合的界面形成在该底部阻挡金属层的上表面上，底部填充材在凸块的侧面和底部阻挡金属层的端面接合的部分上的角度为直角或钝角。
根据本发明的半导体装置，主要由金属形成的凸块上与底部阻挡金属层接合的界面为该底部阻挡金属层的上表面，并且，底部填充材在凸块的侧面和底部阻挡金属层的端面接合的部分上的角度为直角或钝角。因此，即使在凸块和底部阻挡金属层之间的间隙中，也能够均匀地填充所需量的含有填料的底部填充材。其结果是，凸块和填料之间的界面紧密接触，能够得到能够耐住加热冷却应力和物理应力的电极结构。
在本发明的半导体装置中，底部阻挡金属层的端面可以呈该底部阻挡金属层的厚度方向的中央部分朝内弯曲的圆弧状。
在本发明的半导体装置中，可以是这样的，即：底部填充材中含有填料，该填料的粒径比底部阻挡金属层的厚度小。
本发明所涉及的半导体装置的制造方法包括：在形成于半导体衬底中的半导体集成电路上形成电极垫的工序，在半导体集成电路上的电极垫的周围选择性地形成掩模部件的工序，在从掩模部件露出的电极垫上形成底部阻挡金属层的工序，在从掩模部件露出的底部阻挡金属层上形成主要由金属形成的凸块的工序，对形成有凸块的半导体衬底进行切割而形成半导体芯片，通过使已形成的半导体芯片的凸块与布线衬底相向，从而将半导体芯片通过倒装芯片方式安装在布线衬底上的工序，除去掩模部件的工序，以及在除去掩模部件的工序之后，向半导体芯片和布线衬底之间注入底部填充材的工序。
根据本发明的半导体装置的制造方法，因为在进行倒装芯片安装的工序和注入底部填充材的工序之间包括除去形成在电极垫的周围的掩模部件的工序，所以能够使主要由金属形成的凸块的侧面和底部阻挡金属层的端面接合的部分上的角度成为直角或比直角大的角度。其结果是，即使在凸块和底部阻挡金属层之间的间隙，也能够均匀地填充所需量的含有填料的底部填充材。其结果是，凸块和填料之间的界面紧密接触，能够得到能够耐住加热冷却应力和物理应力的电极结构。
在本发明的半导体装置的制造方法中，可以是这样的，即：掩模部件的位于电极垫一侧的端面呈掩模部件的厚度方向的中央部分朝向电极垫一侧弯曲的圆弧状。
在本发明的半导体装置的制造方法中，掩模部件可以是抗蚀材、呈薄膜状的抗蚀材或主要由抗蚀剂形成的O型环。
在本发明的半导体装置的制造方法中，可以是这样的，即：底部填充材中含有填料，填料的粒径比底部阻挡金属层的厚度小。
在本发明的半导体装置的制造方法中，在形成凸块的工序中可以利用电镀法、焊球安装法或丝网印刷法。
-发明的效果-
根据本发明所涉及的半导体装置和该半导体装置的制造方法，能够使凸块接合部分的应变缓和，能够得到维持接合强度且能够耐住凸块相互间的间距缩短化的凸块和UBM结构。
附图说明
图1是概略局部剖视图，示出本发明的一实施方式所涉及的半导体装置中包括凸块和UBM的区域。
图2是流程图，示出本发明的一实施方式所涉及的半导体装置的制造方法。
图3(a)～图3(i)是按工序的顺序示出的剖视图，示出本发明的一实施方式所涉及的半导体装置的制造方法。
图4是概略局部剖视图，示出本发明的一实施方式的第一变形例所涉及的半导体装置中包括凸块和UBM的区域。
图5是一工序的局部剖视图，示出本发明的一实施方式的第一变形例所涉及的半导体装置的第一制造方法。
图6是一工序的局部剖视图，示出本发明的一实施方式的第一变形例所涉及的半导体装置的第二制造方法。
图7是一工序的局部剖视图，示出本发明的一实施方式的第一变形例所涉及的半导体装置的第三制造方法。
图8是概略剖视图，示出现有例所涉及的电极垫结构。
具体实施方式
(一实施方式)
参照图1说明本发明的一实施方式。
如图1所示，本实施方式所涉及的半导体装置作为凸块构成体具有电极垫2、底部阻挡金属层(UBM)10和焊锡凸块6，该电极垫2选择性地形成在半导体芯片1上，该UBM10覆盖该电极垫2而形成在该电极垫2上，该焊锡凸块6形成在该UBM10上。在此，UBM10形成为：该UBM10的周缘部分跨越到形成在电极垫2的周围的绝缘膜9的周缘部分上。
在绝缘膜9上以及焊锡凸块6和UBM10的侧面上填充有添加有填料19的底部填充材18。
在此，本实施方式的特征在于：焊锡凸块6仅与UBM10的上表面具有接合界面。而且，底部填充材18在焊锡凸块6的侧面和UBM10的端面接合的部分上的角度为钝角θ2。
若如上所述构成为仅在UBM10的上表面上形成焊锡凸块6的结构，则焊锡凸块6的形成位置变高，该变高的幅度与UBM10的膜厚相等。因此，能够充分确保底部填充材18的形成在焊锡凸块6和UBM10的接合部分附近以及UBM10和绝缘膜9的连接部分附近的填充区域20。
如上所述，位于绝缘膜9上且焊锡凸块6和UBM10的接合部分周围的填充区域20所具有的角度不是像现有半导体装置那样为锐角θ1，而是为钝角θ2。也就是说，能够使底部填充材18的填充区域20的形状不成为尖端较细的形状，其结果是能够扩大填充区域20的容积。若扩大填充区域20的容积，则利用毛细管现象渗进去的底部填充材18的渗透性进一步提高。若该底部填充材18的渗透性提高，则含在该底部填充材18中且呈颗粒状的填料19的渗透性也会提高。因此，能够向填充区域20内均匀地填充所需量的填料19。也就是说，能够将填料19充分且均匀地填充在位于焊锡凸块6和UBM10的接合部分之外侧的填充区域20内，因而能够提高填料19与焊锡凸块6、UBM10及绝缘膜9的相互紧贴性。应予说明，焊锡凸块6的侧面和UBM10的端面接合的部分上的角度θ2只要不是锐角即可，也就是说还可以为直角。
(一实施方式的制造方法)
以下，参照图2和图3对本实施方式所涉及的半导体装置的制造方法加以说明。
首先，如图2中的工序ST1和图3(a)所示，按照已知的扩散制造工艺在半导体晶片1A的集成电路上形成多个由铝(Al)、铜(Cu)或金(Au)等形成的电极垫2，以做到能够使预先形成的半导体集成电路和外部连接端子电连接。之后，在半导体晶片1A上形成使各个电极垫2露出的保护绝缘膜7。接着，在保护绝缘膜7上形成使电极垫2以及保护绝缘膜7中位于电极垫2一侧的周缘部分露出的绝缘膜9。此时，作为一例将绝缘膜9上位于电极垫2一侧的端面形成为朝上扩展的正向锥形状。
接着，如图2中的工序ST2和图3(b)所示，利用例如旋涂法在半导体晶片1A的整个面上涂布形成抗蚀膜31。抗蚀膜31中例如有通过紫外(UV)光照射成为不溶性的负性抗蚀膜以及与此相反通过紫外光照射成为可溶性的正性抗蚀膜，可以根据开口形状和掩模的设计规格等而适当地选择抗蚀膜31的种类。在此，用正性抗蚀膜作抗蚀膜31。接着，对在UBM形成区域具有开口部的UBM形成用掩模32和半导体晶片1A的相对位置进行调整，然后将该UBM形成用掩模32经抗蚀膜31重合在该半导体晶片1A上。之后，从UBM形成用掩模32的上方照射紫外光。
接着，如图3(c)所示，若对已曝光的抗蚀膜31进行显影，抗蚀膜31中已照射紫外光的部分就溶解于显影液中，因而即形成具有使UBM形成区域露出的开口图案的抗蚀膜31。因此，电极垫2从抗蚀膜31的开口图案露出。在此，抗蚀膜31的开口图案的端面与半导体晶片1A的主面大致垂直。之后，如图3(d)所示，除去UBM形成用掩模32。
接着，如图2中的工序ST3和图3(e)所示，利用电镀法或化学镀法在电极垫2上形成UBM10，该UBM10与在以后的工序中形成的焊锡凸块接合。要求UBM10具有以下特性和功能：与利用镀金属法等最后形成的金属即凸块之间的低电阻性、较高的防止焊料扩散功能和位于最上层的金属膜对焊料的润湿性等等。于是，UBM10通过在电极垫2上层叠钛(Ti)、镍(Ni)、钯(Pd)、金(Au)或铜(Cu)等不同种类的金属而形成。这么一来，能够实现形成焊锡凸块时的物理且电气性连接功能。在此，UBM10形成为其厚度以抗蚀膜31的上表面为上限。
接着，如图2中的工序ST4和图3(f)所示，利用电镀法、焊球安装法或丝网印刷法等在形成好的UBM10上一齐形成多个焊锡凸块6。在此，电镀法是下述方法，即：在各个UBM10上形成电镀抗蚀图案作为掩模，形成焊锡镀层，然后除去电镀抗蚀图案，之后通过蚀刻除去不需要的金属层，最后进行热处理，从而形成焊锡凸块6。焊球安装法是下述方法，即：使用形成有助焊剂印刷用开口部的掩模，用助焊剂进行丝网印刷，之后用形成有焊球安装用开口部的掩模安装焊球，再用回流装置或烘炉装置等进行加热，从而形成焊锡凸块6。丝网印刷法是下述方法，即：使用形成有焊膏印刷用开口部的掩模，用焊膏进行印刷，之后与焊球安装法一样地进行加热，从而形成焊锡凸块6。此时，因为UBM10的端面与抗蚀膜31的开口图案的端面形状一致，所以若将该抗蚀膜31的开口图案的端面形成为与半导体晶片1A的主面垂直，则UBM10的端面也会成为与该主面垂直的面。
接着，如图2中的工序ST5、ST6和图3(g)所示，利用已知的方法对半导体晶片1A的背面进行研磨，再将经研磨而薄膜化的半导体晶片1A切割成一个个的芯片，来得到多个半导体芯片1。之后，通过倒装芯片方式将已得到的半导体芯片1安装在电路布线衬底(外部电路)4上。此时，进行定位，以使焊锡凸块6与电路布线衬底4的外部电路电极垫5连接。接着，进行热固化，用焊锡凸块6将半导体芯片1和电路布线衬底4物理接合并电连接起来。
接着，如图2中的工序ST7和图3(h)所示，通过清洗除去已在形成UBM10时使用的抗蚀膜31。抗蚀膜31所起到的作用是：使焊锡凸块6与UBM10的端面不接合、决定UBM10的端面形状以及确保绝缘膜9与焊锡凸块6之间的空间。因此，在倒装芯片安装工序之后，抗蚀膜31的作用已经都实现，因而不再需要该抗蚀膜31。抗蚀膜31的清洗方法中，通过将半导体芯片1和电路布线衬底4的整个面浸渍在化学溶液中进行清洗从而除去抗蚀膜的方法已成为主流。根据需要，可以还利用例如减压室机构、超声波机构、喷嘴机构等提高清洗性的功能，该减压室机构用来除去残存于焊锡凸块6相互间的气泡，来使清洗剂34渗进该部分以代替气泡；该超声波机构利用空化效应进行清洗，除去抗蚀膜；该喷嘴机构能够将清洗剂34集中于凸块6相互间。
接着，如图2中的工序ST8和图3(i)所示，向半导体芯片1和电路布线衬底4之间填充底部填充材18。在本实施方式中，不仅能够将所需要的底部填充材18和含在该底部填充材18中的填料19均匀地填充在焊锡凸块6相互间的间隙中，也能够将所需要的底部填充材18和含在该底部填充材18中的填料19均匀地填充在焊锡凸块6和UBM10之间的间隙中。因此，不会在底部填充材18上形成空隙，底部填充材18和焊锡凸块6紧密接触并固定起来，因而能够形成能够耐住加热冷却应力和物理应力的构造体。
如上所述，根据本实施方式所涉及的制造方法，因为在图3(f)所示的凸块形成工序中，已用抗蚀膜31覆盖UBM10周缘的端面，所以形成在UBM10上的焊锡凸块6不会形成在UBM10的端面上。而且，因为在图3(h)所示的抗蚀膜除去工序中除去抗蚀膜31，所以焊锡凸块6的侧面和UBM10的端面接合的部分所成的角度成为钝角。其结果是，能够将所需量的底部填充材18和填料19均匀地填充在由焊锡凸块6、UBM10和绝缘膜9包围的区域。
(一实施方式的第一变形例)
以下，参照图4对本发明的一实施方式的第一变形例加以说明。
如图4所示，本变形例所涉及的UBM10的特征在于：该UBM10的端面呈在该UBM10的厚度方向的中央部分朝内弯曲的圆弧状。
如上所述，为了使添加在底部填充材18中的颗粒状填料19有效地起作用，需要提高填料19与焊锡凸块6和UBM10的贴紧性。于是，在本变形例中，使UBM10的端面成为朝内弯曲的圆弧形状10a。根据该结构，能够在焊锡凸块6和UBM10的接合部分的外侧区域不形成尖端较细的形状，因而能够提高填料19的填充性。
应予说明，圆弧形状10a的弯曲方向为朝向UBM10的内侧的方向(中心方向)，也就是说，UBM10在与半导体芯片1的主面平行的方向上的剖面面积是：(底面的剖面面积S1)＞(厚度方向中央部分的剖面面积S2)。
在此，UBM10的底面的剖面面积S1和UBM10的厚度方向中央部分的剖面面积S2之差可以根据半导体装置的目的等而在不影响电连接和接合强度的范围内加以调整。
应予说明，如图4所示，当底部填充材18含有比UBM10的厚度大的焊料19A时，不能够将填料19A填充在底部填充材18的填充区域20内。因此，在该情况下，仅有溶剂渗进填充区域20内，溶剂会在加热时挥发，形成空隙。
因此，使填料19的粒径比UBM10的厚度小，以让填料19可靠地填充在焊锡凸块6和UBM10的接合部分附近的区域内。因为底部填充材18利用毛细管现象渗进间隙中，所以填料19的形状虽然可以是多面体，但优选为球状。应予说明，该填料19的粒径和形状也可以应用于图1和图3所示的实施方式。
以下，参照附图对具有呈圆弧形状10a的端面的UBM10的形成方法加以说明。
(第一变形例的第一制造方法)
如图5所示，第一变形例的第一制造方法如下。即，交替重复进行抗蚀膜形成工序和UBM形成工序，例如重复5次。也就是说，做到UBM10的厚度在重复5次上述两种工序后成为图4所示的规定厚度。此时，从第一次抗蚀膜形成工序到第三次抗蚀膜形成工序为止使抗蚀膜31的开口尺寸逐渐变小。而从第四次抗蚀膜形成工序到第五次抗蚀膜形成工序为止使抗蚀膜31的开口尺寸逐渐变大。这么一来，能够形成具有呈近似圆弧状的端面的UBM10。
之后，经与图3(f)～图3(i)相同的工序得到具有图4所示的焊锡凸块6和UBM10的半导体装置。
(第一变形例的第二制造方法)
接着，参照图6对第一变形例的第二制造方法加以说明。
如图6所示，第一变形例的第二制造方法使用呈薄膜状的抗蚀膜31A，来代替叠层型抗蚀膜31。具体而言，准备呈薄膜状且开口端面呈厚度方向中央部分预先朝向开口图案的中心方向弯曲的圆弧状的抗蚀膜31A，使该抗蚀膜31A与绝缘膜9紧密接触，做到电极垫2从开口图案露出且气泡未混入的状态。
应予说明，呈薄膜状的抗蚀膜31A的开口形状可以根据UBM10的形成条件而形成。再说，也可以在同一抗蚀膜31A上形成互不相同的开口形状。
之后，经与图3(e)～图3(i)相同的工序得到具有图4所示的焊锡凸块6和UBM10的半导体装置。
(第一变形例的第三制造方法)
接着，参照图7对第一变形例的第三制造方法加以说明。
如图7所示，在第一变形例的第三制造方法中，使用O型环31B使UBM10的端面形状成为圆弧状，该O型环31B由抗蚀剂形成，该O型环31B的开口端面呈厚度方向中央部分预先朝向开口图案的中心方向弯曲的圆弧状。
与呈薄膜状的抗蚀膜31A一样，上述端面呈圆弧状的O型环31B可以根据UBM10的形成条件形成。当使开口具有互不相同的开口尺寸时，也可以使形状互不相同的O型环31B彼此紧密接触而形成开口。
应予说明，当将O型环31B贴在UBM10形成区域的周围时，预先在绝缘膜9上的UBM形成区域的周围或O型环31B的表面上涂布粘接剂。
之后，经与图3(e)～图3(i)相同的工序得到具有图4所示的焊锡凸块6和UBM10的半导体装置。
如上所述，根据本实施方式及其变形例所涉及的半导体装置，利用毛细管现象向焊锡凸块6相互间的间隙中注入底部填充材18，即使在焊锡凸块6和UBM10的接合部分附近的区域内，也能够均匀地填充所需要的含有填料19的底部填充材18。由此，焊锡凸块6和填料19紧密接触并固定起来，因而能够使凸块接合部分的应变缓和，能够维持能够耐住加热冷却应力和物理应力的接合强度。其结果是，能够实现能够应对间距缩短化的由焊锡凸块6和UBM10构成的构造体。
应予说明，焊锡凸块6的构成材料并不限于焊锡，也可以使用焊锡以外的适当的金属材料。
-产业实用性-
根据本发明所涉及的半导体装置和该半导体装置的制造方法，能够使凸块接合部分的应变缓和，能够得到维持接合强度而能够耐住凸块相互间的间距缩短化的凸块和UBM结构，因而本发明所涉及的半导体装置和该半导体装置的制造方法特别是对针对外部电极端子设置有UBM且具有通过倒装芯片方式安装在电路布线衬底上的半导体芯片的半导体装置等很有用。
-符号说明-
1-半导体芯片；1A-半导体晶片；2-电极垫；4-电路布线衬底(外部电路)；5-外部电路电极垫；6-焊锡凸块(金属凸块)；7-保护绝缘膜；9-绝缘膜；10-底部阻挡金属层(UBM)；10a-圆弧形状；18-底部填充材；19-填料；19A-粒径较大的填料；20-填充区域；31-抗蚀膜；31A-呈薄膜状的抗蚀膜；31B-O型环；32-UBM形成用掩模；34-清洗剂；S1-底面的剖面面积；S2-中央部分的剖面面积。

Claims (8)

1.一种半导体装置，其包括半导体芯片、电极垫、底部阻挡金属层、凸块以及底部填充材，该电极垫形成在所述半导体芯片上，该底部阻挡金属层形成在所述电极垫上，该凸块主要由金属形成且形成在所述底部阻挡金属层上，该底部填充材覆盖所述底部阻挡金属层和所述凸块的周围而形成，其特征在于：
所述凸块上与所述底部阻挡金属层接合的界面形成在该底部阻挡金属层的上表面上；
所述底部填充材在所述凸块的侧面和所述底部阻挡金属层的端面接合的部分上的角度为直角或钝角。
2.根据权利要求1所述的半导体装置，其特征在于：
所述底部阻挡金属层的端面呈该底部阻挡金属层的厚度方向的中央部分朝内弯曲的圆弧状。
3.根据权利要求2所述的半导体装置，其特征在于：
所述底部填充材中含有填料；
所述填料的粒径比所述底部阻挡金属层的厚度小。
4.一种半导体装置的制造方法，其特征在于：
所述半导体装置的制造方法包括：
在形成于半导体衬底中的半导体集成电路上形成电极垫的工序，
在所述半导体集成电路上的所述电极垫的周围选择性地形成掩模部件的工序，
在从所述掩模部件露出的所述电极垫上形成底部阻挡金属层的工序，
在从所述掩模部件露出的所述底部阻挡金属层上形成主要由金属形成的凸块的工序，
对形成有所述凸块的所述半导体衬底进行切割而形成半导体芯片，通过使已形成的所述半导体芯片的所述凸块与布线衬底相向，从而将所述半导体芯片通过倒装芯片方式安装在所述布线衬底上的工序，
除去所述掩模部件的工序，以及
在除去所述掩模部件的工序之后，向所述半导体芯片和所述布线衬底之间注入底部填充材的工序。
5.根据权利要求4所述的半导体装置的制造方法，其特征在于：
所述掩模部件的位于所述电极垫一侧的端面呈所述掩模部件的厚度方向的中央部分朝向所述电极垫一侧弯曲的圆弧状。
6.根据权利要求5所述的半导体装置的制造方法，其特征在于：
所述掩模部件是抗蚀材、呈薄膜状的抗蚀材或主要由抗蚀剂形成的O型环。
7.根据权利要求6所述的半导体装置的制造方法，其特征在于：
所述底部填充材中含有填料；
所述填料的粒径比所述底部阻挡金属层的厚度小。
8.根据权利要求7所述的半导体装置的制造方法，其特征在于：
在形成所述凸块的工序中利用电镀法、焊球安装法或丝网印刷法。
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