WO2011083524A1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
WO2011083524A1
WO2011083524A1 PCT/JP2010/005381 JP2010005381W WO2011083524A1 WO 2011083524 A1 WO2011083524 A1 WO 2011083524A1 JP 2010005381 W JP2010005381 W JP 2010005381W WO 2011083524 A1 WO2011083524 A1 WO 2011083524A1
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Prior art keywords
barrier metal
under barrier
semiconductor device
electrode pad
bump
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PCT/JP2010/005381
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English (en)
French (fr)
Inventor
辻本晋也
Original Assignee
パナソニック株式会社
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Publication date
Application filed by パナソニック株式会社 filed Critical パナソニック株式会社
Priority to CN201080056764.2A priority Critical patent/CN102656677B/zh
Publication of WO2011083524A1 publication Critical patent/WO2011083524A1/ja
Priority to US13/525,734 priority patent/US8575749B2/en

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Definitions

  • the present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to a semiconductor device having a semiconductor chip in which an under barrier metal is provided on an external electrode terminal and is flip-chip mounted on a circuit wiring board, and a manufacturing method thereof.
  • the structure of the semiconductor chip is also miniaturized and highly integrated, and so-called Low-k films having a low relative dielectric constant are often used for interlayer insulating films. ing.
  • the physical strength of the Low-k film is significantly lower than that of the conventional insulating film, the active region of the semiconductor chip is easily damaged by external stress or the like.
  • fusion connection using solder bumps has attracted attention, particularly when connecting to an external circuit using a flip chip method.
  • the characteristics of a semiconductor chip that has been developed in recent years are flip chip mounting in which electrode pads are formed on an active region, and an interlayer insulating film using a low-k material.
  • these mounting methods and constituent materials have a problem that the reliability of the semiconductor chip is lowered.
  • the underfill material is composed of a filler and a solvent having a strength for alleviating the influence of stress strain due to thermal expansion. Therefore, when the shape of the region filled with the underfill material is complicated, a phenomenon occurs in which the filler is not uniformly filled and only the solvent is filled. In this case, when the underfill material is cured by heating, the filler-filled region is in close contact with the contact surface between the filler and the bump to form a structure having a strength that can withstand strain and the like. it can. On the other hand, since the solvent is volatilized when heated in a region filled with only the solvent, voids or bubbles (hereinafter collectively referred to as voids) are generated. As a result, a crack is generated starting from a void generated on the bonding surface between the bump and the electrode pad, and the reliability of the semiconductor chip, that is, the semiconductor device is reduced by the generated crack.
  • voids voids
  • the semiconductor device is made of silicon (Si) or gallium arsenide (GaAs), and the circuit wiring board is made of an inorganic material such as glass, aramid fiber, or ceramic, and a metal material such as copper (Cu).
  • the constituent material of the semiconductor device is different from the constituent material of the circuit wiring board on which the semiconductor device is mounted.
  • the manufacturing process of a semiconductor device includes a step of heating a semiconductor substrate at about 250 ° C. to 300 ° C., a semiconductor chip mainly composed of silicon has a coefficient of thermal expansion of 3 ppm / ° C., and is composed mainly of glass fiber. Since the circuit wiring board has a coefficient of thermal expansion of about 10 ppm / ° C., a difference occurs in the degree of expansion between the two when heated.
  • the displacement between the semiconductor device and the circuit wiring board due to the difference in thermal expansion coefficient causes stress strain in the bumps connecting the two. Due to the generated stress strain, the bumps are destroyed, leading to poor electrical connection.
  • a semiconductor chip 101 is formed so as to cover an electrode pad 102 selectively formed on the semiconductor chip 101 and on the electrode pad 102.
  • an under barrier metal (UBM) 110 and solder bumps 106 formed on the UBM 110.
  • the UBM 110 is formed so that the peripheral portion thereof extends over the peripheral portion of the insulating film 109 formed around the electrode pad 102.
  • an annular resist film 126 is formed on the insulating film 109, and the end face inside the resist film 126 and the end faces of the UBM 110 and the solder bump 106 are in contact with each other.
  • the annular resist film 126 is used to prevent the UBM 10 from peeling due to the stress generated in the vicinity of the joint between the solder bump 106 and the electrode pad 102 in the heating / cooling cycle after flip chip mounting. It is formed outside 106. That is, by forming the annular resist film 126 in the outer peripheral region of the electrode pad 102 in the semiconductor chip 101, it is possible to fix the solder bump 106 and improve the connectivity with the UBM 110.
  • the conventional semiconductor device has a problem when the underfill material 118 is injected around the solder bump 106.
  • the underfill material 118 is filled in the periphery to improve the bonding strength of the solder bump 106, and a filler 119 is added to the solvent as a material having a strength for reducing the influence of stress strain due to thermal expansion. .
  • the filler 119 is in the form of particles, and when the underfill material 118 is filled, it penetrates along the outer edge portion of the solder bump 106 by capillary action.
  • An object of the present invention is to solve the above-mentioned problems, and to obtain a bump and UBM structure that can maintain strength and endure a narrow pitch between bumps.
  • the present invention is configured so that the semiconductor device can ensure a wide filling region of the underfill material in the vicinity of the bump, the under barrier metal, and the joint.
  • a semiconductor device is formed on a semiconductor chip, an electrode pad formed on the semiconductor chip, an under barrier metal formed on the electrode pad, and an under barrier metal.
  • the bump has a bonding interface with the underbarrier metal formed on the upper surface of the underbarrier metal,
  • the material has a right angle or an obtuse angle at the joint portion between the side surface of the bump and the end surface of the under barrier metal.
  • the bonding interface with the under barrier metal is the upper surface of the under barrier metal, and the underfill material is bonded between the side surface of the bump and the end surface of the under barrier metal.
  • the angle in the part is a right angle or an obtuse angle.
  • the end surface of the under barrier metal may have an arc shape in which a central portion in the thickness direction of the under barrier metal is curved inward.
  • the underfill material includes a filler, and the particle size of the filler may be smaller than the thickness of the under barrier metal.
  • a method of manufacturing a semiconductor device includes a step of forming an electrode pad on a semiconductor integrated circuit formed on a semiconductor substrate, and a mask member is selectively formed around the electrode pad on the semiconductor integrated circuit.
  • a step of forming an under barrier metal on the electrode pad exposed from the mask member, a step of forming a bump made of metal on the under barrier metal exposed from the mask member, and the bump is formed.
  • the step of removing the mask member formed around the electrode pad is provided between the step of flip chip mounting and the step of injecting the underfill material,
  • the angle at the joint portion between the side surface of the bump made of and the end surface of the under barrier metal can be increased to a right angle or more.
  • the gap between the bump and the under barrier metal can be filled uniformly with the necessary amount of the underfill material including the filler, so that the interface between the bump and the filler is in close contact with each other, and heating / cooling stress and physical An electrode structure that can withstand stress can be obtained.
  • the end surface of the mask member on the electrode pad side may have an arc shape in which the central portion in the thickness direction of the mask member is curved toward the electrode pad side.
  • the mask member may be a resist material, a film-like resist material, or an O-ring made of a resist.
  • the underfill material may include a plurality of fillers, and the particle size of the filler may be smaller than the thickness of the under barrier metal.
  • an electroplating method, a ball mounting method, or a screen printing method can be used for forming the bumps.
  • the semiconductor device and the manufacturing method thereof according to the present invention it is possible to obtain a bump and UBM structure that can relieve stress strain at a bump bonding portion and can withstand a narrow pitch between bumps while maintaining bonding strength. be able to.
  • FIG. 1 is a partial schematic cross-sectional view showing a region including bumps and UBMs, which is a semiconductor device according to an embodiment of the present invention.
  • FIG. 2 is a flowchart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.
  • FIG. 3A to FIG. 3I are cross-sectional views in order of steps showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.
  • FIG. 4 is a partial schematic cross-sectional view showing a region including bumps and UBMs, which is a semiconductor device according to a first modification of one embodiment of the present invention.
  • FIG. 5 is a partial cross-sectional view showing a first method of manufacturing a semiconductor device according to a first modification of one embodiment of the present invention.
  • FIG. 1 is a partial schematic cross-sectional view showing a region including bumps and UBMs, which is a semiconductor device according to an embodiment of the present invention.
  • FIG. 2 is a flowchart showing a method for
  • FIG. 6 is a partial cross-sectional view of one step showing a second method of manufacturing a semiconductor device according to a first modification of one embodiment of the present invention.
  • FIG. 7 is a partial cross-sectional view of one step showing a third method for manufacturing a semiconductor device according to a first variation of one embodiment of the present invention.
  • FIG. 8 is a schematic sectional view showing an electrode pad structure according to a conventional example.
  • the semiconductor device has an electrode pad 2 selectively formed on a semiconductor chip 1 as a bump structure, and covers the electrode pad 2 on the electrode pad 2.
  • the under barrier metal (UBM) 10 is formed on the UBM 10 and the solder bumps 6 are formed on the UBM 10.
  • the UBM 10 is formed so that the peripheral portion thereof extends over the peripheral portion of the insulating film 9 formed around the electrode pad 2.
  • An underfill material 18 to which a filler 19 is added is filled on the insulating film 9 and the side surfaces of the solder bumps 6 and the UBM 10.
  • the solder bump 6 has a bonding interface only with the upper surface of the UBM 10. Further, the underfill material 18 has an obtuse angle ⁇ ⁇ b> 2 at the joint portion between the side surface of the solder bump 6 and the end surface of the UBM 10.
  • the formation position of the solder bump 6 is increased by the film thickness of the UBM 10.
  • a sufficient filling region 20 of the underfill material 18 formed in the vicinity of the connection portion between the insulating film 9 and the insulating film 9 can be secured.
  • the filling region 20 on the insulating film 9 and around the joint between the solder bump 6 and the UBM 10 has an obtuse angle ⁇ 2 instead of the acute angle ⁇ 1 as in the conventional semiconductor device. That is, the shape of the filling region 20 of the underfill material 18 can be made not a tapered shape, and as a result, the volume of the filling region 20 can be increased. When the volume of the filling region 20 is increased, the permeability of the underfill material 18 that permeates by capillary action is further improved. When the permeability of the underfill material 18 is improved, the permeability of the particulate filler 19 contained in the underfill material 18 is also improved.
  • the filler 19 can be sufficiently and uniformly filled in the filling region 20 outside the joint portion between the solder bump 6 and the UBM 10, the filler 19, the solder bump 6, the UBM 10, and the insulating film 9 are mutually connected. Adhesion can be improved. Note that the angle ⁇ 2 at the joint portion between the side surface of the solder bump 6 and the end surface of the UBM 10 may not be an acute angle, that is, may be a right angle.
  • step ST1 of FIG. 2 and FIG. 3A aluminum (Al), so that a semiconductor integrated circuit formed in advance and an external connection terminal can be electrically connected according to a known diffusion manufacturing process.
  • a plurality of electrode pads 2 made of copper (Cu) or gold (Au) are formed on the integrated circuit of the semiconductor wafer 1A.
  • a protective insulating film 7 is formed on the semiconductor wafer 1A so as to expose the electrode pads 2.
  • an insulating film 9 is formed on the protective insulating film 7 to expose the electrode pad 2 and the peripheral portion of the protective insulating film 7 on the electrode pad 2 side.
  • the end surface of the insulating film 9 on the electrode pad 2 side has a forward tapered shape that expands upward.
  • a resist film 31 is entirely applied and formed on the semiconductor wafer 1A by, eg, spin coating.
  • the resist film 31 includes, for example, a negative type that becomes insoluble by irradiation with ultraviolet (UV) light, and a positive type that becomes reversely soluble, and is appropriately selected according to the opening shape, the design specifications of the mask, and the like. Can do.
  • a positive type is used for the resist film 31.
  • the UBM formation mask 32 is overlaid on the semiconductor wafer 1A, and then above the UBM formation mask 32. To irradiate UV light.
  • the exposed resist film 31 when the exposed resist film 31 is developed, the portion irradiated with the UV light of the resist film 31 is dissolved in the developing solution, and thus has an opening pattern that opens the UBM formation region. A resist film 31 is formed. Therefore, the electrode pad 2 is exposed from the opening pattern in the resist film 31. Here, the end face of the opening pattern of the resist film 31 is substantially perpendicular to the main surface of the semiconductor wafer 1A. Thereafter, as shown in FIG. 3D, the UBM formation mask 32 is removed.
  • the UBM 10 to be bonded to the solder bump formed in the subsequent step is formed on the electrode pad 2 by electroplating or electroless plating.
  • the functions required of the UBM 10 include low resistance to bumps, which are final metals formed by a plating method, a high solder diffusion prevention function, and solder wettability of the uppermost metal film. Therefore, the UBM 10 is formed by stacking different kinds of metals such as titanium (Ti), nickel (Ni), palladium (Pd), gold (Au), or copper (Cu) on the electrode pad 2. Thereby, the function of physical and electrical connection at the time of solder bump formation is fulfilled.
  • the thickness of the UBM 10 is formed with the upper surface of the resist film 31 as an upper limit.
  • a plurality of solder bumps 6 are collectively formed on the formed UBM 10 by electroplating, ball mounting, screen printing, or the like.
  • the electroplating method is to form a plating resist pattern as a mask on each UBM 10 to form solder plating, and then remove the plating resist pattern. Thereafter, unnecessary metal layers are removed by etching, and finally heat treatment is performed to form solder bumps 6.
  • flux is screen-printed using a mask provided with an opening for flux printing. Thereafter, a ball is mounted using a mask provided with a ball mounting opening, and heated by a reflow apparatus or an oven apparatus to form solder bumps 6.
  • the solder paste is printed using a mask provided with an opening for solder paste printing. Thereafter, the solder bumps 6 are formed by heating in the same manner as in the ball mounting method. At this time, since the end face of the UBM 10 matches the end face shape of the opening pattern of the resist film 31, when the end face of the opening pattern of the resist film 31 is formed perpendicular to the main surface of the semiconductor wafer 1A, the end face of the UBM 10 is also It becomes vertical.
  • the back surface of the semiconductor wafer 1A is polished by a known method, and the semiconductor wafer 1A thinned by polishing is divided into chips. A plurality of semiconductor chips 1 are obtained. Thereafter, the obtained semiconductor chip 1 is flip-chip mounted on a circuit wiring board (external circuit) 4. At this time, alignment is performed so that the solder bumps 6 are connected to the external circuit electrode pads 5 of the circuit wiring board 4. Subsequently, thermosetting is performed, and the semiconductor chip 1 and the circuit wiring board 4 are physically and electrically joined by the solder bumps 6.
  • the resist film 31 used for forming the UBM 10 is removed by cleaning.
  • the role of the resist film 31 is to prevent the solder bump 6 from being joined to the end face of the UBM 10, to determine the end face shape of the UBM 10, and to ensure a space between the insulating film 9 and the solder bump 6. Therefore, after the flip mounting process, the role of the resist film 31 is fulfilled, so that the resist film 31 becomes unnecessary.
  • a cleaning method of the resist film 31 a method of removing the entire surface of the semiconductor chip 1 and the circuit wiring board 4 by immersing them in a chemical solution and cleaning them is the mainstream.
  • a vacuum chamber mechanism for allowing the cleaning agent 34 to permeate instead of the bubbles, an ultrasonic mechanism for cleaning and removing by the cavitation effect, or the bumps 6 to each other A function of improving the cleaning property may be used, such as an injection nozzle mechanism that can concentrate the cleaning agent 34 between them.
  • an underfill material 18 is filled between the semiconductor chip 1 and the circuit wiring board 4.
  • the gap between the solder bumps 6 not only the gap between the solder bumps 6 but also the gap between the solder bump 6 and the UBM 10 can be uniformly filled with the necessary underfill material 18 and the filler 19 included in the underfill material 18. For this reason, no void is formed in the underfill material 18, and the underfill material 18 and the solder bump 6 are fixed in close contact with each other, so that a structure that can withstand heating / cooling stress and physical stress can be formed. it can.
  • the solder bump formed on the UBM 10 is used. 6 is not formed on the end face of the UBM 10.
  • the resist film 31 is removed in the resist film removing step shown in FIG. 3H, the angle at the joint portion between the side surface of the solder bump 6 and the end surface of the UBM 10 becomes an obtuse angle.
  • a uniform and sufficient amount of the underfill material 11 and the filler 19 can be filled in a region surrounded by the solder bump 6, the UBM 10, and the insulating film 9.
  • the UBM 10 according to the present modification is characterized in that its end surface has an arcuate shape curved inward at the central portion in the thickness direction.
  • the end surface of the UBM 10 is an arc shape 10a curved inward.
  • the bending direction of the arc shape 10a is the inside (center direction) of the UBM 10, that is, the cross-sectional area in the direction parallel to the main surface of the semiconductor chip 1 of the UBM 10 is (Cross sectional area S1 of the bottom surface)> (Cross sectional area S2 of the central portion in the thickness direction).
  • the difference between the cross-sectional area S1 of the bottom surface of the UBM 10 and the cross-sectional area S2 of the central portion in the thickness direction is adjusted within a range that does not affect the electrical connection and bonding strength according to the purpose of the semiconductor device. Is possible.
  • the underfill material 18 includes a filler 19 ⁇ / b> A larger than the thickness of the UBM 10, the filler 19 ⁇ / b> A cannot be filled in the filling region 20 of the underfill material 18. Therefore, in this case, only the solvent penetrates into the filling region 20, and the solvent volatilizes during heating to generate a void.
  • the particle size of the filler 19 is made smaller than the thickness of the UBM 10 so that the filler 19 is surely filled in the region in the vicinity of the joint between the solder bump 6 and the UBM 10.
  • the shape of the filler 19 is preferably a spherical shape, although it can be a polyhedron.
  • the particle size and shape of the filler 19 can also be applied to the embodiment shown in FIGS.
  • the resist film forming step and the UBM forming step are alternately repeated, for example, five times. That is, after repeating 5 times, the thickness of the UBM 10 is set to the predetermined thickness shown in FIG. At this time, the opening size of the resist film 31 is reduced stepwise from the first resist film forming step to the third resist film forming step. On the other hand, from the fourth resist film forming step to the fifth resist film forming step, the opening size of the resist film 31 is increased stepwise. Thereby, UBM10 with a substantially circular-arc-shaped end surface can be formed.
  • the semiconductor device having the solder bump 6 and the UBM 10 shown in FIG. 4 is obtained through the same steps as those shown in FIGS. 3 (f) to 3 (i).
  • the second manufacturing method of the first modification uses a film-like resist film 31A instead of the laminated resist film 31 as shown in FIG. Specifically, a film-like resist film 31A having an arc shape in which the central portion in the thickness direction of the opening end face is curved in advance in the center direction of the opening pattern is formed so that the electrode pad 2 is exposed from the opening pattern and the bubble Adhere closely to prevent contamination.
  • the opening shape of the film-like resist film 31A can be formed according to the formation conditions of the UBM 10. Further, different opening shapes can be formed in the same resist film 31A.
  • the semiconductor device having the solder bump 6 and the UBM 10 shown in FIG. 4 is obtained through the same steps as those shown in FIGS. 3 (e) to 3 (i).
  • the third manufacturing method of the first modification uses an O-ring 31B made of a resist having an arc shape in which the central portion in the thickness direction of the opening end face is curved in advance in the center direction of the opening pattern.
  • the end face shape of the UBM 10 is an arc shape.
  • Such an O-ring 31B having an arc-shaped end surface can be formed according to the formation conditions of the UBM 10 in the same manner as the film-like resist film 31A. Further, when different opening dimensions are provided, it is also possible to form the O-rings 31B having different shapes in close contact with each other.
  • the semiconductor device having the solder bump 6 and the UBM 10 shown in FIG. 4 is obtained through the same steps as those shown in FIGS. 3 (e) to 3 (i).
  • the underfill material 18 is injected into the gap between the solder bumps 6 using the capillary phenomenon, and the solder bump 6 and the UBM 10 are joined.
  • the necessary underfill material 18 including the filler 19 can be uniformly filled also in the vicinity of the portion. For this reason, since the solder bump 6 and the filler 19 are closely adhered and fixed, the stress distortion of the bump bonding portion can be relaxed, and the bonding strength that can withstand heating and cooling stress and physical stress can be maintained. it can. As a result, it is possible to realize a structure including the solder bumps 6 and the UBM 10 that can cope with a narrow pitch.
  • constituent material of the solder bump 6 is not limited to solder, and an appropriate metal material other than solder can be used.
  • the semiconductor device and the manufacturing method thereof according to the present invention can provide a bump and UBM structure that can relieve stress strain at a bump bonding portion, can maintain a bonding strength, and can withstand a narrow pitch between bumps.
  • a semiconductor device or the like having a semiconductor chip in which a UBM is provided on an external electrode terminal and is flip-chip mounted on a circuit wiring board.

Abstract

　半導体装置は、半導体チップ（１）と、半導体チップ（１）の上に形成された電極パッド（２）と、電極パッド（２）の上に形成されたアンダーバリアメタル（１０）と、アンダーバリアメタル（１０）の上に形成されたはんだバンプ（６）と、アンダーバリアメタル（１０）及びはんだバンプ（６）の周囲を覆うように形成されたアンダーフィル材（１８）とを有している。はんだバンプ（６）は、アンダーバリアメタル（１０）との接合界面が該アンダーバリアメタル（１０）の上面であり、アンダーフィル材（１８）は、バンプ（６）の側面とアンダーバリアメタル（１０）の端面との接合部分における角度が直角又は鈍角である。

Description

半導体装置及びその製造方法
　本発明は、半導体装置及びその製造方法に関し、特に、外部電極端子にアンダーバリアメタルが設けられ、回路配線基板にフリップチップ実装された半導体チップを有する半導体装置及びその製造方法に関する。
　近年、情報通信機器及び事務用電子機器等の小型化と高性能化とが進められるに伴い、これらの電子機器に搭載される半導体装置に小型化と共に入出力用の外部端子の個数を増やすことが要求されている。
　一方、半導体製造プロセスの著しい進展に伴って、半導体チップの構造も微細化及び高集積化が進み、層間絶縁膜には比誘電率が低い、いわゆるＬｏｗ－ｋ膜が用いられる場合が多くなってきている。
　Ｌｏｗ－ｋ膜は、その物理的強度が従来の絶縁膜と比べて大幅に低いことから、外部からの応力等によって半導体チップの能動領域がダメージを受けやすい。これを防止するために、微細化及び高集積化が進んだ半導体チップにおいては、特にフリップチップ方式を用いて外部回路と接続する場合には、はんだバンプを用いた溶融接続が注目されている。
　近年開発されている半導体チップの特徴は、電極パッドを能動領域の上に形成して行うフリップチップ実装と、Ｌｏｗ－ｋ材料を用いる層間絶縁膜とにある。但し、これらの実装方式及び構成材料には、半導体チップの信頼性が低下するという課題がある。
　半導体チップの構成材料と半導体チップを実装する回路配線基板の構成材料とが異なる場合には、熱膨張係数の相違による変位が半導体装置と回路配線基板とにしばしば発生する。発生した変位は、半導体装置と回路配線基板とを接続するバンプに応力歪みを発生させ、この応力歪みは、フリップチップ実装するためのバンプと電極パッドとの接合面を破壊してしまう。熱膨張から発生する応力歪みの対策は、アンダーフィル材又は封止樹脂材（以下、併せてアンダーフィル材と呼ぶ。）を電極パッドの周辺領域に充填することによって対処している。
　しかしながら、アンダーフィル材は、熱膨張による応力歪みの影響を緩和するための強度を備えるフィラーと溶剤とから構成されている。従って、アンダーフィル材を充填する領域の形状が複雑な場合は、フィラーが均一に充填されず、溶剤のみが充填されるという現象が発生する。この場合、アンダーフィル材を加熱により硬化する際に、フィラーが充填された領域はフィラーとバンプとの接触面が密着して、歪み等にも耐え得る強度を備えた構造体を形成することができる。一方、溶剤のみが充填された領域は、加熱すると溶剤が揮発してしまうため、ボイド又は気泡（以下、併せてボイドと呼ぶ。）が発生してしまう。その結果、バンプと電極パッドとの接合面に発生したボイドが起点となってクラックが発生し、発生したクラックによって、半導体チップ、すなわち半導体装置の信頼性が低下する。
　半導体チップへの負担を軽減する対策として、半導体チップと回路配線基板とを物理的に接続するはんだバンプとの熱膨張の差に伴う接続面への応力の集中を緩和するために、はんだバンプの形成領域の周囲に環状のレジスト膜を形成するという方法が提示されている（例えば、特許文献１を参照。）。この環状のレジスト膜により、はんだバンプを形成した後、はんだバンプの周囲にアンダーフィル材を充填する際に、該アンダーフィル材がはんだバンプと電極パッドとの接合面に浸透することがないように、電極パッドの周囲が保護される。
　以上説明したように、半導体チップは、電極パッドを能動領域の上に形成し、バンプと呼ばれる外部接続端子を介して外部回路と接続するフリップチップ方式が主流となってきている。また、半導体製造プロセスの著しい進展に伴って、半導体装置の構造も微細化及び高集積化が進み、層間絶縁膜として比誘電率が低いＬｏｗ－ｋ材料が用いられるようになってきている。これにより、外部接続端子の電極パッドへの熱応力の負担を軽減すべく、例えば特許文献１のように取り組まれてきている。
　しかしながら、半導体装置のさらなる小型化、微細化及び高集積化に伴い、半導体チップの信頼性の維持に対応しきれない場合が現れ始めている。そこで、今後はバンプが形成される電極パッドへの負担の軽減、特にバンプ同士の間の狭ピッチ化、例えば５０μｍ～２００μｍに対応できる技術の確立が急務となっている。
　半導体装置は、シリコン（Ｓｉ）又はガリウム砒素（ＧａＡｓ）等からなり、回路配線基板は、ガラス、アラミド繊維又はセラミック等の無機材料と、銅（Ｃｕ）等の金属材料とを用いており、前述したように、半導体装置の構成材料と半導体装置を実装する回路配線基板の構成材料とは異なっている。
　半導体装置の製造プロセスには、半導体基板を２５０℃～３００℃程度で加熱する工程があり、シリコンを主成分とする半導体チップは３ｐｐｍ／℃の熱膨張係数であり、ガラス繊維を主成分とする回路配線基板は１０ｐｐｍ／℃程度の熱膨張係数であるため、加熱する際に両者の膨張の程度に差が生じる。ここで、熱膨張係数の差に起因する半導体装置と回路配線基板との変位は、両者を接続するバンプに応力歪みを発生させる。発生した応力歪みによって、バンプが破壊してしまい、電気的な接続不良に至ってしまう。
　特許文献１においては、図８に示すように、半導体チップ１０１は、該半導体チップ１０１の上に選択的に形成された電極パッド１０２と、該電極パッド１０２の上にそれを覆うように形成されたアンダーバリアメタル（ＵＢＭ）１１０と、該ＵＢＭ１１０の上に形成されたはんだバンプ１０６とを有している。ここで、ＵＢＭ１１０は、その周縁部が電極パッド１０２の周囲に形成された絶縁膜１０９の周縁部に跨るように形成されている。また、絶縁膜１０９の上には、環状のレジスト膜１２６が形成されており、該レジスト膜１２６の内側の端面とＵＢＭ１１０及びはんだバンプ１０６の端面は互いに接している。このように、環状のレジスト膜１２６は、フリップチップ実装後の加熱冷却サイクルにおいて、はんだバンプ１０６と電極パッド１０２との接合部の近傍に発生する応力によってＵＢＭ１０の剥離を防止するために、はんだバンプ１０６の外側に形成されている。すなわち、半導体チップ１０１における電極パッド１０２の外周領域に環状のレジスト膜１２６を形成することにより、はんだバンプ１０６を固定してＵＢＭ１１０との接続性を向上することが可能である。
特開２００５－２６８４４２号公報
　しかしながら、前記従来の半導体装置は、はんだバンプ１０６の周囲にアンダーフィル材１１８を注入する際に問題が生じる。
　アンダーフィル材１１８は、はんだバンプ１０６の接合強度を向上するためにその周囲に充填され、熱膨張による応力歪みの影響を緩和するための強度を備える材料として、溶剤にフィラー１１９が添加されている。フィラー１１９は粒子状であり、アンダーフィル材１１８は充填されると、はんだバンプ１０６の外縁部に沿って毛細管現象によって浸透していく。
　ここで、図８に示すように、アンダーフィル材１１８のレジスト膜１２６上の充填領域１２０の角度θ１が鋭角である場合には、フィラー１１９が均一に充填する空間を確保できず、フィラー１１９が未充填となって溶剤のみが充填されてしまう。このような状態で、アンダーフィル材１１８を加熱により硬化すると溶剤が揮発してしまい、溶剤が揮発した領域にボイド１２１が発生する。このはんだバンプ１０６とＵＢＭ１１０との接合面の近傍に発生したボイド１２１によって、はんだバンプ１０６とアンダーフィル材１１８とが密着しない部位が生じる。その結果、はんだバンプ１０６は、アンダーフィル材１１８との密着による剛性を確保できず、その後の加熱冷却ストレスによって、はんだバンプ１０６の外縁部のボイド１２１からクラック１２２が発生してしまう。
　本発明は、前記の問題を解決し、強度を維持し且つバンプ同士の間の狭ピッチ化に耐え得るバンプ及びＵＢＭ構造を得られるようにすることを目的とする。
　前記の目的を達成するため、本発明は、半導体装置を、バンプとアンダーバリアメタルと接合部の近傍におけるアンダーフィル材の充填領域を広く確保できるようにする構成とする。
　具体的に、本発明に係る半導体装置は、半導体チップと、半導体チップの上に形成された電極パッドと、電極パッドの上に形成されたアンダーバリアメタルと、アンダーバリアメタルの上に形成された金属からなるバンプと、アンダーバリアメタル及びバンプの周囲を覆うように形成されたアンダーフィル材とを備え、バンプは、アンダーバリアメタルとの接合界面が該アンダーバリアメタルの上面に形成され、アンダーフィル材は、バンプの側面とアンダーバリアメタルの端面との接合部分における角度が直角又は鈍角である。
　本発明の半導体装置によると、金属からなるバンプは、アンダーバリアメタルとの接合界面が該アンダーバリアメタルの上面であり、且つ、アンダーフィル材は、バンプの側面とアンダーバリアメタルの端面との接合部分における角度が直角又は鈍角である。このため、バンプとアンダーバリアメタルとの隙間にも、フィラーを含むアンダーフィル材が必要な量だけ且つ均一に充填できるので、バンプとフィラーとの界面が密着して、加熱冷却ストレス及び物理的なストレスにも耐え得る電極構造を得ることができる。
　本発明の半導体装置において、アンダーバリアメタルの端面は、該アンダーバリアメタルの厚さ方向の中央部分が内側に湾曲した円弧状であってもよい。
　本発明の半導体装置において、アンダーフィル材はフィラーを含み、該フィラーの粒径は、アンダーバリアメタルの厚さよりも小さくてよい。
　本発明に係る半導体装置の製造方法は、半導体基板に形成された半導体集積回路の上に、電極パッドを形成する工程と、半導体集積回路の上の電極パッドの周囲にマスク部材を選択的に形成する工程と、マスク部材から露出する電極パッドの上にアンダーバリアメタルを形成する工程と、マスク部材から露出するアンダーバリアメタルの上に、金属からなるバンプを形成する工程と、バンプが形成された半導体基板を分割して半導体チップを形成し、形成された半導体チップのバンプを配線基板と対向させることにより、半導体チップを配線基板上にフリップチップ実装する工程と、マスク部材を除去する工程と、マスク部材を除去する工程よりも後に、半導体チップと配線基板との間にアンダーフィル材を注入する工程とを備えている。
　本発明の半導体装置の製造方法によると、フリップチップ実装する工程と、アンダーフィル材を注入する工程との間に、電極パッドの周囲に形成したマスク部材を除去する工程を備えているため、金属からなるバンプの側面とアンダーバリアメタルの端面との接合部分における角度を直角又はそれ以上に大きくすることができる。その結果、バンプとアンダーバリアメタルとの隙間にも、フィラーを含むアンダーフィル材が必要な量だけ且つ均一に充填できるので、バンプとフィラーとの界面が密着して、加熱冷却ストレス及び物理的なストレスにも耐え得る電極構造を得ることができる。
　本発明の半導体装置の製造方法において、マスク部材の電極パッド側の端面は、マスク部材の厚さ方向の中央部分が電極パッド側に湾曲した円弧状であってもよい。
　本発明の半導体装置の製造方法において、マスク部材は、レジスト材、フィルム状のレジスト材又はレジストからなるＯリングであってよい。
　本発明の半導体装置の製造方法において、アンダーフィル材は複数のフィラーを含み、フィラーの粒径は、アンダーバリアメタルの厚さよりも小さくてよい。
　本発明の半導体装置の製造方法において、バンプを形成する工程には、電気めっき法、ボール搭載法又はスクリーン印刷法を用いることができる。
　本発明に係る半導体装置及びその製造方法によると、バンプ接合部の応力歪みを緩和することができ、接合強度を維持してバンプ同士の間の狭ピッチ化にも耐え得るバンプ及びＵＢＭ構造を得ることができる。
図１は本発明の一実施形態に係る半導体装置であって、バンプ及びＵＢＭを含む領域を示す部分的な概略断面図である。 図２は本発明の一実施形態に係る半導体装置の製造方法を示すフローチャートである。 図３（ａ）～図３（ｉ）は本発明の一実施形態に係る半導体装置の製造方法を示す工程順の断面図である。 図４は本発明の一実施形態の第１変形例に係る半導体装置であって、バンプ及びＵＢＭを含む領域を示す部分的な概略断面図である。 図５は本発明の一実施形態の第１変形例に係る半導体装置の第１の製造方法を示す一工程の部分的な断面図である。 図６は本発明の一実施形態の第１変形例に係る半導体装置の第２の製造方法を示す一工程の部分的な断面図である。 図７は本発明の一実施形態の第１変形例に係る半導体装置の第３の製造方法を示す一工程の部分的な断面図である。 図８は従来例に係る電極パッド構造を示す概略断面図である。
　（一実施形態）
　本発明の一実施形態について図１を参照しながら説明する。
　図１に示すように、本実施形態に係る半導体装置は、バンプの構造体として、半導体チップ１の上に選択的に形成された電極パッド２と、該電極パッド２の上にそれを覆うように形成されたアンダーバリアメタル（ＵＢＭ）１０と、該ＵＢＭ１０の上に形成されたはんだバンプ６とを有している。ここで、ＵＢＭ１０は、その周縁部が電極パッド２の周囲に形成された絶縁膜９の周縁部に跨るように形成されている。
　絶縁膜９の上並びにはんだバンプ６及びＵＢＭ１０の側面には、フィラー１９が添加されたアンダーフィル材１８が充填されている。
　ここで、本実施形態の特徴として、はんだバンプ６は、ＵＢＭ１０の上面との間でのみ接合界面を有している。さらに、アンダーフィル材１８は、はんだバンプ６の側面とＵＢＭ１０の端面との接合部分における角度が鈍角θ２である。
　このように、はんだバンプ６をＵＢＭ１０の上面にのみ形成する構造とすると、ＵＢＭ１０の膜厚分だけ、はんだバンプ６の形成位置が高くなるため、はんだバンプ６とＵＢＭ１０との接合部の近傍及びＵＢＭ１０と絶縁膜９との接続部の近傍に形成されるアンダーフィル材１８の充填領域２０を十分に確保することができる。
　このように、絶縁膜９の上で且つはんだバンプ６及びＵＢＭ１０の接合部の周囲の充填領域２０は、従来の半導体装置のように鋭角θ１ではなく、鈍角θ２となる。すなわち、アンダーフィル材１８の充填領域２０の形状を先細り形状でなくすることができ、その結果、充填領域２０の容積を拡大することが可能となる。充填領域２０の容積を拡大すると、毛細管現象で浸透していくアンダーフィル材１８は、より浸透性が向上する。該アンダーフィル材１８の浸透性が向上すると、該アンダーフィル材１８に含まれる粒子状のフィラー１９の浸透性も向上する。このため、充填領域２０に必要な量のフィラー１９を均一に充填することができる。すなわち、はんだバンプ６とＵＢＭ１０との接合部の外側の充填領域２０にフィラー１９を十分に且つ均一に充填することができるため、フィラー１９と、はんだバンプ６、ＵＢＭ１０及び絶縁膜９との互いの密着性を向上することができる。なお、はんだバンプ６の側面とＵＢＭ１０の端面との接合部分における角度θ２は鋭角でなければよく、すなわち直角であってもよい。
　（一実施形態の製造方法）
　以下、本実施形態に係る半導体装置の製造方法について図２及び図３を参照しながら説明する。
　まず、図２の工程ＳＴ１及び図３（ａ）に示すように、公知の拡散製造プロセスに従って、あらかじめ形成された半導体集積回路と外部接続端子とを電気的に接続できるよう、アルミニウム（Ａｌ）、銅（Ｃｕ）又は金（Ａｕ）等からなる複数の電極パッド２を半導体ウェハ１Ａの集積回路の上に形成する。その後、半導体ウェハ１Ａの上に、各電極パッド２を露出するように保護絶縁膜７を形成する。続いて、保護絶縁膜７の上に、電極パッド２及び保護絶縁膜７の電極パッド２側の周縁部を露出する絶縁膜９を形成する。このとき、一例として、絶縁膜９における電極パッド２側の端面は、上方に向かって拡がる順テーパ形状とする。
　次に、図２の工程ＳＴ２及び図３（ｂ）に示すように、例えばスピン塗布法により、半導体ウェハ１Ａの上にレジスト膜３１を全面的に塗布して形成する。レジスト膜３１には、例えば、紫外（ＵＶ）光の照射により、不溶性となるネガティブ型と、逆に可溶性となるポジティブ型とがあり、開口形状及びマスクの設計仕様等に応じて適宜選択することができる。ここでは、レジスト膜３１にポジティブ型を用いている。続いて、レジスト膜３１の上にＵＢＭ形成領域に開口部を有するＵＢＭ形成用マスク３２を、半導体ウェハ１Ａと位置調整した後に、該半導体ウェハ１Ａと重ね合わせ、その後、ＵＢＭ形成用マスク３２の上方からＵＶ光を照射する。
　次に、図３（ｃ）に示すように、露光したレジスト膜３１を現像すると、レジスト膜３１のＵＶ光を照射された部分が現像液に溶けるため、ＵＢＭ形成領域を開口する開口パターンを有するレジスト膜３１が形成される。従って、レジスト膜３１における開口パターンからは、電極パッド２が露出することになる。ここで、レジスト膜３１の開口パターンの端面は、半導体ウェハ１Ａの主面に対してほぼ垂直である。その後、図３（ｄ）に示すように、ＵＢＭ形成用マスク３２を除去する。
　次に、図２の工程ＳＴ３及び図３（ｅ）に示すように、電気めっき法又は無電解めっき法により、電極パッド２の上に、後工程で形成されるはんだバンプと接合するＵＢＭ１０を形成する。ＵＢＭ１０に求められる機能には、めっき法等によって形成される最終金属であるバンプとの低抵抗性、高いはんだ拡散防止機能及び最上層の金属膜のはんだ濡れ性等がある。そこで、ＵＢＭ１０は、電極パッド２の上に、チタン（Ｔｉ）、ニッケル（Ｎｉ）、パラジウム（Ｐｄ）、金（Ａｕ）又は銅（Ｃｕ）等の異種の金属を積層して形成する。これにより、はんだバンプ形成時の物理的且つ電気的な接続の機能が果たされる。ここで、ＵＢＭ１０の厚さはレジスト膜３１の上面を上限として形成する。
　次に、図２の工程ＳＴ４及び図３（ｆ）に示すように、形成したＵＢＭ１０の上に、電気めっき法、ボール搭載法又はスクリーン印刷法等によって、複数のはんだバンプ６を一括に形成する。ここで、電気めっき法とは、各ＵＢＭ１０の上に、めっきレジストパターンをマスクとして形成し、はんだめっきを形成し、その後、めっきレジストパターンを除去する。その後、不要な金属層をエッチングにより除去し、最後に熱処理を行って、はんだバンプ６を形成する。また、ボール搭載法は、フラックス印刷用開口部を設けたマスクを用いて、フラックスをスクリーン印刷する。その後、ボール搭載用開口部を設けたマスクを用いてボールを搭載し、リフロー装置又はオーブン装置等により加熱して、はんだバンプ６を形成する。また、スクリーン印刷法は、はんだペースト印刷用開口部を設けたマスクを用いて、はんだペーストを印刷する。その後、ボール搭載法と同様に加熱して、はんだバンプ６を形成する。このとき、ＵＢＭ１０の端面は、レジスト膜３１の開口パターンの端面形状と一致するため、該レジスト膜３１の開口パターンの端面を半導体ウェハ１Ａの主面に垂直に形成した場合は、ＵＢＭ１０の端面も垂直となる。
　次に、図２の工程ＳＴ５、ＳＴ６及び図３（ｇ）に示すように、公知の方法により、半導体ウェハ１Ａの裏面を研磨し、研磨により薄膜化された半導体ウェハ１Ａをチップ単位に個片に分割して複数の半導体チップ１を得る。その後、得られた半導体チップ１を回路配線基板（外部回路）４に対してフリップチップ実装する。このとき、はんだバンプ６が回路配線基板４の外部回路電極パッド５と接続されるように位置合わせを行う。続いて、熱硬化を行って、半導体チップ１と回路配線基板４とをはんだバンプ６によって物理的且つ電気的に接合する。
　次に、図２の工程ＳＴ７及び図３（ｈ）に示すように、ＵＢＭ１０の形成に用いたレジスト膜３１を洗浄により除去する。レジスト膜３１の役割は、はんだバンプ６をＵＢＭ１０の端面と接合させないこと、ＵＢＭ１０の端面形状を決定すること、及び絶縁膜９とはんだバンプ６との空間を確保することである。従って、フリップ実装工程の後は、レジスト膜３１の役割がいずれも果たされているため、該レジスト膜３１は不要となる。レジスト膜３１の洗浄方法は、半導体チップ１及び回路配線基板４の全面を薬液に浸漬して洗浄することにより除去する方法が主流である。さらに必要に応じて、はんだバンプ６同士の間に残存する気泡を除去し、気泡の代わりに洗浄剤３４を浸透させるための減圧チャンバ機構、キャビテーション効果によって洗浄除去する超音波機構、又はバンプ６同士の間に洗浄剤３４を集中可能な噴射ノズル機構等のように、洗浄性を高める機能を用いてもよい。
　次に、図２の工程ＳＴ８及び図３（ｉ）に示すように、半導体チップ１と回路配線基板４との間に、アンダーフィル材１８を充填する。本実施形態においては、はんだバンプ６同士の隙間だけでなく、はんだバンプ６とＵＢＭ１０との隙間にも必要なアンダーフィル材１８と該アンダーフィル材１８に含まれるフィラー１９とを均一に充填できる。このため、アンダーフィル材１８にボイドが形成されず、アンダーフィル材１８とはんだバンプ６とが密着して固定されるので、加熱冷却ストレス及び物理的ストレスにも耐え得る構造体を形成することができる。
　このように、本実施形態に係る製造方法によると、図３（ｆ）に示すバンプ形成工程において、ＵＢＭ１０の周囲の端面をレジスト膜３１によって覆っているため、ＵＢＭ１０の上に形成されるはんだバンプ６は、ＵＢＭ１０の端面には形成されることはない。その上、図３（ｈ）に示すレジスト膜除去工程において、レジスト膜３１を除去するため、はんだバンプ６の側面とＵＢＭ１０の端面との接合部分における角度が鈍角となる。その結果、はんだバンプ６とＵＢＭ１０と絶縁膜９とで囲まれる領域に、均一で且つ十分な量のアンダーフィル材１１及びフィラー１９を充填することができる。
　（一実施形態の第１変形例）
　以下、本発明の一実施形態の第１変形例について図４を参照しながら説明する。
　図４に示すように、本変形例に係るＵＢＭ１０は、その端面が厚さ方向の中央部分において内側に湾曲した円弧状であることを特徴とする。
　前述したように、アンダーフィル材１８に添加された粒子状のフィラー１９を有効とするには、フィラー１９のはんだバンプ６及びＵＢＭ１０との密着性を高めることが必要である。そこで、本変形例においては、ＵＢＭ１０の端面を内側に湾曲した円弧形状１０ａとする。この構成により、はんだバンプ６とＵＢＭ１０との接合部の外側領域の先細り形状をなくすことができるため、フィラー１９の充填性を向上することができる。
　なお、円弧形状１０ａの湾曲方向は、ＵＢＭ１０の内側（中心方向）であり、すなわちＵＢＭ１０の半導体チップ１の主面に平行な方向の断面積は、
　（底面の断面積Ｓ１）＞（厚さ方向の中央部分の断面積Ｓ２）となる。
　ここで、ＵＢＭ１０の底面の断面積Ｓ１とその厚さ方向の中央部分の断面積Ｓ２との差は、半導体装置の目的等に応じて、電気的接続及び接合強度に影響を及ぼさない範囲で調整が可能である。
　なお、図４に示すように、アンダーフィル材１８がＵＢＭ１０の厚さよりも大きいフィラー１９Ａを含む場合、アンダーフィル材１８の充填領域２０にフィラー１９Ａを充填することができない。従って、この場合には、充填領域２０に溶剤のみが浸透してしまい、加熱時に溶剤が揮発して、ボイドが発生してしまう。
　そこで、はんだバンプ６とＵＢＭ１０との接合部の近傍の領域にもフィラー１９が確実に充填されるように、フィラー１９の粒径は、ＵＢＭ１０の厚さよりも小さくする。また、フィラー１９の形状は、アンダーフィル材１８が毛細管現象を利用して隙間を浸透していくため、多面体でも可能ではあるものの、できれば球状が望ましい。なお、このフィラー１９の粒径及び形状は、図１及び図３に示した実施形態にも適用可能である。
　以下、円弧形状１０ａの端面を持つＵＢＭ１０の形成方法について図面を参照しながら説明する。
　（第１変形例の第１の製造方法）
　第１変形例の第１の製造方法は、図５に示すように、レジスト膜形成工程とＵＢＭ形成工程とを交互に、例えば５回繰り返す。すなわち、５回繰り返した後にＵＢＭ１０の厚さが図４に示す所定の厚さとなるようにする。このとき、さらに１回目のレジスト膜形成工程から３回目のレジスト膜形成工程までは、レジスト膜３１の開口寸法を段階的に小さくする。一方、４回目のレジスト膜形成工程から５回目のレジスト膜形成工程までは、レジスト膜３１の開口寸法を段階的に大きくする。これにより、ほぼ円弧状の端面を持つＵＢＭ１０を形成することができる。
　この後は、図３（ｆ）～図３（ｉ）と同様の工程を経て、図４に示すはんだバンプ６及びＵＢＭ１０を有する半導体装置を得る。
　（第１変形例の第２の製造方法）
　次に、第１変形例の第２の製造方法について図６を参照しながら説明する。
　第１変形例の第２の製造方法は、図６に示すように、積層型のレジスト膜３１に代えて、フィルム状のレジスト膜３１Ａを用いる。具体的には、開口端面の厚さ方向の中央部分が開口パターンの中心方向にあらかじめ湾曲した円弧状を有するフィルム状のレジスト膜３１Ａを、開口パターンから電極パッド２が露出するように、且つ気泡が混入しないように密着させる。
　なお、フィルム状のレジスト膜３１Ａの開口形状は、ＵＢＭ１０の形成条件に応じて形成することができる。さらには、異なる開口形状を同一のレジスト膜３１Ａに形成することも可能である。
　この後は、図３（ｅ）～図３（ｉ）と同様の工程を経て、図４に示すはんだバンプ６及びＵＢＭ１０を有する半導体装置を得る。
　（第１変形例の第３の製造方法）
　次に、第１変形例の第３の製造方法について図７を参照しながら説明する。
　第１変形例の第３の製造方法は、図７に示すように、開口端面の厚さ方向の中央部分が開口パターンの中心方向にあらかじめ湾曲した円弧状を有するレジストからなるＯリング３１Ｂを用いて、ＵＢＭ１０の端面形状を円弧状とする。
　このような、端面が円弧状のＯリング３１Ｂは、フィルム状のレジスト膜３１Ａと同様に、ＵＢＭ１０の形成条件に応じて形成することができる。また、異なる開口寸法を持たせる場合には、異なる形状のＯリング３１Ｂ同士を密着して形成することも可能である。
　なお、Ｏリング３１ＢをＵＢＭ１０の形成領域の周囲に貼り付ける際には、あらかじめ絶縁膜９の上のＵＢＭ形成領域の周囲又はＯリング３１Ｂの表面に接着面に接着剤を塗布する。
　この後は、図３（ｅ）～図３（ｉ）と同様の工程を経て、図４に示すはんだバンプ６及びＵＢＭ１０を有する半導体装置を得る。
　以上説明したように、本実施形態及びその変形例に係る半導体装置は、アンダーフィル材１８を毛細管現象を利用してはんだバンプ６同士の間の隙間に注入し、はんだバンプ６とＵＢＭ１０との接合部の近傍領域にも、フィラー１９を含む必要なアンダーフィル材１８を均一に充填することができる。このため、はんだバンプ６とフィラー１９とが密着して固定されるので、バンプ接合部の応力歪みを緩和することができ、加熱冷却ストレス及び物理的ストレスにも耐え得る接合強度を維持することができる。その結果、狭ピッチ化にも対応可能なはんだバンプ６及びＵＢＭ１０とからなる構造体を実現することができる。
　なお、はんだバンプ６の構成材料は、はんだに限られず、はんだ以外の適当な金属材料を用いることができる。
　本発明に係る半導体装置及びその製造方法は、バンプ接合部の応力歪みを緩和することができ、接合強度を維持してバンプ同士の間の狭ピッチ化にも耐え得るバンプ及びＵＢＭ構造を得ることができ、特に、外部電極端子にＵＢＭが設けられ、回路配線基板にフリップチップ実装された半導体チップを有する半導体装置等に有用である。
１　　　半導体チップ
１Ａ　　半導体ウェハ
２　　　電極パッド
４　　　回路配線基板（外部回路）
５　　　外部回路電極パッド
６　　　はんだバンプ（金属バンプ）
７　　　保護絶縁膜
９　　　絶縁膜
１０　　アンダーバリアメタル（ＵＢＭ）
１０ａ　円弧形状
１８　　アンダーフィル材
１９　　フィラー
１９Ａ　粒径が大きいフィラー
２０　　充填領域
３１　　レジスト膜
３１Ａ　フィルム状のレジスト膜
３１Ｂ　Ｏリング
３２　　ＵＢＭ形成用マスク
３４　　洗浄剤
Ｓ１　　底面の断面積
Ｓ２　　中央部分の断面積

Claims (8)

  1. 　半導体チップと、
    　前記半導体チップの上に形成された電極パッドと、
    　前記電極パッドの上に形成されたアンダーバリアメタルと、
    　前記アンダーバリアメタルの上に形成された金属からなるバンプと、
    　前記アンダーバリアメタル及びバンプの周囲を覆うように形成されたアンダーフィル材とを備え、
    　前記バンプは、前記アンダーバリアメタルとの接合界面が該アンダーバリアメタルの上面に形成され、
    　前記アンダーフィル材は、前記バンプの側面と前記アンダーバリアメタルの端面との接合部分における角度が直角又は鈍角である半導体装置。
  2. 　請求項１において、
    　前記アンダーバリアメタルの端面は、該アンダーバリアメタルの厚さ方向の中央部分が内側に湾曲した円弧状である半導体装置。
  3. 　請求項２において、
    　前記アンダーフィル材はフィラーを含み、
    　前記フィラーの粒径は、前記アンダーバリアメタルの厚さよりも小さい半導体装置。
  4. 　半導体基板に形成された半導体集積回路の上に、電極パッドを形成する工程と、
    　前記半導体集積回路の上の前記電極パッドの周囲に、マスク部材を選択的に形成する工程と、
    　前記マスク部材から露出する前記電極パッドの上に、アンダーバリアメタルを形成する工程と、
    　前記マスク部材から露出する前記アンダーバリアメタルの上に、金属からなるバンプを形成する工程と、
    　前記バンプが形成された半導体基板を分割して半導体チップを形成し、形成された前記半導体チップの前記バンプを配線基板と対向させることにより、前記半導体チップを前記配線基板上にフリップチップ実装する工程と、
    　前記マスク部材を除去する工程と、
    　前記マスク部材を除去する工程よりも後に、前記半導体チップと前記配線基板との間に、アンダーフィル材を注入する工程とを備えている半導体装置の製造方法。
  5. 　請求項４において、
    　前記マスク部材の前記電極パッド側の端面は、前記マスク部材の厚さ方向の中央部分が前記電極パッド側に湾曲した円弧状である半導体装置の製造方法。
  6. 　請求項５において、
    　前記マスク部材は、レジスト材、フィルム状のレジスト材又はレジストからなるＯリングである半導体装置の製造方法。
  7. 　請求項６において、
    　前記アンダーフィル材はフィラーを含み、
    　前記フィラーの粒径は、前記アンダーバリアメタルの厚さよりも小さい半導体装置の製造方法。
  8. 　請求項７において、
    　前記バンプを形成する工程は、電気めっき法、ボール搭載法又はスクリーン印刷法を用いる半導体装置の製造方法。
PCT/JP2010/005381 2010-01-05 2010-09-01 半導体装置及びその製造方法 WO2011083524A1 (ja)

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