CN102498560A - 用于窄互连开口的导电结构 - Google Patents
用于窄互连开口的导电结构 Download PDFInfo
- Publication number
- CN102498560A CN102498560A CN2010800407893A CN201080040789A CN102498560A CN 102498560 A CN102498560 A CN 102498560A CN 2010800407893 A CN2010800407893 A CN 2010800407893A CN 201080040789 A CN201080040789 A CN 201080040789A CN 102498560 A CN102498560 A CN 102498560A
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- Prior art keywords
- layer
- opening
- inculating crystal
- crystal layer
- conductive structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76868—Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76844—Bottomless liners
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/560,878 US7956463B2 (en) | 2009-09-16 | 2009-09-16 | Large grain size conductive structure for narrow interconnect openings |
| US12/560,878 | 2009-09-16 | ||
| PCT/EP2010/062407 WO2011032812A1 (en) | 2009-09-16 | 2010-08-25 | Conductive structure for narrow interconnect openings |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102498560A true CN102498560A (zh) | 2012-06-13 |
Family
ID=43064611
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010800407893A Pending CN102498560A (zh) | 2009-09-16 | 2010-08-25 | 用于窄互连开口的导电结构 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7956463B2 (enExample) |
| JP (1) | JP5444471B2 (enExample) |
| CN (1) | CN102498560A (enExample) |
| DE (1) | DE112010003659T5 (enExample) |
| GB (1) | GB2485689B (enExample) |
| TW (1) | TWI497673B (enExample) |
| WO (1) | WO2011032812A1 (enExample) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103003939A (zh) * | 2010-07-19 | 2013-03-27 | 国际商业机器公司 | 改善窄铜填充过孔的导电性的方法及结构 |
| CN104952786A (zh) * | 2014-03-25 | 2015-09-30 | 中芯国际集成电路制造(上海)有限公司 | 电互连结构及其形成方法 |
| CN106548974A (zh) * | 2015-09-18 | 2017-03-29 | 台湾积体电路制造股份有限公司 | 半导体装置及其制造方法 |
| CN107799464A (zh) * | 2016-09-05 | 2018-03-13 | 三星电子株式会社 | 半导体器件及其制造方法 |
| CN112242349A (zh) * | 2019-07-18 | 2021-01-19 | 美光科技公司 | 包括含锰导电结构的微电子装置以及相关电子系统和方法 |
| WO2022001677A1 (zh) * | 2020-06-30 | 2022-01-06 | 长鑫存储技术有限公司 | 半导体器件及半导体器件的形成方法 |
| CN114551399A (zh) * | 2022-02-17 | 2022-05-27 | 华虹半导体(无锡)有限公司 | 半导体结构及其形成方法 |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5353109B2 (ja) | 2008-08-15 | 2013-11-27 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| JP5853351B2 (ja) * | 2010-03-25 | 2016-02-09 | ソニー株式会社 | 半導体装置、半導体装置の製造方法、及び電子機器 |
| CN102790009B (zh) * | 2011-05-16 | 2015-04-29 | 中芯国际集成电路制造(上海)有限公司 | 降低铜电镀工艺中边缘效应的方法及铜互连结构制造方法 |
| US8637400B2 (en) | 2011-06-21 | 2014-01-28 | International Business Machines Corporation | Interconnect structures and methods for back end of the line integration |
| US8492897B2 (en) * | 2011-09-14 | 2013-07-23 | International Business Machines Corporation | Microstructure modification in copper interconnect structures |
| US8648465B2 (en) | 2011-09-28 | 2014-02-11 | International Business Machines Corporation | Semiconductor interconnect structure having enhanced performance and reliability |
| CN103117245A (zh) * | 2011-11-17 | 2013-05-22 | 盛美半导体设备(上海)有限公司 | 空气隙互联结构的形成方法 |
| US9190323B2 (en) | 2012-01-19 | 2015-11-17 | GlobalFoundries, Inc. | Semiconductor devices with copper interconnects and methods for fabricating same |
| JP6360276B2 (ja) * | 2012-03-08 | 2018-07-18 | 東京エレクトロン株式会社 | 半導体装置、半導体装置の製造方法、半導体製造装置 |
| US8836124B2 (en) * | 2012-03-08 | 2014-09-16 | International Business Machines Corporation | Fuse and integrated conductor |
| CN102664193A (zh) * | 2012-04-01 | 2012-09-12 | 京东方科技集团股份有限公司 | 导电结构及制造方法、薄膜晶体管、阵列基板和显示装置 |
| DE102012210480B4 (de) * | 2012-06-21 | 2024-05-08 | Robert Bosch Gmbh | Verfahren zum Herstellen eines Bauelements mit einer elektrischen Durchkontaktierung |
| US8722534B2 (en) | 2012-07-30 | 2014-05-13 | Globalfoundries Inc. | Method for reducing wettability of interconnect material at corner interface and device incorporating same |
| US9514983B2 (en) * | 2012-12-28 | 2016-12-06 | Intel Corporation | Cobalt based interconnects and methods of fabrication thereof |
| US10032712B2 (en) | 2013-03-15 | 2018-07-24 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor structure |
| DE102013104464B4 (de) * | 2013-03-15 | 2019-08-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Halbleiterstruktur |
| CN104103573B (zh) * | 2013-04-02 | 2017-06-16 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| US9997457B2 (en) | 2013-12-20 | 2018-06-12 | Intel Corporation | Cobalt based interconnects and methods of fabrication thereof |
| US9184134B2 (en) * | 2014-01-23 | 2015-11-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing a semiconductor device structure |
| DE102014109352B4 (de) * | 2014-04-30 | 2019-12-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Zusammengesetzte kontaktstöpsel-struktur und verfahren zur herstellung |
| US10079174B2 (en) | 2014-04-30 | 2018-09-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Composite contact plug structure and method of making same |
| CN105097648B (zh) * | 2014-05-04 | 2018-02-16 | 中芯国际集成电路制造(上海)有限公司 | 互连结构的形成方法 |
| US9613907B2 (en) | 2014-07-29 | 2017-04-04 | Samsung Electronics Co., Ltd. | Low resistivity damascene interconnect |
| US9536826B1 (en) | 2015-06-15 | 2017-01-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field effect transistor (finFET) device structure with interconnect structure |
| US10332790B2 (en) | 2015-06-15 | 2019-06-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field effect transistor (FinFET) device structure with interconnect structure |
| DE102015110437B4 (de) * | 2015-06-29 | 2020-10-08 | Infineon Technologies Ag | Halbleitervorrichtung mit einer Metallstruktur, die mit einer leitfähigen Struktur elektrisch verbunden ist und Verfahren zur Herstellung |
| US10461026B2 (en) | 2016-06-30 | 2019-10-29 | International Business Machines Corporation | Techniques to improve reliability in Cu interconnects using Cu intermetallics |
| US9748173B1 (en) * | 2016-07-06 | 2017-08-29 | International Business Machines Corporation | Hybrid interconnects and method of forming the same |
| KR102624631B1 (ko) | 2016-12-02 | 2024-01-12 | 삼성전자주식회사 | 반도체 장치 |
| US10354969B2 (en) * | 2017-07-31 | 2019-07-16 | Advanced Semiconductor Engineering, Inc. | Substrate structure, semiconductor package including the same, and method for manufacturing the same |
| US10763207B2 (en) | 2017-11-21 | 2020-09-01 | Samsung Electronics Co., Ltd. | Interconnects having long grains and methods of manufacturing the same |
| KR102808645B1 (ko) | 2019-08-23 | 2025-05-16 | 삼성전자주식회사 | 반도체 소자 |
| US11205589B2 (en) * | 2019-10-06 | 2021-12-21 | Applied Materials, Inc. | Methods and apparatuses for forming interconnection structures |
| US11551967B2 (en) * | 2020-05-19 | 2023-01-10 | Taiwan Semiconductor Manufacturing Company Limited | Via structure and methods for forming the same |
| US11742290B2 (en) | 2021-03-10 | 2023-08-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Interconnect structure and method of forming thereof |
| US11682675B2 (en) | 2021-03-30 | 2023-06-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field-effect transistor device and method |
| US12374583B2 (en) * | 2021-05-12 | 2025-07-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices and methods of manufacture |
| DE102023134996A1 (de) * | 2023-12-13 | 2025-06-18 | Infineon Technologies Ag | Metallgefülltes kontaktloch in mikrogefertigter vorrichtung |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6096648A (en) * | 1999-01-26 | 2000-08-01 | Amd | Copper/low dielectric interconnect formation with reduced electromigration |
| US6126806A (en) * | 1998-12-02 | 2000-10-03 | International Business Machines Corporation | Enhancing copper electromigration resistance with indium and oxygen lamination |
| US6242349B1 (en) * | 1998-12-09 | 2001-06-05 | Advanced Micro Devices, Inc. | Method of forming copper/copper alloy interconnection with reduced electromigration |
| US20020105082A1 (en) * | 2001-01-04 | 2002-08-08 | International Business Machines Corporation | Method for forming interconnects on semiconductor substrates and structures formed |
| US20060113685A1 (en) * | 2002-12-09 | 2006-06-01 | Nec Corporation | Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device |
| US20060202345A1 (en) * | 2005-03-14 | 2006-09-14 | Hans-Joachim Barth | Barrier layers for conductive features |
| US20070197012A1 (en) * | 2006-02-21 | 2007-08-23 | International Business Machines Corporation | Grain growth promotion layer for semiconductor interconnect structures |
| WO2009101040A2 (en) * | 2008-02-14 | 2009-08-20 | International Business Machines Corporation | Microstructure modification in copper interconnect structure |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6307267B1 (en) * | 1997-12-26 | 2001-10-23 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
| US7244677B2 (en) * | 1998-02-04 | 2007-07-17 | Semitool. Inc. | Method for filling recessed micro-structures with metallization in the production of a microelectronic device |
| US6319728B1 (en) * | 1998-06-05 | 2001-11-20 | Applied Materials, Inc. | Method for treating a deposited film for resistivity reduction |
| TW444238B (en) * | 1998-08-11 | 2001-07-01 | Toshiba Corp | A method of making thin film |
| US6610151B1 (en) * | 1999-10-02 | 2003-08-26 | Uri Cohen | Seed layers for interconnects and methods and apparatus for their fabrication |
| US6228759B1 (en) * | 2000-05-02 | 2001-05-08 | Advanced Micro Devices, Inc. | Method of forming an alloy precipitate to surround interconnect to minimize electromigration |
| US6506668B1 (en) * | 2001-06-22 | 2003-01-14 | Advanced Micro Devices, Inc. | Utilization of annealing enhanced or repaired seed layer to improve copper interconnect reliability |
| US7122466B2 (en) * | 2003-07-28 | 2006-10-17 | Texas Instruments Incorporated | Two step semiconductor manufacturing process for copper interconnects |
| US7235487B2 (en) * | 2004-05-13 | 2007-06-26 | International Business Machines Corporation | Metal seed layer deposition |
| JP2006024754A (ja) * | 2004-07-08 | 2006-01-26 | Advanced Lcd Technologies Development Center Co Ltd | 配線層の形成方法、配線層および薄膜トランジスタ |
| US7282802B2 (en) * | 2004-10-14 | 2007-10-16 | International Business Machines Corporation | Modified via bottom structure for reliability enhancement |
| US7344979B2 (en) * | 2005-02-11 | 2008-03-18 | Wafermasters, Inc. | High pressure treatment for improved grain growth and void reduction |
| DE102005020061B4 (de) * | 2005-03-31 | 2016-12-01 | Globalfoundries Inc. | Technik zur Herstellung von Verbindungsstrukturen mit reduzierter Elektro- und Stressmigration und/oder geringerem Widerstand |
| JP4738959B2 (ja) * | 2005-09-28 | 2011-08-03 | 東芝モバイルディスプレイ株式会社 | 配線構造体の形成方法 |
| US8198730B2 (en) * | 2007-01-10 | 2012-06-12 | Nec Corporation | Semiconductor device and method of manufacturing the same |
| KR100830590B1 (ko) * | 2007-06-01 | 2008-05-21 | 삼성전자주식회사 | 텅스텐막, 그 형성 방법, 이를 포함한 반도체 소자 및 그반도체 소자의 형성 방법 |
| US7566653B2 (en) * | 2007-07-31 | 2009-07-28 | International Business Machines Corporation | Interconnect structure with grain growth promotion layer and method for forming the same |
| JP2009194195A (ja) * | 2008-02-15 | 2009-08-27 | Panasonic Corp | 半導体装置及びその製造方法 |
-
2009
- 2009-09-16 US US12/560,878 patent/US7956463B2/en active Active
-
2010
- 2010-08-25 GB GB1200519.5A patent/GB2485689B/en not_active Expired - Fee Related
- 2010-08-25 DE DE112010003659T patent/DE112010003659T5/de not_active Ceased
- 2010-08-25 CN CN2010800407893A patent/CN102498560A/zh active Pending
- 2010-08-25 WO PCT/EP2010/062407 patent/WO2011032812A1/en not_active Ceased
- 2010-08-25 JP JP2012529193A patent/JP5444471B2/ja not_active Expired - Fee Related
- 2010-09-09 TW TW099130515A patent/TWI497673B/zh not_active IP Right Cessation
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6126806A (en) * | 1998-12-02 | 2000-10-03 | International Business Machines Corporation | Enhancing copper electromigration resistance with indium and oxygen lamination |
| US6242349B1 (en) * | 1998-12-09 | 2001-06-05 | Advanced Micro Devices, Inc. | Method of forming copper/copper alloy interconnection with reduced electromigration |
| US6096648A (en) * | 1999-01-26 | 2000-08-01 | Amd | Copper/low dielectric interconnect formation with reduced electromigration |
| US20020105082A1 (en) * | 2001-01-04 | 2002-08-08 | International Business Machines Corporation | Method for forming interconnects on semiconductor substrates and structures formed |
| US20060113685A1 (en) * | 2002-12-09 | 2006-06-01 | Nec Corporation | Copper alloy for wiring, semiconductor device, method for forming wiring and method for manufacturing semiconductor device |
| US20060202345A1 (en) * | 2005-03-14 | 2006-09-14 | Hans-Joachim Barth | Barrier layers for conductive features |
| US20070197012A1 (en) * | 2006-02-21 | 2007-08-23 | International Business Machines Corporation | Grain growth promotion layer for semiconductor interconnect structures |
| WO2009101040A2 (en) * | 2008-02-14 | 2009-08-20 | International Business Machines Corporation | Microstructure modification in copper interconnect structure |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103003939A (zh) * | 2010-07-19 | 2013-03-27 | 国际商业机器公司 | 改善窄铜填充过孔的导电性的方法及结构 |
| CN104952786A (zh) * | 2014-03-25 | 2015-09-30 | 中芯国际集成电路制造(上海)有限公司 | 电互连结构及其形成方法 |
| CN104952786B (zh) * | 2014-03-25 | 2018-07-10 | 中芯国际集成电路制造(上海)有限公司 | 电互连结构及其形成方法 |
| CN106548974A (zh) * | 2015-09-18 | 2017-03-29 | 台湾积体电路制造股份有限公司 | 半导体装置及其制造方法 |
| CN106548974B (zh) * | 2015-09-18 | 2019-10-18 | 台湾积体电路制造股份有限公司 | 半导体装置及其制造方法 |
| CN107799464A (zh) * | 2016-09-05 | 2018-03-13 | 三星电子株式会社 | 半导体器件及其制造方法 |
| CN107799464B (zh) * | 2016-09-05 | 2023-09-08 | 三星电子株式会社 | 半导体器件及其制造方法 |
| CN112242349A (zh) * | 2019-07-18 | 2021-01-19 | 美光科技公司 | 包括含锰导电结构的微电子装置以及相关电子系统和方法 |
| CN112242349B (zh) * | 2019-07-18 | 2025-05-30 | 美光科技公司 | 包括含锰导电结构的微电子装置以及相关电子系统和方法 |
| WO2022001677A1 (zh) * | 2020-06-30 | 2022-01-06 | 长鑫存储技术有限公司 | 半导体器件及半导体器件的形成方法 |
| CN114551399A (zh) * | 2022-02-17 | 2022-05-27 | 华虹半导体(无锡)有限公司 | 半导体结构及其形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| GB201200519D0 (en) | 2012-02-29 |
| US7956463B2 (en) | 2011-06-07 |
| GB2485689A (en) | 2012-05-23 |
| JP5444471B2 (ja) | 2014-03-19 |
| US20110062587A1 (en) | 2011-03-17 |
| JP2013504886A (ja) | 2013-02-07 |
| DE112010003659T5 (de) | 2012-10-31 |
| TW201126683A (en) | 2011-08-01 |
| GB2485689B (en) | 2013-06-12 |
| TWI497673B (zh) | 2015-08-21 |
| WO2011032812A1 (en) | 2011-03-24 |
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Application publication date: 20120613 |