GB2485689B - Conductive structure for narrow interconnect openings - Google Patents

Conductive structure for narrow interconnect openings

Info

Publication number
GB2485689B
GB2485689B GB1200519.5A GB201200519A GB2485689B GB 2485689 B GB2485689 B GB 2485689B GB 201200519 A GB201200519 A GB 201200519A GB 2485689 B GB2485689 B GB 2485689B
Authority
GB
United Kingdom
Prior art keywords
conductive structure
interconnect openings
narrow interconnect
narrow
openings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB1200519.5A
Other languages
English (en)
Other versions
GB201200519D0 (en
GB2485689A (en
Inventor
Stephen Rossnagel
Chih-Chao Yang
Daniel Edelstein
Takeshi Nogami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB201200519D0 publication Critical patent/GB201200519D0/en
Publication of GB2485689A publication Critical patent/GB2485689A/en
Application granted granted Critical
Publication of GB2485689B publication Critical patent/GB2485689B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846—Layer combinations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76868—Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76844—Bottomless liners

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
GB1200519.5A 2009-09-16 2010-08-25 Conductive structure for narrow interconnect openings Expired - Fee Related GB2485689B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/560,878 US7956463B2 (en) 2009-09-16 2009-09-16 Large grain size conductive structure for narrow interconnect openings
PCT/EP2010/062407 WO2011032812A1 (en) 2009-09-16 2010-08-25 Conductive structure for narrow interconnect openings

Publications (3)

Publication Number Publication Date
GB201200519D0 GB201200519D0 (en) 2012-02-29
GB2485689A GB2485689A (en) 2012-05-23
GB2485689B true GB2485689B (en) 2013-06-12

Family

ID=43064611

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1200519.5A Expired - Fee Related GB2485689B (en) 2009-09-16 2010-08-25 Conductive structure for narrow interconnect openings

Country Status (7)

Country Link
US (1) US7956463B2 (enExample)
JP (1) JP5444471B2 (enExample)
CN (1) CN102498560A (enExample)
DE (1) DE112010003659T5 (enExample)
GB (1) GB2485689B (enExample)
TW (1) TWI497673B (enExample)
WO (1) WO2011032812A1 (enExample)

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JP5853351B2 (ja) * 2010-03-25 2016-02-09 ソニー株式会社 半導体装置、半導体装置の製造方法、及び電子機器
US8661664B2 (en) 2010-07-19 2014-03-04 International Business Machines Corporation Techniques for forming narrow copper filled vias having improved conductivity
CN102790009B (zh) * 2011-05-16 2015-04-29 中芯国际集成电路制造(上海)有限公司 降低铜电镀工艺中边缘效应的方法及铜互连结构制造方法
US8637400B2 (en) 2011-06-21 2014-01-28 International Business Machines Corporation Interconnect structures and methods for back end of the line integration
US8492897B2 (en) * 2011-09-14 2013-07-23 International Business Machines Corporation Microstructure modification in copper interconnect structures
US8648465B2 (en) 2011-09-28 2014-02-11 International Business Machines Corporation Semiconductor interconnect structure having enhanced performance and reliability
CN103117245A (zh) * 2011-11-17 2013-05-22 盛美半导体设备（上海）有限公司 空气隙互联结构的形成方法
US9190323B2 (en) 2012-01-19 2015-11-17 GlobalFoundries, Inc. Semiconductor devices with copper interconnects and methods for fabricating same
JP6360276B2 (ja) * 2012-03-08 2018-07-18 東京エレクトロン株式会社 半導体装置、半導体装置の製造方法、半導体製造装置
US8836124B2 (en) * 2012-03-08 2014-09-16 International Business Machines Corporation Fuse and integrated conductor
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DE102012210480B4 (de) * 2012-06-21 2024-05-08 Robert Bosch Gmbh Verfahren zum Herstellen eines Bauelements mit einer elektrischen Durchkontaktierung
US8722534B2 (en) 2012-07-30 2014-05-13 Globalfoundries Inc. Method for reducing wettability of interconnect material at corner interface and device incorporating same
US9514983B2 (en) * 2012-12-28 2016-12-06 Intel Corporation Cobalt based interconnects and methods of fabrication thereof
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DE102013104464B4 (de) * 2013-03-15 2019-08-29 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleiterstruktur
CN104103573B (zh) * 2013-04-02 2017-06-16 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US9997457B2 (en) 2013-12-20 2018-06-12 Intel Corporation Cobalt based interconnects and methods of fabrication thereof
US9184134B2 (en) * 2014-01-23 2015-11-10 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device structure
CN104952786B (zh) * 2014-03-25 2018-07-10 中芯国际集成电路制造(上海)有限公司 电互连结构及其形成方法
DE102014109352B4 (de) * 2014-04-30 2019-12-05 Taiwan Semiconductor Manufacturing Company, Ltd. Zusammengesetzte kontaktstöpsel-struktur und verfahren zur herstellung
US10079174B2 (en) 2014-04-30 2018-09-18 Taiwan Semiconductor Manufacturing Company, Ltd. Composite contact plug structure and method of making same
CN105097648B (zh) * 2014-05-04 2018-02-16 中芯国际集成电路制造(上海)有限公司 互连结构的形成方法
US9613907B2 (en) 2014-07-29 2017-04-04 Samsung Electronics Co., Ltd. Low resistivity damascene interconnect
US9536826B1 (en) 2015-06-15 2017-01-03 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (finFET) device structure with interconnect structure
US10332790B2 (en) 2015-06-15 2019-06-25 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (FinFET) device structure with interconnect structure
DE102015110437B4 (de) * 2015-06-29 2020-10-08 Infineon Technologies Ag Halbleitervorrichtung mit einer Metallstruktur, die mit einer leitfähigen Struktur elektrisch verbunden ist und Verfahren zur Herstellung
US9613856B1 (en) * 2015-09-18 2017-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming metal interconnection
US10461026B2 (en) 2016-06-30 2019-10-29 International Business Machines Corporation Techniques to improve reliability in Cu interconnects using Cu intermetallics
US9748173B1 (en) * 2016-07-06 2017-08-29 International Business Machines Corporation Hybrid interconnects and method of forming the same
KR102680860B1 (ko) * 2016-09-05 2024-07-03 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR102624631B1 (ko) 2016-12-02 2024-01-12 삼성전자주식회사 반도체 장치
US10354969B2 (en) * 2017-07-31 2019-07-16 Advanced Semiconductor Engineering, Inc. Substrate structure, semiconductor package including the same, and method for manufacturing the same
US10763207B2 (en) 2017-11-21 2020-09-01 Samsung Electronics Co., Ltd. Interconnects having long grains and methods of manufacturing the same
US10651084B1 (en) * 2019-07-18 2020-05-12 Micron Technology, Inc. Microelectronic devices comprising manganese-containing conductive structures, and related electronic systems and methods
KR102808645B1 (ko) 2019-08-23 2025-05-16 삼성전자주식회사 반도체 소자
US11205589B2 (en) * 2019-10-06 2021-12-21 Applied Materials, Inc. Methods and apparatuses for forming interconnection structures
US11551967B2 (en) * 2020-05-19 2023-01-10 Taiwan Semiconductor Manufacturing Company Limited Via structure and methods for forming the same
CN113871344B (zh) * 2020-06-30 2025-03-28 长鑫存储技术有限公司 半导体器件及半导体器件的形成方法
US11742290B2 (en) 2021-03-10 2023-08-29 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structure and method of forming thereof
US11682675B2 (en) 2021-03-30 2023-06-20 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field-effect transistor device and method
US12374583B2 (en) * 2021-05-12 2025-07-29 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices and methods of manufacture
CN114551399A (zh) * 2022-02-17 2022-05-27 华虹半导体(无锡)有限公司 半导体结构及其形成方法
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US6403481B1 (en) * 1998-08-11 2002-06-11 Kabushiki Kaisha Toshiba Film formation method
US20060202345A1 (en) * 2005-03-14 2006-09-14 Hans-Joachim Barth Barrier layers for conductive features
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US20080296660A1 (en) * 2007-06-01 2008-12-04 Samsung Electronics Co., Ltd. Low resistivity conductive structures, devices and systems including same, and methods forming same
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US6403481B1 (en) * 1998-08-11 2002-06-11 Kabushiki Kaisha Toshiba Film formation method
US6228759B1 (en) * 2000-05-02 2001-05-08 Advanced Micro Devices, Inc. Method of forming an alloy precipitate to surround interconnect to minimize electromigration
US20060202345A1 (en) * 2005-03-14 2006-09-14 Hans-Joachim Barth Barrier layers for conductive features
DE102005020061A1 (de) * 2005-03-31 2006-10-19 Advanced Micro Devices, Inc., Sunnyvale Technik zur Herstellung von Verbindungsstrukturen mit reduzierter Elektro- und Stressmigration und/oder geringerem Widerstand
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Also Published As

Publication number Publication date
GB201200519D0 (en) 2012-02-29
US7956463B2 (en) 2011-06-07
GB2485689A (en) 2012-05-23
JP5444471B2 (ja) 2014-03-19
US20110062587A1 (en) 2011-03-17
CN102498560A (zh) 2012-06-13
JP2013504886A (ja) 2013-02-07
DE112010003659T5 (de) 2012-10-31
TW201126683A (en) 2011-08-01
TWI497673B (zh) 2015-08-21
WO2011032812A1 (en) 2011-03-24

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Effective date: 20130725

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20160825