CN102446880B - 包括插件的半导体模块和用于生产包括插件的半导体模块的方法 - Google Patents
包括插件的半导体模块和用于生产包括插件的半导体模块的方法 Download PDFInfo
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- CN102446880B CN102446880B CN201110297372.1A CN201110297372A CN102446880B CN 102446880 B CN102446880 B CN 102446880B CN 201110297372 A CN201110297372 A CN 201110297372A CN 102446880 B CN102446880 B CN 102446880B
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Abstract
本发明涉及包括插件的半导体模块和用于生产包括插件的半导体模块的方法。通过提供带有金属表面的基底和包括绝缘载体的绝缘衬底来制造功率半导体模块,该绝缘载体具有提供有底金属化层的底侧。提供呈现波浪结构的插件。该插件定位在绝缘载体和金属表面之间,在此之后,金属表面利用焊料被焊接到底侧金属化层和插件,从而用焊料填塞在金属表面和底侧金属化层之间的全部空隙。
Description
技术领域
本发明涉及半导体模块,并且特别地涉及具有插件(insert)的半导体模块。
背景技术
电力电子模块是在电力电子电路中使用的半导体模块。典型地在车辆、轨道和工业应用中,例如在逆变器或者整流器中采用电力电子模块。它们同样以能量生产和传输的形式获得应用。在电力电子模块中包含的半导体部件可以涵盖例如半导体芯片,包括绝缘栅双极晶体管(IGBT)、金属氧化物场效应晶体管(MOSFET)、结型场效应晶体管(JFET)、晶闸管或者二极管。这些半导体芯片在它们的电压和电流应对能力方面可以不同。
在很多半导体模块中,半导体芯片被布置在平坦、金属化陶瓷基绝缘衬底上,因为在典型半导体材料和陶瓷的热膨胀系数之间的差异小于在典型半导体材料和金属的热膨胀系数之间的差异。陶瓷的进一步优点是介电强度和良好的导热性。
为了耗散由半导体芯片产生的废热,在很多模块中,绝缘衬底被焊接到金属基板。然而,由半导体芯片的热循环引起的热机械应力特别是在焊料和衬底之间引起裂纹。因此,存在对于一种改进的半导体模块和对于一种用于生产改进的半导体模块的方法的需要。
发明内容
根据半导体模块的实施例,该模块包括刚性基底、绝缘衬底、功率半导体芯片、插件和焊料。该绝缘衬底包括绝缘载体,该绝缘载体具有提供有顶侧金属化层的顶侧和提供有底侧金属化层的底侧。该功率半导体芯片被布置在顶侧金属化层上。包括带有多个波峰和多个波谷的波浪形状的插件被布置在基底和底侧金属化层之间,使得波峰面向底侧金属化层而波谷面向基底。此外,完全地填充在底侧金属化层和基底之间的全部空隙的焊料被布置在底侧金属化层和基底之间。
根据用于生产半导体模块的方法的实施例,该模块提供有刚性基底、绝缘衬底、功率半导体芯片、插件和焊料。该绝缘衬底包括绝缘载体,该绝缘载体具有提供有顶侧金属化层的顶侧和提供有底金属化层的底侧。该功率半导体芯片被布置在顶侧金属化层上。包括带有多个波峰和多个波谷的波浪形状的插件被布置在基底和底侧金属化层之间,使得波峰面向底侧金属化层而波谷面向基底。该焊料被布置在基底和底金属化层之间。当熔化该焊料时,插件嵌入在焊料中使得该焊料完全地填充在底侧金属化层和基底之间的全部空隙。然后该焊料被冷却下至它的固态。
在阅读以下详细说明时并且在观察附图时,本领域技术人员将会认识到另外的特征和优点。
附图说明
通过参考以下附图和说明,本发明能够被更好地理解。在图中的部件未必按照比例,相反重点在于示意本发明的原理。而且,在图中,类似的引用数字标注对应的部分。在附图中:
图1是通过利用焊料层而被焊接到基板的陶瓷衬底的竖直截面,在该焊料层中嵌入呈现三角波的形状的插件;
图2是通过利用焊料层而被焊接到基板的陶瓷衬底的竖直截面,在该焊料层中嵌入呈现正弦波的形状的插件;
图3是通过利用焊料层而被焊接到基板的陶瓷衬底的竖直截面,在该焊料层中嵌入呈现方波的形状的插件;
图4是呈现三角波的形状的插件的透视图;
图5是呈现正弦波的形状的插件的透视图;
图6是呈现方波的形状的插件的透视图;
图7是呈现交错波列的插件的透视图,其中每一个波列均具有方波的形状;
图8A是通过冲压和挤压平坦金属片生产的插件的顶视图;
图8B是图8A所示的插件的侧视图;
图9A是通过冲压平坦金属片以便实现基本矩形凸耳(lug)并且通过将不同的凸耳弯曲到该金属片的相对侧而生产的插件的顶视图;
图9B是图9A所示的插件的侧视图;
图10A是通过冲压平坦金属片以实现多角的凸耳并且通过将不同的凸耳弯曲到该金属片的相对侧而生产的插件的顶视图;
图10B是图10A所示的插件的侧视图;
图11A是被形成为编织金属丝(wire)织物的插件的顶视图;
图11B是在截面平面E1中图11A所示的插件的竖直截面;
图12A是根据图11A的插件的顶视图,其中金属丝被形成为平坦金属带;
图12B是在截面平面E2中图12A所示的插件的竖直截面;
图13是由相互卡住的纤维形成为平坦衬垫的插件的竖直截面;
图14A是通过在被焊接到金属基底之前的陶瓷衬底的竖直截面,其中插件和焊料被布置在衬底和金属基底之间;
图14B是在将陶瓷衬底焊接到金属基底之后图14A所示的部件的竖直截面;
图14C是图14B所示的布置的放大细节;
图14D是在截面平面E3中图14C所示的布置的截面视图;
图14E是在移除了衬底和焊料时图14B的布置的顶视图;
图15是通过功率半导体模块的竖直截面;
图16是通过带有被设计成热沉的基底的功率半导体模块的竖直截面;
图17是通过其中插件伸出超过衬底的功率半导体模块的竖直截面。
具体实施方式
在以下详细说明中参考附图,附图形成该详细说明的一部分,并且在附图中通过示意方式示出可以在其中实践本发明的具体实施例。在这方面,方向术语诸如“顶”、“底”、“前”、“后”、“首”、“尾”等是参考所描述的图的定向使用的。因为实施例的部件能够被以多种不同的定向定位,所以方向术语是为了示意的意图使用的而绝非加以限制。要理解可以利用其它的实施例并且可以作出结构或者逻辑变化而不偏离本发明的范围。因此,以下详细说明不要被以限制性的意义理解,并且本发明的范围是由所附权利要求限定的。要理解在这里描述的各种示例性实施例的特征可以被相互组合,除非具体地另有指出。
现在参考图1,示意了通过一种组件的竖直截面,该组件包括利用插件3和焊料4被焊接到诸如板或者热沉的基底1的顶侧1t的绝缘衬底2。例如,基底1可以由金属或者金属基质复合材料(MMC)形成。在基底1被配置成热沉的情况下,它可以具有散热片和/或用于接收液体冷却剂的冷却通道的特征。可能的冷却方法包括例如利用空气或者液体冷却剂的流体冷却,或者蒸发冷却。基底1也可以由具有良好导热性的材料制成,诸如例如铜或者铝或者带有这些金属中的至少一种的合金或者包括这样的合金的一种这样的金属。
绝缘衬底2包括绝缘载体20,该绝缘载体20被配置成垫片,该垫片的顶部是作为该垫片的一侧(被标注为顶侧20t)的顶侧金属化层22而底部是在该垫片的相对侧(被标注为底侧20b)的底侧金属化层21。顶侧金属化层22被图案化成能够将诸如例如功率半导体芯片的一个或者多个电子部件紧固到绝缘衬底2并且在适用的情况下被相互电连接的轨道和/或垫片。底侧金属化层21被配置成未图案化金属化层,但是在适用的情况下其也可以被图案化。
金属化层21和22分别地被牢固地结合到绝缘载体20的底侧20b和顶侧20t,绝缘载体20可以例如是适当的陶瓷材料,诸如例如氮化铝(AlN)、氧化铝(Al203)、氮化硅(Si3N4)、碳化硅(SiC)或者氧化铍(BeO)。金属化层21和22由铜制成。绝缘衬底2可以例如是直接铜结合(directcopperbonded,DCB)或者直接铝焊接(directaluminumbrazed,DAB)或者活泼金属焊接(activemetalbrazed,AMB)衬底。可选地,金属化21和/或22和/或插件3可以彼此独立地进一步利用材料银、NiAu、NiPd、NiPdAu中的一种或者多种涂覆以产生可焊接表面或者促进在半导体芯片和顶金属化层22之间的LTJT(低温接合技术)接合。
基底1的接触表面区域1t可以被镀上材料镍、银、金、钯或者铜及其组合中的至少一种的进一步涂层以产生可焊接表面。可以例如通过电镀、溅射或者汽相沉积来产生这些涂层。
插件3呈现带有多个波峰31和波谷32的波浪形状。波峰31和波谷32可以遍布插件3地分布。
为了将绝缘衬底2和插件3焊接到基底1,使用焊料4,该焊料4在焊接期间变得熔融以进入并且完全地填充保持在绝缘衬底2和基底1之间的全部空隙。为了最小化收缩空腔的形成,可以使用真空焊接过程。在焊接过程期间焊料4被加热到的焊料温度可以例如从240℃变化到400℃。
在这种布置中,所使用的焊料的数量可以调整(scale)为稍微地大于完全填塞全部空隙所需要的量。这避免了使得在插件3和基底1的顶侧1t之间的间隔不必要地大,但是仍然足以补偿关于正被焊接的部件的厚度和不规则性的公差。使用如参考图13A到13D解释的方法,焊料通过毛细作用渗透在面向插件3的底侧金属化层21的底侧和面向插件3的基底1的顶表面之间的间隙,从而在该间隙的区域中被转换成薄合金层。
除了别的以外,插件3用于通过竖直分布在焊料中而吸收焊料4中的热机械应力,因此防止焊料4特别是在底侧金属化层21的底侧和焊料之间的界面处脱离,原因在于力不再像在常规的焊料结合中那么强烈地集中在焊料层的边角区域中的界面处。
如将在下面更加详细地解释的,在波峰31和底金属化层21之间的非常短的距离和在波谷32和基底1之间的非常短的距离分别促进了第一区域的形成,该第一区域在波峰31和底金属化层21之间以及在波谷32和基底1之间连续地延伸,并且在底金属化层21、插件3和基底1之间提供密封接合。
图2和3示出如参考图1解释的但是其中插件3呈现不同形状的布置。如在图2中通过举例示出的,插件3的波峰31和波谷32可以被弯曲。根据图3所示的另一示例,插件3可以呈现方波。
图4、5和6分别是在图1、2和3的布置中使用的插件3的透视图。即使所示的插件3是完整的,但是在本发明中使用的任何插件3均可以提供有开口以便促进在焊接过程期间将插件3嵌入于焊料4中。
根据图7所示的进一步示例,插件3可以呈现几个波列。在该示例中,这些波列沿着波列的方向是交错的。相反,所示波列的波是方波,任何其它波形也是可能的。
在是顶视图的图8A中示出插件3的更进一步示例。插件3是通过冲压和挤压和/或压花平坦金属片形成的。在冲压过程中,产生成对地平行延伸的多条划分线51、52。然后,在随后的挤压和/或压花过程中,该金属片的、布置在每一对划分线51、52之间的部分5被变形为使得部分5被从起初平坦的金属片层弯出,由此形成波峰31、波谷32和开口33。在图8B中示出这个插件3的侧视图。
不同于图8A和8B所示的示例,也可以向起初平坦的金属片的相对侧弯曲不同的部分5。
也可以通过冲压和弯曲起初平坦的金属片来生产如例如分别在图9A和10A以及在图9B和10B中的对应侧视图中示出的进一步插件。为此目的,平坦金属片被冲压,由此产生非线性划分线53。这些划分线53中的每一条均限定金属片的部分5。在随后的步骤中,部分5被弯曲以便从起初平坦的金属片层突出。可以沿着通过对应的划分线53的两端的线G实现部分5的弯曲。如特别是从图9B和10B能够看到的,可以向起初平坦的金属片的相对侧弯曲不同的部分5。如也在图9B和10B中示出的,弯曲角度可以是90°。然而,在从大于0°到小于90°的范围中的弯曲角度也可以适用。在此情况下,当插件3被布置在基底1和衬底2之间时并且当在焊接过程期间基底1和衬底2被朝着彼此挤压时,部分5用作接触底侧金属化层21或者基底1的弹簧。
在插件3由箔形成的任何情况下,箔的厚度d3可以例如在从20μm到200μm的范围中,或者在从20μm到100μm的范围中。
在图11A到13中示出针对插件3的可能形状的进一步示例。图11A示出被设计成编织金属丝50的织物的插件3。在图11B中示出插件3在截面平面E1中的横截面视图。如能够看到的,金属丝50可以呈现带有直径D50的圆形横截面。直径D50可以例如在从20μm到200μm的范围中,或者在从20μm到100μm的范围中。
作为对圆形横截面的备选,其它横截面也是适用的。例如,在图12A和在截面平面E2中的、图12B的对应截面视图中示出的金属丝50呈现带有厚度d50的矩形横截面。然而,也可以使用带有任何其它横截面诸如椭圆形横截面的金属丝50。在任何情况下,金属丝50在它的垂直于它的纵向的截面平面中的(最小)厚度d50可以例如在从20μm到200μm的范围中,或者在从20μm到100μm的范围中。
在图13中示出由相互卡住的纤维形成为平坦衬垫的插件3的另一个示例。插件3由相对于彼此非规则排列的多根纤维构成或者包括相对于彼此非规则排列的多根纤维。
现在参考图14A到14D,示意了用于使用起初独立于绝缘衬底2的插件3在绝缘衬底2和基底1(例如用于功率半导体模块的金属基板)之间产生焊料结合的方法。在这种布置中,在焊料4被置放在插件3和金属表面1t之间之后,插件3位于绝缘衬底2的底侧金属化层21和基底1的金属表面1t之间。焊料4能够例如以范围从50μm到500μm或者从50μm到300μm的总厚度D4作为预成型焊料被施加到金属表面1t和/或施加到面向金属表面1t的插件3的底侧,或者焊料4能够作为预制焊盘处于金属表面1t的顶部。
替代预成型焊料4,也可以使用焊膏。例如可以将这样的焊膏施加到基底1的顶侧1t。
通常,所使用的焊料4的总厚度D4是所要求的为了填塞插件3中的空隙而需要的焊料量的函数。在将绝缘衬底2和插件3焊接到基底1的金属表面1t中,焊料嵌入插件3并且完全地填充在底侧金属化层21、金属表面1t和插件3之间的全部空隙。即,在完成焊接过程之后,不存在被气体填充的任何空隙。如以上已经解释的,开口33促进了液体焊料4在插件3的两侧上的传播。
如果使用不带开口33的插件3,则或者要求焊料4围绕插件3的外边缘流动,或者在插件3的两侧上,即,既在插件3和底侧金属化层21之间又在插件3和基底1之间提供焊料4。
通常,调整所施加的焊料4的数量,例如焊盘的厚度,使得在完成焊接过程之后全部空隙均完全被焊料4填充。在焊接(在此期间致使焊料4熔融)期间,绝缘衬底2、插件3、焊料4和基底1每一个被朝着另一个压缩。正是熔融焊料4被驱策到在波峰31和底侧金属化层21之间的薄间隙中以及在波谷32和基底1之间的薄间隙中(在这样的间隙根本存在的情况下)。随后,焊料4被冷却至它的熔点以下。一旦焊料4已固化,它便与绝缘衬底2,插件3和基底1一起形成不受温度变化影响的、如在图14B中所示的固体合成物。如能够从图14B看到的,存在焊料4的、从底侧金属化层21通过开口33(参见图14A)连续地延伸到基底1的部分。由于插件3,在这样的布置的操作期间阻断在焊料4中的裂纹发展。
为了减轻应变,在焊接过程之前,插件3可以例如在高于350℃的温度下退火。
现在参考示出图14B中所示的合成物的放大细节的图14C,焊料4包括第一区域41和第二区域42。每一个第一区域41或者在波峰31和底侧金属化层21之间或者在波谷32和基底1之间连续地延伸。在第一区域41中,焊料4在理想的情况下仅仅由一种或者多种金属间相形成。如果例如焊料4包括锡并且底侧金属化层21和插件3中的至少一个包括铜,则在焊接过程期间,如果足够的(包括在底侧金属化层21中和/或在插件3中的)铜扩散到液体焊料4中就能够形成铜-锡金属间相(例如Cu3Sn、Cu6Sn5)。为了提供足够的铜,并不一定要求插件3包括均匀分布的铜。相反,通过将铜或者包含铜的涂层施加到不包括铜或者仅仅包括很少的铜的本体而生产插件3也是可能的。这样的涂层的厚度可以例如在从2μm到10μm的范围中。
金属间相呈现高于在焊接过程之前焊料4所具有的机械强度并且高于在完成焊接过程之后焊料4在第二区域42中所具有的机械强度的机械强度。如果没有足够的铜能够扩散到流体焊料4中,则区域42的形成发生。该扩散的进展依赖于温度和焊接时间。因此,为了实现第一区域41经受保持焊接温度低和焊接时间短的次要条件,如果在底侧金属化层21和插件3之间(即在底侧金属化层21和波峰31之间)的距离d23以及在基底1和插件3之间(即在基底1和波谷32之间)的距离d13是短的则是有利的。例如,距离d13和d23中的每一个均可以小于20μm。在本发明的意义下,焊料4的区域被视为第一区域41,如果该区域包括一种或者多种金属间相的至少90vol%(体积百分比)。例如,在每一个波峰31和底侧金属化层之间的距离d23可以小于或者等于30μm,例如在从2μm到30μm的范围中,并且在每一个波谷32和基底1之间的距离d31可以小于或者等于30μm,例如在从2μm到30μm的范围中。应该指出,金属间相也靠近底侧金属化层21、基底1和插件3的、包括铜并且与流体焊料4接触的表面发生。通常,如果焊接时间是足够长的,则能够避免第二区域42的形成。
焊接温度可以在从240℃到400℃的范围中,并且例如大于或者等于330℃以便促进金属间相的形成。
作为另外的优点,金属间相的熔点,即在第一区域41中的焊料4的熔点,高于焊料4在焊接过程之前的熔点并且也高于在第二区域42中的焊料4的熔点。例如,如果第一区域41仅仅由铜-锡金属间相形成,则在第一区域41中的焊料4的熔点至少是415℃,这是Cu6Sn5的熔点。因此,第一区域41的存在允许半导体模块在比较高的温度下操作。作为比较,在第二区域(一个或者多个)42中,焊料4呈现显著地低于在第一区域中的焊料4的熔点的熔点。例如,在第二区域42中的熔点可以小于300℃。图14D是在截面平面E3中图14C所示的布置的截面视图,图14E是在移除了衬底2和焊料4时图14B的布置的顶视图。
然后,靠近基底1的焊料可以包括用于补偿公差的焊料沉积物。该沉积物可以通过电镀而被预焊接并且可以呈现在从5μm到30μm的范围中的厚度。
现在参考图15,示意了功率半导体模块100的竖直横截面视图,如上所述,功率半导体模块100包括绝缘衬底2,该绝缘衬底2的底侧金属化层21被使用焊料4和插件3焊接到基底1。模块100进一步包括带有在所有侧面上的电绝缘框架61以及可选的外罩盖62的外罩6。基底1被配置成代表模块100的底外罩壁的金属基板。该基板的厚度可以从0.1mm变化到20mm。
几个功率半导体芯片8被安装在绝缘衬底2的顶侧金属化层22上,这些功率半导体芯片8被例如焊料、导电粘结剂或者银压力烧结结合的结合层81连接到绝缘衬底2。功率半导体芯片8可以例如是可控功率半导体开关,诸如例如MOSFET、IGBT、晶闸管、JFET或者功率二极管。功率半导体芯片8是具有例如超过50A或者75A的高标称电流和/或超过400V的高标称阻断电压的特征的半导体芯片。另外,功率半导体芯片的占地面积可以具有超过5.5乘5.5mm或者7乘7mm的大小。
利用结合线82,功率半导体芯片8的顶部是其带有顶侧金属化层22的部分的电路。替代结合线82,也可以提供例如通过焊接、通过导电粘结剂结合或者银压力烧结结合而被导电连接到芯片8的顶部和/或顶侧金属化层22的金属夹。
为了将功率半导体模块100外部连接到例如电源、负载、控制器等,提供了电端子91、92、93、94,其中的电端子91、92可以被配置成例如实现电源连接并且被电气和/或机械结合到顶侧金属化层22的部分221、222、223、224、225、226。电源端子也可以位于被引线结合到顶侧金属化层22的外罩的框架中。端子93、94可以被配置成例如用于一个或者多个功率半导体芯片8的控制端子,或者被配置成用于输出呈现关于功率半导体模块100状态的信息的信号的输出端子。
功率半导体芯片8的顶部是用于将内部驱动器端子接成电路(circuit)的、可选的印刷电路板(PCB)95。PCB95也可以带有(componentedwith)电子设备以控制功率半导体芯片8的可控芯片。带有控制电子设备的复杂功率半导体模块也被称作“智能”(IPM)。
为了增强介电强度,基底1的底部被可选的罐封化合物51例如硅胶罐封,所述硅胶例如在竖直方向v上从绝缘衬底2延伸到至少超过功率半导体芯片8或者结合线82,例如远至印刷电路板95。罐封化合物51的顶部是可选的刚性罐封化合物52,例如环氧树脂,以将电端子91、92、93、94和92电绝缘以增加机械稳定性。由此,竖直方向v是垂直于绝缘载体20的方向,即,竖直方向v是绝缘载体20的顶侧的表面法线,即它的面向该至少一个功率半导体芯片8的一侧的表面法线。
仍然参考图15,示意了插件3如何可以作为一个整体覆盖绝缘衬底2的底侧金属化层21。通常,任何其它组件—例如如参考以前的图1到15通过举例解释的任何组件—均能够被考虑用于插件3的几何形状。
为了制造功率半导体模块100,在金属表面1t被焊接到底侧金属化层21和被焊接到插件3之前,功率半导体芯片8能够被牢固地结合到顶侧金属化层22。然后,通过将金属表面1t焊接到底侧金属化层21和插件3而形成的合成物能够配备电端子91、92、93、94并且测试所得模块的正确电气运行。当通过测试(testedpositive)时,该模块能够作为一个整体插入于框架61或者模块外罩6中并且然后利用罐封化合物51和52罐封。当这个模块在被插入于框架61或者模块外罩6中以然后关于正确电气运行来测试所得模块之前提供有电端子时是有利的。如果模块测试失败,则在被安装到模块外罩6中之前,该模块能够被正确运行的模块所代替。
在半导体模块100中的基底1和衬底2的操作温度可以在60℃和100℃之间,而存储温度可以典型地处于-40℃和+125℃之间或者处于-40℃和150℃之间。
现在参考图16,示意了针对可能的半导体模块100的进一步示例。这个模块100呈现与图15的模块相同的特征,唯一的不同之处在于基底1被形成为在它的背离衬底2的一侧上带有散热片的热沉。
即使在图15和16的示例中仅仅存在与插件3相组合地利用焊料4被焊接到基底1的一个衬底2,但是在备选模块100中,也可以以与参考以前的图所述的相同的方式将两个或者更多衬底2焊接到公共基底1。
现在参考图17,示例性地示意了插件3也可以横向地突出超过衬底2。特别地,插件3可以在垂直于竖直方向v的任何横向方向上突出超过衬底2。在多于一个衬底2被焊接到相同基底1的情况下,插件3可以在一个或者任何横向方向上突出超过这些衬底2中的任何衬底或者备选地突出超过这些衬底2的子集。
在半导体模块100中,也可以选择性地将插件3放置在衬底2的边缘上或者在有源芯片区域下。在有源芯片区域下面的选择性布置改进了有源区域的热耗散。
通常,在本发明中使用的任何插件3、特别是参考附图1到17通过举例描述的插件3可以呈现以下特征:
插件3的波可以是周期的或者非周期的。在周期结构的情况下,波的周期a可以例如在从100μm到2mm或者从300μm到1mm的范围中(参见图4到7、8A、8B、9B、10B、11B和12B)。
插件3可以由以下材料中的一种或者多种组成或者包括以下材料中的一种或者多种:Cu、Fe、Ni、青铜或者黄铜。
插件的高度h3可以例如是至少100μm,例如在从100μm到1mm的范围中(参见图4、5、6、7、8B、9B、10B、11B、12B、13)。
在波峰31的两个相邻波峰之间的距离d31可以大于或者等于100μm,或者大于或者等于300μm。
此外,距离d31可以小于或者等于2mm,或者小于或者等于1mm。
插件3可以包括铜或者由铜组成,或者包括带有铜和锡的合金,或者由铜和锡的合金组成。
除了别的以外,基底1的材料可以是铜或者铝或者金属基质材料(MMC),诸如AlSiC或者CuMo或者MoAlNi,或者AlC。在铝的情况下,基底1可以被镀有金属,例如铜,该金属与所使用焊料中的一种或者多种成分一起支持金属间相的形成。
底侧金属化层21和/或顶侧金属化层22和/或基底1和/或插件3的表面可以例如通过电镀、溅射或者汽相沉积而被涂覆有其它金属,像Ni、Ag、Au、Cu,以促进焊接或者改进相形成。这样的涂层的厚度可以从100nm变化到20μm。
焊料4,像SnSb5、SnAg3.5、SnAg3.5Cu0.5、SnAg3.5Cu0.7、SnAg20、J、K、L合金,或者SnxAgy、SnxCuy其中x+y=1,或者SnxAgyCuz其中x+y+z=1可以包括相当大数量的锡,以便使得能够在焊接过程期间形成铜锡金属间相。
空间相对术语诸如“下面”、“之下”、“下”、“之上”、“上”等是为了方便说明起见用于解释一个元件相对于第二元件的定位。这些术语旨在涵盖除了不同于在图中描绘的那些的定向的、不同的器件定向。此外,也使用术语诸如“第一”、“第二”等来描述各种元件、区域、部分等,并且也非旨在加以限制。在全部说明中,类似的术语是指类似的元件。
如在这里所使用的,术语“具有”、“含有”、“包含”、“包括”等是表明所述元件或者特征的存在的开放式术语,但是并不排除另外的元件或者特征。冠词“一”、“一个”和“该”旨在包括复数以及单数,除非上下文清楚地另有表明。
记住以上变型和应用范围,应该理解本发明不受前面的说明限制,它也不受附图限制。相反,本发明仅由所附权利要求和它们的法律等价物限制。
Claims (37)
1.一种半导体模块,包括:
刚性基底;
包括绝缘载体的绝缘衬底,所述绝缘载体具有提供有顶侧金属化层的顶侧和提供有底侧金属化层的底侧;
被布置在所述顶侧金属化层上的功率半导体芯片;
冲压或压花金属片插件,所述插件被布置在所述基底和所述底侧金属化层之间并且包括带有多个波峰和多个波谷的波浪形状,所述波峰面向所述底侧金属化层而所述波谷面向所述基底;和
被布置在所述底侧金属化层和所述基底之间的焊料,所述焊料完全地填充在所述底侧金属化层和所述基底之间的全部空隙。
2.根据权利要求1所述的半导体模块,其中所述焊料包括第一区域,每一个所述第一区域均:
按照体积包括至少90%的一种或者多种铜-锡金属间相;并且
或者在所述底侧金属化层和所述波峰之一之间连续地延伸,或者在所述基底和所述波谷之一之间连续地延伸。
3.根据权利要求2所述的半导体模块,其中所述焊料包括第二区域,所述第二区域布置在所述第一区域之外并且呈现低于Cu6Sn5铜-锡金属间相的熔点的熔点。
4.根据权利要求3所述的半导体模块,其中在所述第二区域中所述焊料呈现小于300℃的熔点。
5.根据权利要求1所述的半导体模块,其中在每一个所述波峰和所述底侧金属化层之间的距离小于20μm。
6.根据权利要求1所述的半导体模块,其中在每一个所述波谷和所述基底之间的距离小于20μm。
7.根据权利要求1所述的半导体模块,其中在所述波峰的两个相邻波峰之间的距离大于或者等于100μm。
8.根据权利要求7所述的半导体模块,其中在所述波峰的两个相邻波峰之间的距离大于或者等于300μm。
9.根据权利要求1所述的半导体模块,其中在所述波峰的两个相邻波峰之间的距离小于或者等于2mm。
10.根据权利要求9所述的半导体模块,其中在所述波峰的两个相邻波峰之间的距离小于或者等于1mm。
11.根据权利要求1所述的半导体模块,其中所述插件:
包括铜。
12.根据权利要求11所述的半导体模块,其中所述插件:
由铜组成。
13.根据权利要求1所述的半导体模块,其中所述插件是弯曲和/或挤压和/或压花的金属箔。
14.根据权利要求13所述的半导体模块,其中所述箔的厚度处于从20μm到200μm的范围中。
15.根据权利要求14所述的半导体模块,其中所述箔的厚度处于从20μm到100μm的范围中。
16.根据权利要求1所述的半导体模块,其中所述插件包括多个开口,并且其中所述焊料从所述底侧金属化层通过每一个所述开口连续地延伸远至所述基底。
17.根据权利要求1所述的半导体模块,其中所述基底是具有在从0.1mm到20mm的范围中的厚度的板、或者热沉。
18.根据权利要求1所述的半导体模块,其中所述插件在垂直于所述绝缘载体的顶侧的表面法线的方向上突出所述绝缘载体。
19.根据权利要求1所述的半导体模块,其中所述插件:
包括带有铜和锡的合金。
20.根据权利要求19所述的半导体模块,其中所述插件:
由铜和锡的合金组成。
21.一种用于生产半导体模块的方法,包括:
提供刚性基底;
提供包括绝缘载体的绝缘衬底,所述绝缘载体具有提供有顶侧金属化层的顶侧和提供有底侧金属化层的底侧;
提供功率半导体芯片;
提供冲压或压花金属片插件,所述插件包括带有多个波峰和多个波谷的波浪形状;
提供焊料;
在所述顶侧金属化层上布置所述功率半导体芯片;
在所述基底和所述底侧金属化层之间布置所述插件,使得所述波峰面向所述底侧金属化层而所述波谷面向所述基底;
在所述基底和所述底侧金属化层之间布置所述焊料;
熔化所述焊料,使得所述插件嵌入于所述焊料中并且在所述底侧金属化层和所述基底之间的全部空隙填充有所述焊料;以及
将所述焊料冷却至它的固态。
22.根据权利要求21所述的方法,其中焊接时间、焊接温度、在所述波峰和所述底侧金属化层之间的距离以及在所述波谷和所述基底之间的距离被选择为使得允许在固体焊料中形成第一区域,所述第一区域中的每一个均:
按照体积包括至少90%的一种或者多种铜-锡金属间相;并且
或者在所述底侧金属化层和所述波峰之一之间连续地延伸,或者在所述基底和所述波谷之一之间连续地延伸。
23.根据权利要求21所述的方法,其中在熔化所述焊料的步骤之前,所述插件不被接合到所述底侧金属化层。
24.根据权利要求21所述的方法,其中在将所述焊料冷却至它的固态的步骤期间:
在每一个所述波峰和所述底侧金属化层之间的距离被维持为小于20μm;和/或
在每一个所述波谷和所述基底之间的距离被维持为小于20μm。
25.根据权利要求21所述的方法,其中在所述波峰的两个相邻波峰之间的距离大于或者等于100μm。
26.根据权利要求25所述的方法,其中在所述波峰的两个相邻波峰之间的距离大于或者等于300μm。
27.根据权利要求21所述的方法,其中在所述波峰的两个相邻波峰之间的距离小于或者等于2mm。
28.根据权利要求27所述的方法,其中在所述波峰的两个相邻波峰之间的距离小于或者等于1mm。
29.根据权利要求21所述的方法,其中所述插件:
至少包括铜。
30.根据权利要求29所述的方法,其中所述插件:
由铜组成。
31.根据权利要求21所述的方法,其中所述插件是弯曲和/或挤压和/或压花的金属箔。
32.根据权利要求31所述的方法,其中所述箔的厚度处于从20μm到200μm的范围中。
33.根据权利要求32所述的方法,其中所述箔的厚度处于从20μm到100μm的范围中。
34.根据权利要求21所述的方法,其中所述插件包括多个开口,所述开口在熔化所述焊料的步骤期间被完全地填充有熔化的焊料。
35.根据权利要求21所述的方法,其中在熔化所述焊料的步骤之前,所述插件在大于350℃的温度下退火。
36.根据权利要求21所述的方法,其中所述插件:
包括带有铜和锡的合金。
37.根据权利要求36所述的方法,其中所述插件:
由铜和锡的合金组成。
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