CN102332445A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

Info

Publication number
CN102332445A
CN102332445A CN2011101781419A CN201110178141A CN102332445A CN 102332445 A CN102332445 A CN 102332445A CN 2011101781419 A CN2011101781419 A CN 2011101781419A CN 201110178141 A CN201110178141 A CN 201110178141A CN 102332445 A CN102332445 A CN 102332445A
Authority
CN
China
Prior art keywords
lead
wire
protuberance
island
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2011101781419A
Other languages
English (en)
Other versions
CN102332445B (zh
Inventor
漆畑博可
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Components Industries LLC
Original Assignee
On Semiconductor Trading Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by On Semiconductor Trading Ltd filed Critical On Semiconductor Trading Ltd
Publication of CN102332445A publication Critical patent/CN102332445A/zh
Application granted granted Critical
Publication of CN102332445B publication Critical patent/CN102332445B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/49524—Additional leads the additional leads being a tape carrier or flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04034—Bonding areas specifically adapted for strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/37124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247—Connecting the strap to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48639—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48663—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/48664—Palladium (Pd) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73219—Layer and TAB connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73221—Strap and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73263—Layer and strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83439—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83464—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/842—Applying energy for connecting
    • H01L2224/84201—Compression bonding
    • H01L2224/84205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/842—Applying energy for connecting
    • H01L2224/8421—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/84214—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84399—Material
    • H01L2224/844—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/84463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/84464—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85439—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/85464—Palladium (Pd) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92152—Sequential connecting processes the first connecting process involving a strap connector
    • H01L2224/92157—Sequential connecting processes the first connecting process involving a strap connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92246—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

本发明公开了一种半导体装置及其制造方法。在对金属带进行超声波接合时，为了防止岛部的浮动，利用接合装置的紧固装置，需要按压岛部的周边区域或者设置在岛部周围的支承引脚。然而，随着装置的小型化，在不能确保足够的岛部周边区域的情况下，或者在未设有支承引脚的情况下，存在不能按压岛部侧的问题。在岛部的与引线相对的一边设有以和引线端部相同的高度向引线侧突出的突出部。通过利用紧固装置同时按压突出部和引线端部，在未设有支承引脚或者岛部周围没有按压区域的情况下，也能够防止岛部的浮动。

Description

半导体装置及其制造方法
技术领域
本发明涉及半导体装置及其制造方法，特别涉及具有将半导体元件的电极和引线连接的金属带的半导体装置及其制造方法。
背景技术
参照图9，针对现有的半导体装置100进行说明。图9(A)是半导体装置100的俯视图，图9(B)是表示制造工序的一部分俯视图。
如图9(A)所示，现有的半导体装置100具有岛部101、固定在岛部101上表面的半导体元件103、引线102以及连接半导体元件103和引线102的金属带105，这些构成要素整体进一步被未图示的封装树脂所覆盖。
在半导体元件103的主表面上安装有电极104，金属带105的一端通过超声波接合固定在电极104上，而另一端固定在引线102上，这样，半导体元件103的电极104与引线102电连接。
如图9(B)所示，在该半导体装置100的制造工序中，切割成单个的半导体元件103固定在引线框架110的岛部101上，利用接合装置使电极104与引线102电连接。
即，在通过超声波接合将金属带105接合到电极104之后，将支承用于与引线102接合的金属带105的接合工具(キヤピラリ)向引线102方向移动。此时，为了防止因接合工具的移动而金属带105被拉伸所导致的岛部101的浮动，由接合装置的紧固装置120按压引线102以及连接引线框架110和岛部101的支承引脚115，并将金属带105和引线102固定在一起(例如专利文献1)。
专利文献1：(日本)特开2008-294384号公报
与金属细线相比，由于金属带105的尺寸大且硬度高，因此，在通过超声波接合将金属带105接合到电极104之后，如果将接合工具向引线102方向移动，则金属带105处于拉伸状态，因此造成已固定的岛部101浮动。
岛部101的浮动会引发一些问题，如引线框架110发生变形，为防止半导体元件103与金属带105的接触而山状形成的金属带105的环形部分不能形成合适的形状等。
为了防止岛部101的浮动，利用接合装置的紧固装置120，需要按压位于岛部101侧的支承引脚115(图9(B))，或者直接按压成为配置有半导体元件103的外周的岛部101的端部(周边区域)T。
但是，并不是在所有的引线框架110上都设有支承引脚115。支承引脚115主要是在半导体元件103的芯片尺寸较大的情况下为了维持制造工序中的平衡度而设置的。另一方面，在产品完成后，由于多数情况需要从密封树脂等向外部导出该支承引脚105，因此，考虑到耐湿性等的影响，例如在因芯片尺寸较小而平衡度不会成为问题的半导体元件103上，多数并不设置支承引脚115。
另外，随着半导体装置100(封装尺寸)的小型化发展，如果岛部101与半导体元件103的尺寸接近，那么，由紧固装置120越充分按压半导体元件103的外周，越不能确保岛部101的周边区域T。
为了防止岛部101的浮动，也考虑到真空吸附岛部101背面的方法。但是，在半导体装置100(岛部101)尺寸较小的情况下，难以在接合装置的岛部101的安置面上形成用于真空吸附的小孔。而且，即使形成了小孔，也会因为吸附面积小，吸附力不够，从而难以防止岛部101的浮动。
发明内容
本发明鉴于上述课题而提出。第一，本发明通过如下技术方案解决上述课题，即本发明的半导体装置具备：主表面配置有电极的半导体元件、固定有该半导体元件的岛部、与该岛部分离并相而配置且与所述半导体元件电连接且一部分导出至外部的引线、一端与所述半导体元件的所述电极固定而另一端与所述引线固定的金属带，在所述岛部设有从该所述岛部的与所述引线相对的一边朝向所述引线附近突出的突出部。
第二，本发明通过如下技术方案解决上述课题，即本发明的半导体装置的制造方法具备：通过金属带将配置在岛部主表面的半导体元件的电极和与所述岛部分离并相对配置的引线连接工序，利用紧固装置的凸部按压从所述岛部的与所述引线相对的一边向所述引线的附近突出地设置的突出部，将所述金属带的一端固定在所述电极上，将所述金属带的另一端固定在所述引线上。
通过本发明，能够取得如下效果。
第一，通过在岛部上设置向引线侧突出的突出部，能够利用紧固装置按压突出部，因此，即使在未设有支承引脚或者岛部周围没有按压区域的情况下，也可以防止岛部的浮动。
另外，由于突出部向引线侧突出且被密封树脂完全密封，因此不会露出到外部，因此，能够避免因按压部分露出到树脂端面而引起的半导体装置的耐压、耐湿的恶化。
第二，通过使突出部按照不超过固定金属带的引线前端的方式突出，并且在引线前端也设置引线突出部，可以利用紧固装置的一个凸部来同时按压突出部和引线突出部。
在现有技术中，按压引线的紧固装置一并按压了引线另一端(接近于引线框架外框的区域)，但是，对于接合金属带的引线来说，由于仅靠前述的按压是不够的，因此无法进行稳定的接合。另外，与接合金属带时的作用力相比，由于引线框架的强度较弱，因此成为引线前端(连接部)变形、破损的原因。
在本实施方式中，因为在引线前端(连接金属带的连接部附近)设有引线突出部，并且能够将该引线突出部与岛部的突出部同时按压，所以在引线侧也可以进行稳定的金属带固定。
第三，通过分别在突出部的主表面和利用紧固装置与突出部一起按压的引线端部(引线突出部)上设置金属镀层，可以使突出部与引线突出部的高度相等。可以用一个紧固装置(的凸部)同时按压岛部的突出部和引线突出部。为了防止岛部的浮动，有必要使由紧固装置的凸部按压的突出部与引线前端的高度相同。为了在包括突出部在内的岛部的整个表面上固定半导体元件，在岛部实施有金属镀金，在引线突出部上也以同样的膜厚度形成金属镀层，从而可以使突出部与引线突出部具有相同的高度。
需要说明的是，岛部也可以除突出部以外的部位设置金属镀层。在这种情况下，为了使它们具有相同的高度，引线突出部也不需要金属镀层。但是在突出部附近配置有固定金属细线的其他引线，为了增加接合性，在其他引线前端的金属细线的固定区域实施有金属镀金。
由紧固装置的凸部一并按压的突出部和引线突出部是极小的区域，对按压位置的调整精度要求较严格。即，如果凸部的按压位置发生偏离，则有可能按压其他引线的前端。这种情况下，如果突出部及引线突出部的主表面仍然维持引线框架基体材料(如铜框架)的状态，则它们的高度与实施有金属镀金的其他引线的高度不同，利用紧固装置不能进行充分的按压。
在本实施方式中，通过在岛部的突出部及引线突出部设置与其他引线金属镀层相同膜厚的金属镀层，即使凸部的按压位置偏离到了其他引线，也能够可靠地进行按压。
根据本发明的制造方法，通过由紧固装置的凸部同时按压岛部侧(突出部)和引线侧(引线突出部)，在未设有支承引脚或者岛部周围没有按压区域的情况下，也可以提供一种防止岛部的浮动而固定金属带的半导体装置的制造方法。
附图说明
图1是说明本发明第一实施方式的半导体装置的视图，(A)是俯视图、(B)是主要部分放大图、(C)是剖面图；
图2是说明本发明第二实施方式的半导体装置的俯视图；
图3是说明本发明第三实施方式的半导体装置的俯视图；
图4是用于说明本发明的半导体装置的制造方法的俯视图；
图5是用于说明本发明的半导体装置的制造方法的俯视图；
图6是用于说明本发明的半导体装置的制造方法的俯视图；
图7是用于说明本发明的半导体装置的制造方法的剖面图；
图8(A)～(C)是用于说明本发明的半导体装置的制造方法的俯视图；
图9(A)、(B)是用于说明现有技术的俯视图。
附图标记说明
1 半导体装置；10 引线框架；11，11A，11B 第一引线；12，12A，12B 第二引线；13 第三引线；14 岛部；15 突出部；16 引线突出部；20 半导体元件；21，21A，21B 金属带；17，17A，17B 连接部；18，18A，18B 连接部；30 金属镀层；31，31A，31B 金属镀层；32，32A，32B 金属镀层；33，33A，33B 金属镀层；50 紧固装置；51 第一凸部；52 第二凸部。
具体实施方式
参照图1至图8，详细说明本发明的实施方式。图1是表示第一实施方式的半导体装置1的视图，图1(A)是半导体装置1的俯视图，图1(B)是图1(A)主要部分的放大图，图1(C)是图1(A)的a-a线的剖面图。
如图1(A)所示，半导体装置1具有半导体元件20、岛部14、第一引线11、第二引线12、第三引线13、突出部15、金属带21和密封树脂24。
作为半导体元件20，可以采用MOSFET(Metal-Oxide SemiconductorField Effect Transistor，金属氧化物半导体场效应晶体管)、双极晶体管、IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极型晶体管)、IC、二极管等。这里，以作为半导体元件20采用MOSFET为例进行说明。在半导体元件20的主表面(上表面)设有源极电极25和栅极焊盘电极26，而在另一主表面(下表面)上设有漏极电极(未图示)。另外，作为半导体元件20，如果采用双极晶体管，则在半导体元件20的主表面设有基极电极和发射极电极，而在下表面设有集电极电极。
半导体元件20的源极电极25经由金属带21与第一引线11电连接。金属带21是例如铝(Al)带，一端与半导体元件20的源极电极25固定，而另一端与第一引线11的连接部17固定。而且，半导体元件20的栅极电极26经由金属细线22与第二引线12连接。
如果半导体元件20为分立式晶体管，则第一引线11、第二引线12及与岛部14背面连续的第三引线13作为外部连接端子发挥作用。作为一个实例，当作为半导体元件20采用MOSFET时，则第一引线11与源极电极25连接，第二引线12与栅极电极26连接，岛部14与漏极电极连接。
岛部14以及第一引线11、第二引线12、第三引线13通过将由铜或以铜为主成分的合金材料构成的引线框架基体材料经过蚀刻或冲剪加工而设置。作为一个实例，岛部14比其上表面所安装的半导体元件20大少许，第一引线11、第二引线12与岛部14分离并相向配置，第一引线11、第二引线12的一端位于岛部14附近，而另一端从密封树脂24露出到外部。接近于第一引线11的岛部14的一端成为宽幅的连接部17。第三引线13的一端与岛部14连接，而另一端从密封树脂24导出至外部。在岛部14的一部分设有突出部15，在连接部17的一部分设有引线突出部16。
从密封树脂24的侧面露出至外部的第一引线11、第二引线12、第三引线13的另一端被加工成折弯。第一引线11、第二引线12的前端至岛部14的高度与第一引线11、第二引线12的另一端至岛部14的高度相同(图1(C))。即，岛部14的主表面Sf1和与该岛部14相对设置的第一引线11、第二引线12一端的主表面Sf2、Sf3大体处于同一平面上。
再次参照图1(A)，金属带21是由厚度例如为0.1mm左右、宽度10mm左右的导电材料构成的带状配线材料，该导电材料由铝或以铝为主成分的合金材料构成。金属带21与诸如将金属板冲压加工而得到的金属连接板(将芯片与引线电连接的导电板)相比，厚度较薄，金属带21作为长带状的材料提供到接合装置，从接合工具提供所需要长度后被切断。即，金属带21与普通的金属细线一样，可以形成诸如山状的接合环形部分(ボンデイングル一プ)以连接半导体元件20和第一引线11。金属带21的一端通过超声波接合与半导体元件20的由铝材形成的源极电极25连接。作为金属带21的接合方式，也可以采用激光接合。
金属带21的另一端通过超声波接合固定在引线框架基体材料的铜露出的第一引线11端部的连接部17上。
金属引线21与直径0.5mm左右的金属细线相比，相对于电流流动方向的截面积较大，因此，通过采用金属带21，可以降低连接装置的电阻，增大电流容量。例如，当作为半导体元件20采用MOSFET时，源极电极25经由金属带21与第一引线11连接，由此可以降低导通电阻。
并且，由于金属带21与半导体元件20及第一引线11进行面接合，所以易于传导热，将半导体元件20所产生的热经由金属带21及第一引线11可以很好地传导到外部而进行散热。
密封树脂24具有将半导体元件20、金属带21、金属细线22、第一引线11、第二引线12、岛部14等一并覆盖而机械地支承整体的功能。作为密封树脂24的材料，可由热硬化性树脂或者热塑性树脂构成，为了提高散热性，也可以混入粒子状或纤维状的填充物。
图1(B)是表示突出部15附近的主要部分放大图。在本实施方式中，在岛部14上设有与之相连接的突出部15。突出部15与岛部14同时形成，突出部15被设置为从岛部14的与第二引线12相对的一边朝向第二引线12的连接部18附近部分地突出。突出部15的前端达到超过第一引线11的与岛部14相对的一边的延长线L(虚线)的位置。
而且，在第一引线11的连接部17的前端部也设有与之相连接的引线突出部16，引线突出部16从连接部17的前端部开始，在连接部18与岛部14之间按照沿着相对的岛部14一边与之平行地延伸的方式，一直形成到连接部18的前端及突出部15的前端附近。此时，与以往相比，第二引线12前端的连接部18向离开岛部14的方向后退，加大双方之间的距离，由此保证配置突出部15和引线突出部16的空间。即，第二引线12和岛部14之间的间隔大于第一引线11和岛部14之间的间隔。岛部14及突出部15、连接部17及引线突出部16、第一引线11的连接部18这三者之间的距离为优选在将一块板厚度相同的引线框架材料加工而形成时以最小设计尺寸分离而形成。
在岛部14的整个表面、突出部15的表面、第二引线12的连接部18的表面以及引线突出部16的表面中图示阴影所表示的位置上，利用电镀法，设有厚度为3μm～10μm的、诸如由银(Ag)形成的金属镀层30，31，32，33。但是，在选择银作为金属镀层时，考虑到与金属(Al)带21的接合强度这一点，在固定金属带21的连接部17表面上不形成金属镀层32。在使用钯(Pd)代替Ag时，也可以包含连接部17的表面在内设置金属镀层，在这种情况下，金属带21在连接部17固定在Pd镀层上。
如图1(C)所示，半导体元件20的下表面经由焊料、Ag膏等导电性固定材料固定在岛部14的主表面上。在此，如果半导体元件20的下表面不作为电极工作，则半导体元件20也可以经由以环氧树脂等为主材料的绝缘性固定材料19固定在岛部14的主表面上。
第一引线11、第二引线12、第三引线13按照岛部14及连接部17，18埋设于树脂24内部的方式被加工成弯曲状。岛部14的主表面Sf1与突出部15的表面、连接部17的表面及引线突出部16的表面Sf2、再加上第二引线12的连接部18的表面Sf3分别形成为具有同一高度H。如果考虑了由Ag形成的金属镀层30，31，32，33的膜厚度，则突出部15、引线突出部16、连接部18的高度相同，即处于同一平面上，未设有金属镀层32的连接部17表面的高度降低了相当于金属镀层32的膜厚的大小。
金属带21最初通过超声波接合连接在半导体元件20的源极电极25上，接着通过接合工具形成如同图所示的环形形状，同时带状接合在第一引线11的连接部17的表面上。此时，在将金属带21固定在半导体元件20的电极25(源极电极25)和第一引线11上时，接合装置的紧固装置(的凸部)按压如图1(B)所示的单点划线所画出的包括突起部15的按压区域P。这样，在接合金属带21时，可以防止岛部14的浮动。
在本实施方式中，即使在岛部14侧未设有支承引脚115或者没有由紧固装置按压岛部周边区域P(参照图9)的足够多的部分，也可以通过向第一引线11侧突出的突出部15按压岛部14。
而且，通过在突出部15附近设置从金属带21的另一端所连接的第一引线11的前端朝向突出部15的引线突出部16，可以利用按压突出部15的紧固装置的凸部同时按压引线突出部16。因此，由于能够牢靠地固定第一引线11的连接部17，所以可以防止从接合工具施加于金属带21的超声波振动能量的流失，在第一引线11侧也可以稳定地固定金属带21。如果金属带21的接合性足够，则采用只设有突出部15的结构，可以放弃引线突出部16。
如果只是以防止岛部14的浮动为目的，那么在突出部15的表面或者引线突出部16的主表面上不需要设置金属镀层31，32。但是，考虑到接合的金属细线(例如金(Au)丝)22的接合性，在与突出部15和引线突出部16接近配置的第二引线12的连接部18表面上需要设置金属镀层33(阴影)。因此，优选在接近连接部18的突出部15和引线突出部16的表面上也设置金属镀层31，32。
下面，对此进行说明。
再次参照图1(B)，紧固装置的凸部一并按压配置有突出部15和引线突出部16的按压区域P(单点划线部分)。该区域为极小，对于凸部的位置调整精度要求非常严格。即，如果凸部的按压位置偏离，则也有可能按压诸如第二引线12的前端。在这种情况下，如果突出部15及引线突出部16的主表面仍然维持引线框架基体材状(例如，铜框架)的状态，则它们的高度与设有金属镀层33的第二引线12前端的高度不同，导致凸部的按压不充分。
在本实施方式中，在岛部14的突出部15和引线突出部16上，分别设有与第二引线12的金属镀层33的膜厚相等的金属镀层31，32，从而即使凸部的按压位置偏离到金属细线用的第二引线12上，也可确保可靠的按压。
需要说明的是，当采用钯pd作为金属镀层时，由于与金属(Al)带21的接合性、与金属(Au)细线的接合性以及与半导体元件20的接合性都可以得到足够的强度，所以可以在包括连接部17的主要部分的整个面上设置金属镀层。总之，对连接部18和突起部15(根据情况有时也包括引线突出部16)实施金属镀层，以便在考虑了表面上所设置的金属镀膜的厚度后，连接部18的高度和突起部15的高度未形成台阶而维持一定的高度。
需要说明的是，虽然在实例中表示了金属带21的另一端所连接的第一引线11向外部导出的引脚为一个的例子，但是也可以从一个连接部17导出多个引脚。
参照图2及图3，针对其他的实施方式进行说明。图2是表示本发明的第二实施方式的俯视图，图3是表示本发明的第三实施方式的俯视图。
图2是在一个树脂24内搭载有两个半导体元件20A，20B的例子。
分别设有突出部15A，15B的岛部14A，14B的主表面上固定有半导体元件20A，20B。分别与岛部14A，14B相对而配置有第一引线11A，11B。分别在第一引线11A、11B的前端设有引线突出部16A，16B。在突出部15A，15B以及引线突出部16A，16B的主表面上分别设有相同膜厚度的金属镀层31A，31B，32A，32B。
金属带21A，21B连接到半导体元件20A，20B和与之分别对应的第一引线11A，11B。
还有，在岛部14A，14B上分别对应地设有第二引线12A，12B。在第二引线12A，12B的连接部18A，18B上分别设有金属镀层33A，33B，通过金属细线22A，22B与半导体元件20A，20B连接。
如上所述，在一个封装内设有多个金属带21A，21B的情况下，与一个金属带21A(21B)对应而设有一个突出部15A(15B)。这是因为对每一组进行金属带21A，21B的接合。即，在第一组(图2的左侧)的半导体元件20A和第二引线12A上固定金属带21A时，所对应的突出部15A、引线突出部16A被紧固装置的凸部按压。之后，在第二组(图2的右侧)的半导体元件20B和第二引线12B上固定金属带21B时，所对应的突出部15B、引线突出部16B被紧固装置的凸部按压。
图3表示在图2的结构的基础上将两个半导体元件20A，20B形成在一个芯片上的结构。除了在一个岛部14上设有两个突出部15A，15B以外，其他的结构与图2相同。作为岛部14上的半导体元件20，既可以在一个芯片(共用基板)上形成两个例如MOSFET元件区域，也可以是两个芯片，无论哪种情况，连接金属带21A，21B的半导体元件20表面的电极(例如源极电极)25A，25B为两个。
即，即使在这种情况下，在一个封装(密封树脂24)内，与一个金属带21A(21B)对应而设有一个突出部15A(15B)。
接着，参照图4至图8，说明以图3所示结构为例的半导体装置的制造方法。
图4表示引线框架10的一部分。
首先，准备规定形状的引线框架10。引线框架10是诸如板厚150μm左右的由铜或铜合金材料等形成的板状材料，引线框架10的外形为长方形，在后述的所希望位置上有选择地形成金属镀层(用阴影表示)。
通过对引线框架基体材料实施蚀刻或冲剪加工，在框状的外框40内部形成有多个单元42，在此，单元42是指构成(由一个密封树脂24密封)一个半导体装置1的要素单位，在这里作为一个实例，表示图3所示的半导体装置1的引线框架10。在图4中，作为一个实例，表示有与画框状的外框40连接的6个单元42。需要说明的是，在图4中，为便于说明，表示了结构相互不同的多个单元42，但是在下面的说明中对于所有单元42进行了同样的设置。
一个单元42由一个岛部14、第一引线11A，11B、第二引线12A，12B、第三引线13构成。岛部14的大小为在其主表面上可以搭载半导体元件20的程度。第一引线11A，11B、第二引线12A，12B的一端接近岛部14并相对配置，而另一端与外框40连接。而且，第三引线13的一端与岛部14连接，而另一端与外框连接。接着，通过对接近岛部14的第一引线11A，11B的端部部分地进行扩幅，形成了连接部17A，17B。
在岛部14的与第一引线11A，11B相对的一边，朝向该第一引线11A，11B方向设有突出部15A，15B。而且，在第一引线11A，11B的端部，设有朝向突出部15A，15B方向突出的引线突出部16A，16B。
在形成岛部14及第一引线11A等之前有选择地形成的金属镀层为如下所述，即在岛部14的整个表面形成有金属镀层30，在突出部15A，15B的主表面也形成有金属镀层31A，31B。进而，在引线突出部16A，16B的主表面以及第二引线12A，12B的连接部18A，18B的主表面也分别形成有金属镀层32A，32B，33A，33B。需要说明的是，在第一引线11A，11B的连接部17A，17B露出铜的引线框架基体材料。金属镀层30，31A，31B，32A，32B，33A，33B的厚度均相等，例如2μm～10μm(参照单元42A)。
然后，在岛部14的上表面通过固定材料(未图示)安装半导体元件20(参照单元42B)。如上所述，作为半导体元件20，可以采用MOSFET、双极晶体管、IGBT、IC、二极管等，在这里，作为一个实例，采用MOSFET作为半导体元件20，在上表面设置源极电极25A，25B以及栅极焊盘电极26A，26B，在背面形成漏极电极。进一步详细地讲，在半导体元件20中，诸如在共用基板(即一个芯片)上，在俯视时，左右并排形成有两个MOSFET的元件区域，在左侧的元件区域上设有与之相连接的源极电极25A和栅极焊盘电极26A，在右侧的元件区域上设有与之相连接的源极电极25B和栅极焊盘电极26B。或者，两个基板(两个芯片)的半导体元件20A，20B也可以被安装在一个岛部14上。
在以下，将半导体元件20的俯视时的左边源极电极25A一侧称为一次侧，右边源极电极25B一侧称为二次侧。
作为固定材料，当半导体元件20的背面作为电极使用时，使用焊料、导电性Ag膏等导电性固定材料。另一方面，当半导体元件20的背面不作为电极使用时，也可以使用环氧树脂等绝缘性接合材料作为固定材料。
参照图5至图8，说明其后的接合工序。为了利用接合装置(未图示)进行引线接合，需要在接合装置的操作台(未图示)上定位引线框架。
此时，设置于操作台上方的紧固装置50将引线框架10的一部分按压在操作台表面上。然后，半导体元件20的电极经由金属带21A，21B与第一引线11A，11B连接。
参照图5至图7，对紧固装置50进行说明。这些图表示紧固装置50的结构，图5是从岛部14的半导体元件的安装面(主表面Sf1)侧看到的俯视图，图6是表示设置在紧固装置50上的凸部的图案的俯视图。图7是图6的b-b线剖面图，省略了岛部14上的半导体元件。另外，在这些图中，如图5的单元42所示，在所有的单元42上都安装有半导体元件20。
在图5和图6中用一个区域B表示了一并按压六个单元42的紧固装置50。在图5中左侧的三列单元42为第一区域B1，固定有半导体元件20的一次侧的源极电极25A与第一引线11A，而在右侧的三列单元42为第二区域B2，同样固定有半导体元件20的二次侧的源极电极25B与第一引线11B。
在第一区域B1的紧固装置50上，至少形成有露出一次侧的源极电极25A和第一引线11A的第一开口OP1，从紧固装置50上方经由第一开口OP1进行接合。在紧固装置50的与引线框架10的突出部15A及引线突出部16A重叠的位置，设有朝向引线框架10方向突出的第一凸部51(阴影)(参照图6及图7)。
在第二区域B2的紧固装置50上，至少形成有露出二次侧的源极电极25B和第一引线11B的第二开口OP2，从紧固装置50上方经由第二开口OP2进行接合。在紧固装置50的与引线框架10的突出部15B及引线突出部16B重叠的位置，设有朝向引线框架10方向突出的第二凸部52(阴影)(参照图6及图7)。
需要说明的是，如图6及图7所示，第一引线11A，11B、第二引线12A，12B的另一端与第三引线13的另一端被宽幅的第三凸部53一并按压。而且，在所述接合装置的操作台的表面设有台阶，以便与经过弯曲加工的引线框架10的背面抵接。即，设置岛部14、突出部15A，15B以及第二引线12A，12B的前端部分的操作台表面的高度高于设置第一引线11、第二引线12以及第三引线13的操作台的表面的高度。第一、第二凸部51，52与第三凸部53的高度也被设有适于所述引线框架经过弯曲加工所产生的台阶的高度差。
参照图8，针对金属带21A，21B的接合工序进行说明。图8(A)是表示第一区域B1和第二区域B2的一部分的俯视图，图8(B)是表示在第一区域B1中第一凸部51按压突出部15A和引线突出部16A时的放大图，图8(C)是表示在第二区域B2中第二凸部52按压突出部15B和引线突出部16B时的放大图。
如果利用紧固装置50按压引线框架10，则在第一区域B1中第一凸部51同时按压一次侧的突出部15A和引线突出部16A，在第二区域B2中第二凸部52同时按压二次侧的突出部15B和引线突出部16B。因为突出部15A和引线突出部16A以及突出部15B和引线突出部16B分别形成为同一高度，进而在主表面形成了相同厚度的金属镀层31A，32A，31B，32B，所以能够利用第一凸部51及第二凸部52可靠地按压。假如，即使第一凸部51或者第二凸部52因位置偏离而同时按压了连接部18A，18B，由于两者之间没有高度差，所以也不会减少施加于突出部15或者引线突出部16的按压力。从紧固装置50以例如4升/分的速度吹入作为惰性气体的氮气。
在这种状态下，向半导体元件20的一次侧移动用于支承金属带21A的接合工具(未图示)，通过超声波接合将金属带的一端结合在源极电极25A上。之后，按照形成所希望的诸如山状的接合环形部分的方式移动接合工具，通过超声波接合将金属带的另一端固定在第一引线11A的连接部17A上，然后切断金属带21A。由于连接部17A未设有金属镀层，露出了引线框架基体材料(铜)，所以保持与金属带21A的良好的连接性。
此时，第一凸部51可靠地按压一次侧的突出部15A和引线突出部16A，因此，即使在未设有支承引脚或者岛部周围没有按压区域的情况下，也可以防止在将金属带21A接合到源极电极25A之后将接合工具向第一引线11A方向移动时的岛部14的浮动。而且，对连接部17A而言，可以用引线突出部16A按压连接部17A附近，并且在第一凸部51和第三凸部53的两个位置固定第一引线11A，因此，不会流失来自所述接合工具的超声波能量，将全部的超声波能量施加到接合部，从而得到可靠的接合。
接合完半导体元件20的一次侧的金属带21A后，水平移动引线框架10，与一次侧同样，对该半导体元件20的二次侧的金属带进行接合。即，在开口OP2处露出已经固定有一次侧金属带21A的半导体元件20，进行二次侧的接合。
向半导体元件20的二次侧移动用于支承金属带21B的接合工具(未图示)，通过超声波接合将金属带21B的一端接合在源极电极25B上。之后，按照形成所希望的诸如山状的接合环形部分的方式移动接合工具，将金属带21B的另一端固定在第一引线11B的连接部17B上，然后切断金属带21B。
此时，第二凸部52可靠地按压二次侧的突出部15B和引线突出部16B，因此，可以防止在将金属带接合到源极电极25B之后将接合工具向第一引线11B方向移动时的岛部14的浮动。
需要说明的是，对于一个区域B的各个单元42，一并进行一次侧的金属带的接合与二次侧的金属带的接合。
进而，接合完金属带21A，21B的引线框架下一步被移送到金属细线的引线接合装置，利用已知的方法，如图1所示，将一次侧的栅极焊盘电极26A与第二引线12A用金属细线(如Au细线)22连接，将二次侧的栅极焊盘电极26B与第二引线12B也同样用金属细线22连接，金属细线利用诸如基于热压接的球焊进行连接。该金属细线22从半导体元件20的栅极焊盘电极26B跨越突出部15和引线突出部16的上方接合在第二引线12的连接部18上。
之后，按照覆盖半导体元件20等的方式，使用模具进行树脂密封。该模具由上模与下模构成，通过将上下模对接来形成注入密封树脂的型腔。作为树脂密封的方法，可以采用传递模塑法或注入模塑法或接合法。作为树脂材料，采用环氧树脂等热硬化性树脂时使用传递模塑，采用聚酰亚胺树脂、聚亚苯硫醚等热可塑性树脂时使用注入模塑法。
本工序采用已知的方法，省略图示进行说明。在型腔内收纳上表面安装有半导体元件20的岛部14和第一引线11A，11B、第二引线12A，12B的端部，然后通过模具所具有的浇口向型腔内注入密封树脂，对岛部14、半导体元件20、金属带21A，21B以及第一引线11A，11B、第二引线12A，12B进行树脂密封，同时对设置在引线框架10的各个单元42一并进行树脂密封。
向型腔内注入完树脂后，从模具中取出树脂密封体。另外，作为密封树脂采用热硬化性树脂时，还需要进行加热硬化的工序。
然后，通过冲剪加工，从引线框架10分离各单元42，将被分离的半导体装置1安装在例如安装基板上。另外，为了防止露出于外部的第一引线11A等氧化，通过焊料镀覆等的镀膜覆盖表面。通过以上的工序，能够制造出图1所示的半导体装置1。

Claims (12)

1.一种半导体装置，其特征在于，具有：
半导体元件，在其主表面配置有电极；
岛部，其固定有该半导体元件；
引线，其与该岛部分离并相对配置，与所述半导体元件电连接，一部分导出到外部；
金属带，其一端与所述半导体元件的所述电极固定，而另一端与所述引线固定；
在所述岛部设有从所述岛部的与所述引线相对的一边向所述引线附近突出的突出部。
2.如权利要求1所述的半导体装置，其特征在于，所述突出部的前端在俯视时超过所述引线的与所述岛部相对的一边的延长线。
3.如权利要求1或2所述的半导体装置，其特征在于，在所述突出部的主表面与所述引线部的端部的主表面分别设有金属镀层。
4.如权利要求3所述的半导体装置，其特征在于，在所述引线上设有朝向所述突出部方向突出的引线突出部，所述金属镀层设置在所述引线突出部上。
5.如权利要求1至4中任一项所述的半导体装置，其特征在于，在所述突出部附近配置有引线，该引线的主表面设有金属镀层并固定有金线。
6.如权利要求1至5中任一项所述的半导体装置，其特征在于，具有其他金属带、固定该其他金属带的其他引线以及对应于所述其他金属带设置在所述岛部上的其他突出部。
7.一种半导体装置的制造方法，具备通过金属带将配置在岛部主表面的半导体元件的电极和与所述岛部分离并相对配置的引线连接的工序，其特征在于，利用紧固装置的凸部按压从所述岛部的与所述引线相对的一边向所述引线附近突出地设置的突出部，将所述金属带的一端固定在所述电极上，将所述金属带的另一端固定在所述引线上。
8.如权利要求7所述的半导体装置的制造方法，其特征在于，所述凸部同时按压所述突出部和所述引线的端部。
9.如权利要求8所述的半导体装置的制造方法，其特征在于，在所述引线的端部设有朝向所述突出部方向突出的引线突出部，所述凸部按压该引线突出部。
10.如权利要求7至9中任一项所述的半导体装置的制造方法，其特征在于，通过超声波接合将所述金属带接合在所述电极上。
11.如权利要求7至10中任一项所述的半导体装置的制造方法，其特征在于，具有通过其他金属带将所述岛部上的其他电极和与该岛部相对的其他引线连接的工序，
利用紧固装置的其他凸部按压从所述岛部的与所述其他引线相对的一边向所述其他引线附近突出地设置的其他突出部，将所述其他金属带的一端固定在所述其他电极上，而将所述其他金属带的另一端固定在所述其他引线上。
12.如权利要求11所述的半导体装置的制造方法，其特征在于，在所述其他引线端部设有朝向所述其他突出部方向突出的其他引线突出部，所述其他凸部同时按压所述其他突出部和所述其他引线突出部。
CN201110178141.9A 2010-06-29 2011-06-29 半导体装置及其制造方法 Active CN102332445B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010148092A JP2012015202A (ja) 2010-06-29 2010-06-29 半導体装置およびその製造方法
JP2010-148092 2010-06-29

Publications (2)

Publication Number Publication Date
CN102332445A true CN102332445A (zh) 2012-01-25
CN102332445B CN102332445B (zh) 2015-06-03

Family

ID=45351744

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110178141.9A Active CN102332445B (zh) 2010-06-29 2011-06-29 半导体装置及其制造方法

Country Status (3)

Country Link
US (1) US8399970B2 (zh)
JP (1) JP2012015202A (zh)
CN (1) CN102332445B (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103779311A (zh) * 2012-10-17 2014-05-07 瑞萨电子株式会社 半导体装置及其制造方法
CN104821300A (zh) * 2014-01-31 2015-08-05 株式会社东芝 半导体装置及其制造方法
CN108987352A (zh) * 2017-05-30 2018-12-11 英飞凌科技股份有限公司 具有连接在载体层级处的部件的封装
CN111199944A (zh) * 2018-11-16 2020-05-26 富士电机株式会社 引线框架、半导体装置以及半导体装置的制造方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI453831B (zh) 2010-09-09 2014-09-21 台灣捷康綜合有限公司 半導體封裝結構及其製造方法
US9589929B2 (en) 2013-03-14 2017-03-07 Vishay-Siliconix Method for fabricating stack die package
US9966330B2 (en) 2013-03-14 2018-05-08 Vishay-Siliconix Stack die package
US9385070B2 (en) * 2013-06-28 2016-07-05 Delta Electronics, Inc. Semiconductor component having a lateral semiconductor device and a vertical semiconductor device
DE112014007018B4 (de) * 2014-10-03 2021-04-29 Mitsubishi Electric Corp. Leiterrahmen und Verfahren für eine Fertigung einer Halbleitervorrichtung
US20230292445A1 (en) * 2016-07-28 2023-09-14 Landa Labs (2012) Ltd Application of electrical conductors to an electrically insulating substrate
EP4231345A1 (en) * 2022-02-22 2023-08-23 Infineon Technologies Austria AG Power semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5666009A (en) * 1993-05-25 1997-09-09 Rohm Co. Ltd. Wire bonding structure for a semiconductor device
CN1194464A (zh) * 1997-03-21 1998-09-30 罗姆股份有限公司 引线框及用此引线框来制造半导体器件的方法
CN101295687A (zh) * 2007-04-27 2008-10-29 株式会社瑞萨科技 半导体器件

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61206247A (ja) * 1985-03-11 1986-09-12 Toshiba Corp 半導体装置用リ−ドフレ−ム
JPH0736436B2 (ja) * 1987-03-04 1995-04-19 サンケン電気株式会社 絶縁物封止型半導体装置
JPH0265148A (ja) * 1988-08-30 1990-03-05 Nec Corp 熱圧着ワイヤボンディング方法
JPH0587965U (ja) * 1992-04-30 1993-11-26 ミツミ電機株式会社 半導体装置
JP3707926B2 (ja) * 1998-03-31 2005-10-19 ローム株式会社 リードフレーム、半導体装置および半導体装置の製造方法
JP2003338520A (ja) * 2002-05-21 2003-11-28 Mitsubishi Electric Corp 半導体装置およびワイヤボンディング装置
JP2006066622A (ja) 2004-08-26 2006-03-09 Denso Corp ヒートシンク付き多連リードフレーム
JP4844400B2 (ja) * 2007-01-09 2011-12-28 富士ゼロックス株式会社 情報処理装置、情報収集装置、情報収集システム及びプログラム
US20090189261A1 (en) * 2008-01-25 2009-07-30 Lay Yeap Lim Ultra-Thin Semiconductor Package
JP5467799B2 (ja) * 2009-05-14 2014-04-09 ルネサスエレクトロニクス株式会社 半導体装置
US8378467B2 (en) * 2009-09-08 2013-02-19 Panasonic Corporation Semiconductor device and method of manufacturing the same
US20110163432A1 (en) * 2009-11-26 2011-07-07 Panasonic Corporation Semiconductor device and method of manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5666009A (en) * 1993-05-25 1997-09-09 Rohm Co. Ltd. Wire bonding structure for a semiconductor device
CN1194464A (zh) * 1997-03-21 1998-09-30 罗姆股份有限公司 引线框及用此引线框来制造半导体器件的方法
CN101295687A (zh) * 2007-04-27 2008-10-29 株式会社瑞萨科技 半导体器件

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103779311A (zh) * 2012-10-17 2014-05-07 瑞萨电子株式会社 半导体装置及其制造方法
CN103779311B (zh) * 2012-10-17 2018-01-02 瑞萨电子株式会社 半导体装置
CN104821300A (zh) * 2014-01-31 2015-08-05 株式会社东芝 半导体装置及其制造方法
CN108987352A (zh) * 2017-05-30 2018-12-11 英飞凌科技股份有限公司 具有连接在载体层级处的部件的封装
CN108987352B (zh) * 2017-05-30 2023-10-20 英飞凌科技股份有限公司 具有连接在载体层级处的部件的封装
CN111199944A (zh) * 2018-11-16 2020-05-26 富士电机株式会社 引线框架、半导体装置以及半导体装置的制造方法

Also Published As

Publication number Publication date
CN102332445B (zh) 2015-06-03
JP2012015202A (ja) 2012-01-19
US20110316135A1 (en) 2011-12-29
US8399970B2 (en) 2013-03-19

Similar Documents

Publication Publication Date Title
CN102332445A (zh) 半导体装置及其制造方法
US8212361B2 (en) Semiconductor die package including multiple dies and a common node structure
TW560032B (en) Lead frame, method for manufacturing the same, resin-encapsulated semiconductor device and method for manufacturing the same
TWI447876B (zh) 利用引導框及晶片之半導體晶粒封裝及其製造方法
CN101136380B (zh) 具有多条散热通道的半导体封装结构及其制造方法
CN1790697B (zh) 强大的功率半导体封装
JP2972096B2 (ja) 樹脂封止型半導体装置
CN101073152B (zh) 具有下置引脚的电子封装和方法
JPH0864634A (ja) 半導体装置およびその製造方法
US20090189261A1 (en) Ultra-Thin Semiconductor Package
JP2001015679A (ja) 半導体装置及びその製造方法
US20100181628A1 (en) Semiconductor device
US8604627B2 (en) Semiconductor device
KR101644913B1 (ko) 초음파 용접을 이용한 반도체 패키지 및 제조 방법
JPS60167454A (ja) 半導体装置
JP2009277949A (ja) 半導体装置とその製造方法
US10840172B2 (en) Leadframe, semiconductor package including a leadframe and method for forming a semiconductor package
JPH11177007A (ja) トランジスタパッケージ
US20230245994A1 (en) Method of manufacturing semiconductor devices and corresponding semiconductor device
JPH0927583A (ja) 半導体集積回路装置およびその製造方法
JPS63107126A (ja) 半導体装置
KR100250154B1 (ko) 반도체 패키지
KR100369501B1 (ko) 반도체패키지
JP3468447B2 (ja) 樹脂封止型半導体装置及びその製造方法
KR200292328Y1 (ko) 반도체 패키지

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: SEMICONDUCTOR ELEMENT INDUSTRIES, INC.

Free format text: FORMER OWNER: AMI SEMICONDUCTOR TRADE CO.

Effective date: 20130220

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20130220

Address after: Arizona, USA

Applicant after: Semiconductor Components Industry, LLC

Address before: British Bermuda, Hamilton

Applicant before: On Semiconductor Trading Ltd.

C14 Grant of patent or utility model
GR01 Patent grant