CN102281703A - 层叠电路基板以及基板制造方法 - Google Patents
层叠电路基板以及基板制造方法 Download PDFInfo
- Publication number
- CN102281703A CN102281703A CN2011100789292A CN201110078929A CN102281703A CN 102281703 A CN102281703 A CN 102281703A CN 2011100789292 A CN2011100789292 A CN 2011100789292A CN 201110078929 A CN201110078929 A CN 201110078929A CN 102281703 A CN102281703 A CN 102281703A
- Authority
- CN
- China
- Prior art keywords
- hole
- resin
- circuit board
- knitting layer
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/063—Lamination of preperforated insulating layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010-132395 | 2010-06-09 | ||
JP2010132395A JP5581828B2 (ja) | 2010-06-09 | 2010-06-09 | 積層回路基板および基板製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102281703A true CN102281703A (zh) | 2011-12-14 |
CN102281703B CN102281703B (zh) | 2013-12-25 |
Family
ID=45095314
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2011100789292A Active CN102281703B (zh) | 2010-06-09 | 2011-03-30 | 层叠电路基板以及基板制造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8586876B2 (zh) |
JP (1) | JP5581828B2 (zh) |
CN (1) | CN102281703B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104302097A (zh) * | 2014-10-16 | 2015-01-21 | 深圳市华星光电技术有限公司 | 一种多层印刷电路板 |
CN111542178A (zh) * | 2020-05-13 | 2020-08-14 | 上海泽丰半导体科技有限公司 | 一种多层电路板的制作工艺和多层电路板 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9040837B2 (en) * | 2011-12-14 | 2015-05-26 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
FR3007403B1 (fr) * | 2013-06-20 | 2016-08-05 | Commissariat Energie Atomique | Procede de realisation d'un dispositif microelectronique mecaniquement autonome |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04154190A (ja) * | 1990-10-18 | 1992-05-27 | Fujitsu Ltd | チップ部品の実装方法 |
US6407341B1 (en) * | 2000-04-25 | 2002-06-18 | International Business Machines Corporation | Conductive substructures of a multilayered laminate |
JP2002290032A (ja) * | 2001-03-24 | 2002-10-04 | Ngk Spark Plug Co Ltd | 配線基板の製造方法 |
US6700072B2 (en) * | 1996-12-13 | 2004-03-02 | Tessera, Inc. | Electrical connection with inwardly deformable contacts |
CN1722940A (zh) * | 2004-06-10 | 2006-01-18 | 住友电气工业株式会社 | 多层印刷电路板的制造方法及多层印刷电路板 |
CN101031981A (zh) * | 2004-09-30 | 2007-09-05 | 住友电气工业株式会社 | 导电性糊剂和使用其制造多层印刷布线板的方法 |
CN101090610A (zh) * | 2006-06-16 | 2007-12-19 | 富士通株式会社 | 制造多层板的方法 |
US20080110016A1 (en) * | 2006-11-14 | 2008-05-15 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate with solder paste connections |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0746713B2 (ja) | 1986-10-31 | 1995-05-17 | イビデン株式会社 | 半導体搭載用基板 |
DE69233259T2 (de) * | 1991-12-31 | 2004-08-26 | Tessera, Inc. | Mehrlageschaltungsherstellung und Stuktur mit Anpassungsmöglichkeit und Komponenten dafür |
US5367764A (en) * | 1991-12-31 | 1994-11-29 | Tessera, Inc. | Method of making a multi-layer circuit assembly |
JP3215090B2 (ja) * | 1998-06-16 | 2001-10-02 | 松下電器産業株式会社 | 配線基板、多層配線基板、及びそれらの製造方法 |
JP2001160686A (ja) * | 1999-12-02 | 2001-06-12 | Ibiden Co Ltd | 多層プリント配線板及びその製造方法 |
US6729023B2 (en) * | 2000-05-26 | 2004-05-04 | Visteon Global Technologies, Inc. | Method for making a multi-layer circuit board assembly having air bridges supported by polymeric material |
JP2003031949A (ja) * | 2001-07-12 | 2003-01-31 | Sumitomo Metal Mining Co Ltd | 多層基板、多層基板の製造方法および接着用構造体 |
CN100562224C (zh) * | 2002-02-22 | 2009-11-18 | 株式会社藤仓 | 多层线路基板、多层线路基板用基材、印刷线路基板及其制造方法 |
US7402758B2 (en) * | 2003-10-09 | 2008-07-22 | Qualcomm Incorporated | Telescoping blind via in three-layer core |
JP2006306977A (ja) * | 2005-04-27 | 2006-11-09 | Hitachi Chem Co Ltd | 複合体、プリプレグ、金属箔張積層板、プリント配線板及び多層プリント配線板並びにそれらの製造方法 |
US8063315B2 (en) * | 2005-10-06 | 2011-11-22 | Endicott Interconnect Technologies, Inc. | Circuitized substrate with conductive paste, electrical assembly including said circuitized substrate and method of making said substrate |
JP2007129124A (ja) * | 2005-11-07 | 2007-05-24 | Matsushita Electric Ind Co Ltd | 多層プリント配線基板及びその製造方法 |
JP2008251625A (ja) | 2007-03-29 | 2008-10-16 | Fujifilm Corp | プリント基板、撮像装置、及びプリント基板の製造方法 |
-
2010
- 2010-06-09 JP JP2010132395A patent/JP5581828B2/ja active Active
-
2011
- 2011-03-30 CN CN2011100789292A patent/CN102281703B/zh active Active
- 2011-04-13 US US13/085,804 patent/US8586876B2/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04154190A (ja) * | 1990-10-18 | 1992-05-27 | Fujitsu Ltd | チップ部品の実装方法 |
US6700072B2 (en) * | 1996-12-13 | 2004-03-02 | Tessera, Inc. | Electrical connection with inwardly deformable contacts |
US6407341B1 (en) * | 2000-04-25 | 2002-06-18 | International Business Machines Corporation | Conductive substructures of a multilayered laminate |
JP2002290032A (ja) * | 2001-03-24 | 2002-10-04 | Ngk Spark Plug Co Ltd | 配線基板の製造方法 |
CN1722940A (zh) * | 2004-06-10 | 2006-01-18 | 住友电气工业株式会社 | 多层印刷电路板的制造方法及多层印刷电路板 |
CN101031981A (zh) * | 2004-09-30 | 2007-09-05 | 住友电气工业株式会社 | 导电性糊剂和使用其制造多层印刷布线板的方法 |
CN101090610A (zh) * | 2006-06-16 | 2007-12-19 | 富士通株式会社 | 制造多层板的方法 |
US20080110016A1 (en) * | 2006-11-14 | 2008-05-15 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate with solder paste connections |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104302097A (zh) * | 2014-10-16 | 2015-01-21 | 深圳市华星光电技术有限公司 | 一种多层印刷电路板 |
WO2016058225A1 (zh) * | 2014-10-16 | 2016-04-21 | 深圳市华星光电技术有限公司 | 一种多层印刷电路板 |
CN111542178A (zh) * | 2020-05-13 | 2020-08-14 | 上海泽丰半导体科技有限公司 | 一种多层电路板的制作工艺和多层电路板 |
CN111542178B (zh) * | 2020-05-13 | 2021-07-16 | 上海泽丰半导体科技有限公司 | 一种多层电路板的制作工艺和多层电路板 |
Also Published As
Publication number | Publication date |
---|---|
US8586876B2 (en) | 2013-11-19 |
JP5581828B2 (ja) | 2014-09-03 |
JP2011258779A (ja) | 2011-12-22 |
CN102281703B (zh) | 2013-12-25 |
US20110303454A1 (en) | 2011-12-15 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20200424 Address after: Nagano, Nagano, Japan Patentee after: Fujitsu Interconnection Technology Co.,Ltd. Address before: Kawasaki City, Kanagawa Prefecture, Japan Patentee before: FUJITSU Ltd. |
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TR01 | Transfer of patent right | ||
CP01 | Change in the name or title of a patent holder |
Address after: Nagano Prefecture, Japan Patentee after: FICT Corp. Address before: Nagano Prefecture, Japan Patentee before: Fujitsu Interconnection Technology Co.,Ltd. |
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CP01 | Change in the name or title of a patent holder |