CN102270613A - 功率半导体装置 - Google Patents

功率半导体装置 Download PDF

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CN102270613A
CN102270613A CN201110076941XA CN201110076941A CN102270613A CN 102270613 A CN102270613 A CN 102270613A CN 201110076941X A CN201110076941X A CN 201110076941XA CN 201110076941 A CN201110076941 A CN 201110076941A CN 102270613 A CN102270613 A CN 102270613A
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power semiconductor
dielectric substrate
buffer board
radiator
semiconductor arrangement
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西堀弘
筱原利彰
太田达雄
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

本发明的目的在于提供即使在高温的负载条件下功率半导体元件周边的接合部及绝缘衬底和散热器的接合部也不产生裂纹的功率半导体装置。本发明的功率半导体装置，包括：由Cu构成的厚度2～3mm的散热器(3)；在散热器(3)上隔着第1接合层(衬底下焊锡(5))接合的绝缘衬底(2)；以及搭载于绝缘衬底(2)上的功率半导体元件(1)，在散热器(3)上，与绝缘衬底(2)的接合区域的周围形成有缓冲槽(3a)。

Description

功率半导体装置
技术领域
本发明涉及一种功率半导体装置，其构成为用焊锡材料等将功率半导体元件与绝缘衬底的金属电路图案接合、进而用焊锡材料等将绝缘衬底的背面金属图案与散热器接合。
背景技术
在专利文献1中，公开了这样的功率半导体装置：将安装了半导体元件的绝缘衬底搭载到作为散热板的金属底座板上后焊接，再将树脂外壳及外部引出端子等与之组合而构成。
在这种结构的普通产业用的功率半导体装置对于热应力的可靠性评价试验中，例如进行不给功率半导体装置通电而使周围环境温度变化后确认绝缘衬底下焊锡的耐疲劳特性等的热循环试验。在热循环试验中，将温度变化条件设定为-40℃～125℃。
此外，进行不改变环境温度变化而间断地给功率半导体元件通电，从而主要确认功率半导体元件上的Al线接合部及功率半导体元件下焊锡的耐疲劳特性等的功率循环试验。在功率循环试验中，将功率半导体元件的最高温度限定为125℃，并且以使通电时和不通电时的功率半导体元件的温度之差保持一定的方式设定负载(负荷)条件。
专利文献1：日本特开平7-202088号公报
可是，为了适应近年来的功率半导体装置的小型化及采用高耐热元件的情况，这些试验的温度条件越来越苛刻，热循环试验的温度变化条件由-40℃～125℃变为-40℃～150℃，功率循环试验中的功率半导体元件的最高温度则由125℃变为175℃。在这种高温环境下使用的功率半导体装置，功率半导体元件和绝缘衬底的焊锡接合部及功率半导体元件的Al线接合部早早地产生裂纹，出现了不能获得一直以来所要求的寿命(可靠性)的问题。
发明内容
于是，本发明鉴于上述问题而构思，其目的在于提供即使在高温的负载条件下功率半导体元件周边的接合部及绝缘衬底和散热器的接合部也不产生裂纹的功率半导体装置。
本发明的第1功率半导体装置，其中包括：由Cu构成的厚度2～3mm的散热器；在散热器上隔着第1接合层接合的绝缘衬底；以及搭载于绝缘衬底的功率半导体元件，在散热器上，与绝缘衬底接合的接合区域的周围形成有槽。
本发明的第2功率半导体装置，其中包括：绝缘衬底；在绝缘衬底上隔着接合层接合的功率半导体元件；在功率半导体元件上形成的缓冲板；以及在缓冲板上焊接而进行电气布线的Al线，缓冲板具有Al线和功率半导体元件的中间的线膨胀系数。
(发明效果)
本发明的第1功率半导体装置具备由Cu构成的比以往(4mm)薄的厚度2～3mm的散热器，从而能够减轻热应力对第1接合层造成的应变。另外，通过在散热器上，与绝缘衬底接合的接合区域的周围形成槽，还能抑制散热器的翘曲，并且防止在第1接合层中产生裂纹。
本发明的第2功率半导体装置设有缓冲板，该缓冲板具有Al线和功率半导体元件的中间的线膨胀系数，从而减轻在由于高温而热膨胀之际加到Al线的接合部的应力。
附图说明
图1是本发明的前提技术涉及的功率半导体装置的剖面图。
图2是第1实施方式涉及的功率半导体装置的剖面图。
图3是表示绝缘衬底和电路图案的平面图。
图4是表示绝缘衬底的结构的剖面图。
图5是表示电路图案的凹部的放大图。
图6是表示散热器的缓冲槽的平面图。
图7是表示散热器的缓冲槽的平面图。
图8是表示散热器的缓冲槽的平面图。
图9是第2实施方式涉及的功率半导体装置的剖面图。
图10是表示缓冲板的结构的剖面图。
图11是表示缓冲板的结构的剖面图。
图12是表示缓冲板的结构的剖面图。
图13是表示缓冲板的形状的平面图。
具体实施方式
(前提技术)
图1示出成为本发明的前提技术的功率半导体装置的剖面图。功率半导体元件1a、1b分别通过元件下焊锡4a、4b而与绝缘衬底2的电路图案201a接合。在0.635mm厚的陶瓷的氮化铝(AlN)基体材料202的表面，形成有由0.25～0.3mm厚的Cu材料(Cu部件)构成的电路图案201a、201b、201c，在AlN基体材料202的背面，形成有和电路图案201相同材料、厚度的背面图案203，它们被用Ag、Cu、Ti类活性金属钎料预先接合而构成绝缘衬底2。
绝缘衬底2的背面电路图案203，经由衬底下焊锡5而与由4mm厚的Cu材料构成的散热器3接合。以覆盖绝缘衬底2及在其上形成的功率半导体元件1a、1b周围的方式用粘接剂9将树脂外壳6接合到散热器3。电极端子7、信号端子8a、8b被安装在树脂外壳6，利用带端子的焊锡10使电极端子7接合到电路图案201b。功率半导体元件1a和信号端子8a、功率半导体元件1a和功率半导体元件1b、电路图案201c和信号端子8b分别用铝线11a、11b、11c布线。树脂外壳6内，用硅胶或环氧树脂等密封树脂12来密封。此外，没有绘出搭载电控制功率半导体装置的电子部件的控制衬底。
对这样构成的功率半导体装置提供热循环负载时，由于绝缘衬底2的表观的线膨胀系数(α≒7ppm)和由Cu材料构成的散热器3的线膨胀系数(α＝17ppm)的失配，所以衬底下焊锡5产生应变，随着热循环负载的进行而产生微小裂纹，裂纹扩大后就妨碍功率半导体元件的热散发，最终损坏功率半导体元件1a、1b。通过实施满足可靠性保证寿命周期的结构设计，以避免在热循环的温度变化条件-40℃～125℃时产生上述现象。可是使热循环试验的温度变化条件由-40℃～125℃设定变更为-40℃～150℃的情况下，分析计算得到的衬底下焊锡应变就大约增大45％，随着应变的增大，可靠性寿命在实际评价中也大约降低到1/10以下。
进而，在功率半导体元件1a和铝线11a、11b的接合部，也在热循环的热负载的作用下，功率半导体元件1a的线膨胀系数(α≒4ppm)和铝线11a、11b的线膨胀系数(α≒23ppm)的失配(Δα≒19ppm)，从而产生热应力，使微小的裂纹扩大。将功率循环试验中的功率半导体元件1a的最高温度控制在125℃时，通过实施满足必要的可靠性保证寿命周期的结构设计，以免产生上述现象。可是使最高温度由125℃提高到苛刻的175℃后，功率半导体元件1a和铝线11a、11b的接合部的寿命大约降低到1/4。
因此，在本发明中，为了即使在高温的负载条件下也能够维持装置的可靠性寿命，进行了各种改良。
(第1实施方式)
图2示出第1实施方式的功率半导体装置的结构。对于和图1所示的前提技术涉及的功率半导体装置相同的构成单元，赋予相同的符号。本实施方式的功率半导体装置，具备功率半导体元件1a、1b，分别经由元件下焊锡4a、4b而与功率半导体元件1a、1b接合的绝缘衬底2，经由衬底下焊锡5而与绝缘衬底2接合的散热器3。
绝缘衬底2包括：绝缘基体材料的Si3N4基体材料212；在Si3N4基体材料212的背面设置的由Cu构成的背面图案213；以及在Si3N4基体材料212的表面设置的由和背面图案213相同厚度的Cu构成的电路图案211a、211b、211c，它们被用Ag、Cu、Ti类活性金属钎料预先接合而构成绝缘衬底2。
绝缘衬底2的背面图案213，通过衬底下焊锡5而与由Cu构成的散热器3接合。以覆盖绝缘衬底2及功率半导体元件1a、1b的周围的方式用粘接剂9将树脂外壳6与散热器3接合。电极端子7、信号端子8a、8b被安装在树脂外壳6上，利用带端子的焊锡10使电极端子7与电路图案201b接合。功率半导体元件1a和信号端子8a、功率半导体元件1a和功率半导体元件1b、电路图案201c和信号端子8b分别被铝线11a、11b、11c布线。此外，作为布线材料，除了铝线之外，还可以使用铝带、Cu线、铝Cu包层带等。树脂外壳6内，被用硅胶或环氧树脂等密封树脂12密封。另外，没有绘出搭载电控制功率半导体装置的电子部件的控制衬底。
<绝缘衬底>
在本实施方式的绝缘衬底2的绝缘基体材料中，使用Si3N4基体材料212。其抗折强度约为600MPa，是现有的氮化铝(AlN)基体材料202的抗折强度的约为300MPa的两倍。Si3N4基体材料212的厚度为0.25～0.35mm，比现有的AlN基体材料202的0.635mm薄。另一方面，电路图案211a、211b、211c及背面图案213的厚度为0.35～0.45mm，比现有的电路图案201a、201b、201c及背面图案203的0.25～0.3mm厚。这样，使绝缘衬底2总的线膨胀系数从大约7ppm提高到大约10ppm，逐渐接近由Cu材料构成的散热器3的线膨胀系数17ppm。
Si3N4基体材料212的热传导系数约为90W/m·k，比现有的AlN基体材料202的约为180W/m·k的小，大约为它的1/2。但是因为使基体材料的厚度为以往的1/2，所以热阻和以往同等。
此外，使电路图案211a、211b、211c和背面图案213相同的厚度，从而成为(电路图案211a、211b、211c的体积)≤(背面图案213的体积)，加热时的绝缘衬底2的翘曲方向就在电路图案211a、211b、211c的一侧成为凹。因此，能够很容易地排出钎焊时产生的衬底下焊锡5中的气泡(空隙)。
图3是表示绝缘衬底2的Si3N4基体材料212和在其上接合的电路图案211a的平面图，图4是图3的A-A剖面图，图5是图4的B部放大图。如图3所示，在电路图案211a的搭载功率半导体元件的面215的周围，形成凹部214。经过蚀刻等加工，使其截面形状如图5所示，球状的直径D2比表面部的直径D1稍微大一点。通过在电路图案211a上设置这种凹部214，在用环氧树脂12密封树脂外壳6内部时，因固着效果(anchor effect)而提高环氧树脂12和绝缘衬底2的密合性。通过提高密合性，在高温时即使元件下焊锡4a、4b产生裂纹，也能够抑制开口而抑制裂纹扩大。将环氧树脂12的线膨胀系数，设定成为比元件下焊锡4a、4b的20～26ppm小的线膨胀系数12～16ppm。
<散热器>
在散热器3中虽然和前提技术同样地使用Cu材料，但是为了减轻受热过程时产生的衬底下焊锡5的应变，使其厚度成为比现有的散热器大约薄1～2mm的2～3mm左右。另外在散热器3中，还位于绝缘衬底2的周围地配置缓冲槽3a，从而在进一步减轻衬底下焊锡5的应变的同时，还抑制随着使散热器3的厚度变薄后产生的翘曲。
缓冲槽3a的尺寸为宽2～3mm，深度为不贯通散热器3的范围内的1.5～2mm。更详细地说，除了取决于散热器3之外，还取决于绝缘衬底2等周边部件的尺寸及构造、减少衬底下焊锡5的应变及散热器3的翘曲的目标等。另外，不在散热器3的端部形成缓冲槽3a，以免使散热器3的弯曲强度显著降低。
图6～图8是例示假如在散热器3上如图所示地排列6个绝缘衬底2时的缓冲槽3a的形状的平面图。缓冲槽3a既可以如图6所示地沿着绝缘衬底2的外周设置，也可以如图7所示地在绝缘衬底2之间设置，或者如图8所示地在绝缘衬底2之间间断地设置。缓冲槽3a被配置成不到散热器3的端部。无论哪种形状的缓冲槽3a，都能减轻衬底下焊锡5的应变，并且能够抑制随着散热器3的厚度变薄后产生的翘曲。
<效果>
依据第1实施方式的功率半导体装置，可以获得以下效果。就是说，本实施方式的功率半导体装置，具备由Cu构成的厚度为2～3mm的散热器3、在散热器3上通过衬底下焊锡5(第1接合层)而接合的绝缘衬底2、以及在绝缘衬底2上搭载的功率半导体元件1a，在散热器3和绝缘衬底2的接合区域的周围形成缓冲槽3a。使散热器3的厚度比现有的散热器薄，从而减轻衬底下焊锡5的应变，而且通过形成缓冲槽3a，抑制随着散热器3的厚度变薄后产生的翘曲。
另外，绝缘衬底2具备通过衬底下焊锡5而与散热器3接合的由Cu构成的背面图案213、作为在背面图案213上形成的绝缘基体材料的Si3N4基体材料212、和在Si3N4基体材料212上形成的由Cu构成的电路图案211a、211b、211c，功率半导体元件1a隔着元件下焊锡4a(第2接合层)而与电路图案211a、211b、211c接合，Si3N4基体材料的厚度为0.25～0.35mm，背面图案213和电路图案211a、211b、211c的厚度相同都为0.35～0.45mm。与以往相比，使绝缘基体材料变薄，相反使由Cu构成的背面图案213及电路图案211a、211b、211c变厚，从而使线膨胀系数接近由Cu构成的散热器3，减轻两者的线膨胀系数差引起的衬底下焊锡5的应变。
另外，使缓冲槽3a在不贯通散热器3的范围内宽度为2～3mm、深度度为1.5～2mm。通过设置这种尺寸的缓冲槽3a，减轻散热器3的翘曲。
而且，功率半导体装置，具备与散热器3接合而包围绝缘衬底2、功率半导体元件1a的树脂外壳6(外壳体)；和在树脂外壳6的内部密封绝缘衬底2、功率半导体元件1a的密封树脂12，电路图案211a、211b、211c在功率半导体元件1a接合的区域215外形成有凹部214。通过在电路图案211a中设置这种凹部214，在用环氧树脂12密封树脂外壳6内时，因固着效果而提高环氧树脂12和绝缘衬底2的密合性，在高温时即使元件下焊锡4a、4b产生裂纹，也能抑制开口而抑制裂纹扩大。
(第2实施方式)
图9是表示第2实施方式的功率半导体装置的结构的剖面图。对于和图1所示的前提技术的功率半导体装置相同的结构，赋予相同的参考符号。本实施方式的功率半导体装置，在前提技术的结构以外，还具备在功率半导体元件1a上通过缓冲板下接合材料14接合的缓冲板13。
缓冲板13和信号电极8a、缓冲板13和功率半导体元件1b被分别用Al线11a、11b布线。除此以外的结构都和前提技术一样，所以不再赘述。此外，虽然以前提技术的结构为前提讲述本实施方式的功率半导体装置，但是也可以采用在第1实施方式的功率半导体装置中设置缓冲板13的结构。
图10～图12是例示缓冲板13的结构的剖面图，图13是缓冲板13的平面图。缓冲板13例如如图10所示，用由殷钢(invar)和其表面及背面的Cu箔构成的Cu-殷钢-Cu包层材料构成。或者可以如图11所示那样用CuMo合金，进而如图12所示那样用由CuMo合金和其表面及背面的Cu箔构成的Cu-CuMo-Cu包层材料构成。
另外，可以采用镀敷或物理蒸镀(PVD：Physical VaporDeposition)等方法，至少对应力缓冲板13的表面侧进行表面处理，形成Al薄膜或Ni薄膜，提高与Al线11a接合的接合性。特别是在缓冲板下接合材料14中采用微米Ag(micro-Ag)或纳米Ag膏等时，由于使缓冲板13的背面裸露时接合性优异，所以对于背面反而不进行表面处理，只在表面的Al线接合侧形成Al薄膜或Ni薄膜。这样只对一个面进行表面处理的情况下，电镀时需要对不镀敷的面进行掩蔽处理，但是PVD时却具有不必进行掩蔽处理这一成本上的优点。
无论采用哪种结构，都将缓冲板13的线膨胀系数选定成为Al线(大约23ppm)11a和功率半导体元件1a(大约4ppm)的中间的7～13ppm左右。
另外，缓冲板13被变薄，以不给缓冲板下接合材料14增加负担，将其厚度控制在0.5～1.0mm左右的范围内，按照作为目标的线膨胀系数设定各包层材料的厚度。用包层材料构成缓冲板13时，基本上使位于表面和背面的金属材质及其厚度一样，抑制缓冲板13本身的翘曲。
另外，使缓冲板13的平面形状如图13所示地成为圆形或椭圆形，从而能够分散/缓冲缓冲板下接合材料14产生的热应力，可以获得与功率半导体元件1a的可靠性高的接合。
在数值分析上，将Al线11a和功率半导体元件1a接合时的接合部的应力设为1时，得到如下结果：使用线膨胀系数7ppm的缓冲板13可以将应力比减轻到0.7，使用线膨胀系数11ppm的缓冲板则可以将应力比减轻到0.5。综合考虑在表面接合的Al线11a的接合部可靠性寿命和接合功率半导体元件1a的缓冲板13的背面接合材料14的可靠性寿命的参数，选定缓冲板13的线膨胀系数的最优值。
<效果>
依据第2实施方式的功率半导体装置，获得以下效果。就是说，第2实施方式的功率半导体装置，还包括：在功率半导体元件1a上隔着缓冲板下接合材料14(第3接合层)而形成的缓冲板13；和在缓冲板13上焊接而进行电气布线的Al线11a，缓冲板13具有Al线11a和功率半导体元件1a的中间的线膨胀系数。设置这种缓冲板13，从而能够减轻施加到Al线的接合部分的应力，提高可靠性。
另外，缓冲板13由Cu·Mo合金、Cu/殷钢/Cu、Cu/Cu·Mo合金/Cu中的任一种材料形成，至少在表面形成Al或Ni的薄膜，从而提高与Al线11a的接合性。
另外，只在缓冲板13的一个面上形成该Al或Ni的薄膜时，虽然镀敷时需要对不镀敷的面进行掩蔽处理，但是PVD时却具有不必进行掩蔽处理这一成本上的优点。
另外，使缓冲板下接合层14为微米Ag或纳米Ag膏时，不在缓冲板13的背面形成Al或Ni的薄膜的裸露状态的接合性优异。
而且，使缓冲板13的平面形状为圆形或椭圆形，从而能够分散、缓冲缓冲板下接合材料14产生的热应力，可以获得与功率半导体元件1a的可靠性高的接合。
另外，功率半导体装置，具备绝缘衬底2、在绝缘衬底2上隔着元件下焊锡4(接合层)接合的功率半导体元件1a、在功率半导体元件1a上隔着缓冲板下接合材料14(接合层)接合的缓冲板13、和在缓冲板13上接合而进行电气布线的Al线11a，缓冲板13具有Al线11a和功率半导体元件1a的中间的线膨胀系数。设置这种缓冲板13，从而能够减轻施加到Al线的接合部分的应力，进而提高可靠性。
附图标记说明
1a、1b、1c 功率半导体元件；2 绝缘衬底；3 散热器；3a缓冲槽；4a、4b 元件下焊锡；5 衬底下焊锡；6 树脂外壳；7 电极端子；8a、8b 信号端子；9 粘接剂；10 带端子的焊锡；11a、11b、11c 铝线；12 密封树脂；13 缓冲板；14 缓冲板下接合材料；201a、201b、201c、211a、211b、211c 电路图案；202 AlN基体材料；212 Si3N4基体材料；203、213 背面图案；214 凹部；215 元件搭载面。

Claims (10)

1.一种功率半导体装置，包括：
由Cu构成的厚度2～3mm的散热器；
在所述散热器上隔着第1接合层接合的绝缘衬底；以及
搭载于所述绝缘衬底的功率半导体元件，
其中，
在所述散热器上，与所述绝缘衬底接合的接合区域的周围形成有槽。
2.如权利要求1所述的功率半导体装置，其中，
所述绝缘衬底，具备：
隔着所述第1接合层而与所述散热器接合的由Cu构成的背面图案；
在所述背面图案上形成的由Si3N4构成的基体材料；以及
在所述基体材料上形成的由Cu构成的电路图案，
所述功率半导体元件隔着第2接合层接合到所述电路图案上，
所述基体材料的厚度为0.25～0.35mm，
所述背面图案和所述电路图案的厚度相同，都为0.35～0.45mm。
3.如权利要求1所述的功率半导体装置，其中，
所述槽在不贯通所述散热器的范围内宽度为2～3mm、深度为1.5～2mm。
4.如权利要求1～3中任一项所述的功率半导体装置，其中，
还包括在所述功率半导体元件上隔着第3接合层形成的缓冲板，和
在所述缓冲板上焊接而进行电气布线的Al线；
所述缓冲板具有所述Al线和所述功率半导体元件的中间的线膨胀系数。
5.如权利要求4所述的功率半导体装置，其中，
所述缓冲板由Cu·Mo合金、Cu/殷钢/Cu、Cu/Cu·Mo合金/Cu中的任一种材料形成，至少在表面形成Al或Ni的薄膜。
6.如权利要求5所述的功率半导体装置，其中，
采用PVD法形成所述Al或Ni的薄膜。
7.如权利要求5所述的功率半导体装置，其中，
所述第3接合层，是微米Ag或纳米Ag膏。
8.如权利要求4所述的功率半导体装置，其中，
所述缓冲板的平面形状是圆形或椭圆形。
9.如权利要求2所述的功率半导体装置，其中，
具备与所述散热器接合并包围所述绝缘衬底、所述功率半导体元件的外壳体，和
在所述外壳体的内部密封所述绝缘衬底、所述功率半导体元件的密封树脂；
在所述电路图案与所述功率半导体元件接合的区域外，实施凹部加工。
10.一种功率半导体装置，其中包括：
绝缘衬底；
在所述绝缘衬底上隔着接合层接合的功率半导体元件；
在所述功率半导体元件上隔着接合层接合的缓冲板；以及
在所述缓冲板上焊接而进行电气布线的Al线，
所述缓冲板具有所述Al线和所述功率半导体元件的中间的线膨胀系数。
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Cited By (4)

* Cited by examiner, † Cited by third party
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Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101278393B1 (ko) * 2010-11-01 2013-06-24 삼성전기주식회사 파워 패키지 모듈 및 그의 제조방법
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1716578A (zh) * 2004-06-14 2006-01-04 三菱电机株式会社 半导体装置及其制造方法
CN1728373A (zh) * 2004-07-29 2006-02-01 株式会社日立制作所 半导体器件及采用它的功率变流器以及采用此功率变流器的混合动力汽车
US20070001278A1 (en) * 2005-06-30 2007-01-04 Oseob Jeon Semiconductor die package and method for making the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3094768B2 (ja) 1994-01-11 2000-10-03 富士電機株式会社 半導体装置
JP3180622B2 (ja) * 1995-06-09 2001-06-25 三菱マテリアル株式会社 パワーモジュール用基板及びその製造方法
JP2002158328A (ja) * 2000-11-17 2002-05-31 Mitsubishi Electric Corp 電力用半導体装置
EP1346411A2 (en) * 2000-12-01 2003-09-24 Broadcom Corporation Thermally and electrically enhanced ball grid array packaging
JP2002203942A (ja) * 2000-12-28 2002-07-19 Fuji Electric Co Ltd パワー半導体モジュール

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1716578A (zh) * 2004-06-14 2006-01-04 三菱电机株式会社 半导体装置及其制造方法
CN1728373A (zh) * 2004-07-29 2006-02-01 株式会社日立制作所 半导体器件及采用它的功率变流器以及采用此功率变流器的混合动力汽车
US20070001278A1 (en) * 2005-06-30 2007-01-04 Oseob Jeon Semiconductor die package and method for making the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104241208A (zh) * 2013-06-18 2014-12-24 三菱电机株式会社 半导体装置
CN107851639A (zh) * 2015-10-28 2018-03-27 三菱电机株式会社 电力用半导体装置
CN107851639B (zh) * 2015-10-28 2020-08-25 三菱电机株式会社 电力用半导体装置
CN110622301A (zh) * 2017-05-10 2019-12-27 罗姆股份有限公司 功率半导体装置及其制造方法
CN110622301B (zh) * 2017-05-10 2023-06-23 罗姆股份有限公司 功率半导体装置及其制造方法
CN110459525A (zh) * 2019-08-20 2019-11-15 济南南知信息科技有限公司 一种具有逆变器的电力系统及其制造方法
CN110459525B (zh) * 2019-08-20 2021-02-09 西藏华东水电设备成套有限公司 一种具有逆变器的电力系统及其制造方法

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