CN102244068A - 半导体器件、半导体器件制造方法以及电子装置 - Google Patents

半导体器件、半导体器件制造方法以及电子装置 Download PDF

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Publication number
CN102244068A
CN102244068A CN2011101174844A CN201110117484A CN102244068A CN 102244068 A CN102244068 A CN 102244068A CN 2011101174844 A CN2011101174844 A CN 2011101174844A CN 201110117484 A CN201110117484 A CN 201110117484A CN 102244068 A CN102244068 A CN 102244068A
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semiconductor chip
electronic circuit
dam body
resin layer
circuit portion
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CN102244068B (zh
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胁山悟
尾崎裕司
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Sony Corp
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Sony Corp
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Abstract

本发明涉及半导体器件、半导体器件制造方法以及电子装置。所述半导体器件包括:第一半导体芯片,在所述第一半导体芯片的一个表面上形成有电子电路部和第一连接部;第二半导体芯片,在所述第二半导体芯片的一个表面上形成有第二连接部,所述第二半导体芯片安装在所述第一半导体芯片上,且所述第一连接部与所述第二连接部通过凸块彼此连接;坝体,所述坝体形成在所述第二半导体芯片的外缘的一部分上并填充所述第一半导体芯片与所述第二半导体芯片间的间隔,所述外缘的所述一部分位于形成有所述电子电路部的区域侧;以及底部填充树脂层,它填充在所述间隔中,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。

Description

半导体器件、半导体器件制造方法以及电子装置
相关申请的交叉参考
本申请包含与2010年5月14日向日本专利局提交的日本优先权专利申请JP 2010-111910所公开的内容相关的主题,因此将该日本优先权申请的全部内容以引用的方式并入本文中。
技术领域
本发明涉及半导体器件、半导体器件制造方法以及电子装置,具体地,涉及通过将第二半导体芯片安装在设有电子电路部(例如固体摄像元件部)的第一半导体芯片上而封装得到的半导体器件、该半导体器件的制造方法以及设置有该半导体器件的电子装置。
背景技术
称为“芯片堆叠(chip-on-chip,CoC)封装件”的封装结构已被投入实际应用,该封装结构包含有多个层叠起来并密封在一个封装件内的半导体芯片,以便实现半导体器件的小型化、高功能性等。
CoC封装件也适用于例如将存储器元件与处理器元件层叠起来而得到的结构,并且,在CoC封装件的作为系统级封装(System in Package,SIP)型半导体器件的实际应用上已经取得了进展。
例如,当如同日本专利特许公报第2008-192815号(下文中称为专利文献1)中那样用CoC封装件形成SIP时,主要考虑的是将倒装芯片连接(flip chip connection)应用于上部半导体芯片与下部半导体芯片之间的连接。
在将倒装芯片连接应用于CoC封装件中的半导体芯片之间的连接的情况下,将第一半导体芯片(下段侧半导体芯片)安装在设有外部连接端子等的布线板上。
第二半导体芯片(上段侧半导体芯片)以倒装芯片连接的方式安装至第一半导体芯片。
也就是说,通过将设置在第一半导体芯片的上表面上的凸块电极与设置在第二半导体芯片的下表面上的凸块电极彼此连接起来,来形成第一半导体芯片与第二半导体芯片间的电连接及机械连接。
另外,向第一半导体芯片与第二半导体芯片间的间隔中填充了底部填充树脂层(underfill resin layer)以提高连接可靠性等。
例如,日本专利特许公报第2005-276879号、日本专利特许公报第2008-252027号和日本专利特许公报第2008-124140号(下文中分别称为专利文献2、专利文献3和专利文献4)公开了这样的技术:在CoC封装件的第一半导体芯片与第二半导体芯片间的间隔被填充有底部填充树脂层的结构情况下,形成坝体来阻止底部填充树脂层的流动。
上述坝体主要用来在第二半导体芯片安装区域的外周部处防止由于底部填充树脂层流入到形成于第一半导体芯片上的电子电路部(诸如Al电极等)中而造成的树脂污染。
在上述构造而成的CoC封装件中,当进行树脂硬化反应时,从底部填充树脂层的形成于第二半导体芯片的外周部处的倒角会散发出反应气体。
在专利文献1~4中,当缩短了诸如Al电极等电子电路部与上部半导体芯片间的距离以便使CoC封装件小型化时,上述气体就会污染诸如Al电极等电子电路部。
于是,出现了引线接合不良以及可靠性劣化,这样就难以使CoC封装件小型化。
另外,在下部半导体芯片上形成有固体摄像元件部的情况下,即使当固体摄像元件部与上部半导体芯片之间形成有坝体时,从上述底部填充树脂层的倒角散发出的反应气体仍会污染固体摄像元件部,因此使摄像特性劣化。
另外,目前正在研究这样的半导体器件:该半导体器件中,在玻璃基板或类似基板上形成有新布线,并且设有固体摄像部的半导体芯片是处于倒装芯片连接的状态。
为了防止用于保护凸块电极的树脂污染固体摄像部的光接收面,正在研究在凸块电极与设有固体摄像部的半导体芯片之间形成坝体的技术。
然而,参照日本专利特许公报第2007-533131号、日本专利特许公报第2002-118207号和日本专利特许公报Hei 06-204442号(下文中分别称为专利文献5、专利文献6和专利文献7)等,示出了仅在玻璃基板侧形成有由树脂制成的坝体,并且示出了在形成有固体摄像部的半导体芯片侧存在着密封性方面的问题。
另外,该技术本质上只能在层叠的半导体芯片或者设有固体摄像部的半导体芯片的外周部中形成凸块电极。
另外,在专利文献6和专利文献7所公开的半导体器件中,在Al电极侧没有形成坝体,因此Al电极很可能会被污染。
发明内容
需要解决的问题是:当形成在下部半导体芯片上的电子电路部与上部半导体芯片间的距离缩短时,从位于上部半导体芯片与下部半导体芯片间的底部填充树脂层的倒角散发出的反应气体会污染电子电路部。
因此,难以通过缩短上部半导体芯片与形成在下部半导体芯片上的电子电路部间的距离来实现半导体器件的小型化和高度集成化。
本发明一个实施方案提供了一种半导体器件,其包括:第一半导体芯片,所述第一半导体芯片设有电子电路部和第一连接部,所述电子电路部至少形成在所述第一半导体芯片的一个表面上,所述第一连接部形成在与形成有所述电子电路部的所述表面相同的表面上;第二半导体芯片,所述第二半导体芯片设有第二连接部,所述第二连接部形成在所述第二半导体芯片的一个表面上,所述第二半导体芯片安装在所述第一半导体芯片上,且所述第一连接部与所述第二连接部通过凸块彼此连接;坝体,所述坝体用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔,且形成在所述第二半导体芯片的外缘的至少一部分上,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述电子电路部的区域侧;以及底部填充树脂层,所述底部填充树脂层填充在所述第一半导体芯片与所述第二半导体芯片间的所述间隔中,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。
在本发明上述实施方案的半导体器件中,设有第二连接部(所述第二连接部形成在所述第二半导体芯片的一个表面上)的第二半导体芯片安装在设有电子电路部(所述电子电路部至少形成在所述第一半导体芯片的一个表面上)和第一连接部(所述第一连接部形成在与形成有所述电子电路部的所述表面相同的表面上)的第一半导体芯片上,所述第一半导体芯片与所述第二半导体芯片通过凸块在所述第一连接部和所述第二连接部处彼此连接。
在此情况下,在所述第二半导体芯片的外缘的至少一部分上形成了用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔的坝体,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述电子电路部的区域侧。
在所述第一半导体芯片与所述第二半导体芯片间的所述间隔中填充了底部填充树脂层,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。
另外,本发明另一实施方案提供了一种半导体器件制造方法,所述方法包括如下步骤:至少在第一半导体芯片的一个表面上形成电子电路部,并且在与形成有所述电子电路部的所述表面相同的表面上形成第一连接部;在第二半导体芯片的一个表面上形成第二连接部;将所述第二半导体芯片安装在所述第一半导体芯片上,且使所述第一连接部与所述第二连接部通过凸块彼此连接;在所述第二半导体芯片的外缘的至少一部分上形成用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔的坝体,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述电子电路部的区域侧;以及形成底部填充树脂层,所述底部填充树脂层填充在所述第一半导体芯片与所述第二半导体芯片间的所述间隔中,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。
在本发明上述实施方案的半导体器件制造方法中,至少在第一半导体芯片的一个表面上形成了电子电路部,并且在与形成有所述电子电路部的表面相同的表面上形成了第一连接部。
另外,在第二半导体芯片的一个表面上形成了第二连接部。
接着,将所述第二半导体芯片安装到所述第一半导体芯片上,且通过凸块使所述第一连接部与所述第二连接部彼此连接。
在上述方法中,在所述第二半导体芯片的外缘的至少一部分上形成了用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔的坝体,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述电子电路部的区域侧。
然后,以填充在所述第一半导体芯片与所述第二半导体芯片间的间隔中的方式形成了底部填充树脂层,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。
本发明又一实施方案提供了一种电子装置,其包括:固体摄像器件;光学系统,所述光学系统用于将入射光引导至所述固体摄像器件的摄像部;以及信号处理电路,所述信号处理电路用于对所述固体摄像器件的输出信号进行处理。其中,所述固体摄像器件包括:第一半导体芯片,所述第一半导体芯片设有固体摄像部和第一连接部,所述固体摄像部至少形成在所述第一半导体芯片的一个表面上,所述第一连接部形成在与形成有所述固体摄像部的所述表面相同的表面上;第二半导体芯片,所述第二半导体芯片设有第二连接部,所述第二连接部形成在所述第二半导体芯片的一个表面上,所述第二半导体芯片安装在所述第一半导体芯片上,且所述第一连接部与所述第二连接部通过凸块彼此连接;坝体,所述坝体用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔,且形成在所述第二半导体芯片的外缘的至少一部分上,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述固体摄像部的区域侧;以及底部填充树脂层,所述底部填充树脂层填充在所述第一半导体芯片与所述第二半导体芯片间的所述间隔中,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述固体摄像部侧突出。
本发明上述实施方案的电子装置包括固体摄像器件、用于将入射光引导至所述固体摄像器件的摄像部的光学系统、以及用于对所述固体摄像器件的输出信号进行处理的信号处理电路。
在上述固体摄像器件中,设有第二连接部(所述第二连接部形成在所述第二半导体芯片的一个表面上)的第二半导体芯片安装在设有固体摄像部(所述固体摄像部至少形成在所述第一半导体芯片的一个表面上)和第一连接部(所述第一连接部形成在与形成有所述固体摄像部的所述表面相同的表面上)的第一半导体芯片上,所述第一半导体芯片与所述第二半导体芯片通过凸块在所述第一连接部和所述第二连接部处彼此连接。另外,在所述第二半导体芯片的外缘的至少一部分(所述第二半导体芯片的所述外缘的这部分位于形成有所述固体摄像部的区域侧)上形成了用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔的坝体。此外,在所述第一半导体芯片与所述第二半导体芯片间的所述间隔中填充了底部填充树脂层,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述固体摄像部侧突出。
在本发明上述实施方案的半导体器件中,所述坝体防止了位于所述第一半导体芯片与所述第二半导体芯片间的所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。因此,在所述电子电路部附近没有形成所述底部填充树脂层的倒角,从而防止了从倒角散发出的反应气体对所述电子电路部造成污染。
因此,能够缩短所述第二半导体芯片与形成在所述第一半导体芯片上的所述电子电路部之间的距离,由此实现半导体器件的小型化以及高度集成化。
根据本发明上述实施方案的半导体器件制造方法,形成坝体了从而防止位于所述第一半导体芯片与所述第二半导体芯片间的所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。因此,在所述电子电路部附近没有形成所述底部填充树脂层的倒角,从而能够防止从所述倒角散发出的反应气体对所述电子电路部造成污染。
因此,能够缩短所述第二半导体芯片与形成在所述第一半导体芯片上的所述电子电路部之间的距离,由此实现半导体器件的小型化以及高度集成化。
在用于构成本发明上述实施方案的电子装置的固体摄像器件中,所述坝体防止了位于所述第一半导体芯片与所述第二半导体芯片间的所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述固体摄像部侧突出。因此,在所述固体摄像部附近没有形成所述底部填充树脂层的倒角,从而防止了从所述倒角散发出的反应气体对所述固体摄像部造成污染。
因此,能够缩短所述第二半导体芯片与形成在所述第一半导体芯片上的所述固体摄像部之间的距离,由此实现固体摄像器件的小型化以及高度集成化。
附图说明
图1A是本发明第一实施例的半导体器件的平面图;图1B和图1C分别是沿图1A中的X-X′线和Y-Y′线得到的示意性截面图。
图2A是本发明第一实施例中的第一半导体芯片的平面图;图2B和图2C分别是沿图2A中的X-X′线和Y-Y′线得到的示意性截面图。
图3A是本发明第一实施例中的第二半导体芯片的平面图;图3B和图3C分别是沿图3A中的X-X′线和Y-Y′线得到的示意性截面图。
图4A是示出了本发明第一实施例的半导体器件的制造工序的平面图;图4B和图4C分别是沿图4A中的X-X′线和Y-Y′线得到的示意性截面图。
图5A是示出了本发明第一实施例的半导体器件的制造工序的平面图;图5B和图5C分别是沿图5A中的X-X′线和Y-Y′线得到的示意性截面图。
图6A是示出了本发明第一实施例的半导体器件的制造工序的平面图;图6B和图6C分别是沿图6A中的X-X′线和Y-Y′线得到的示意性截面图。
图7A是本发明第二实施例的半导体器件的平面图;图7B和图7C分别是沿图7A中的X-X′线和Y-Y′线得到的示意性截面图。
图8A是本发明第三实施例的半导体器件的平面图;图8B和图8C分别是沿图8A中的X-X′线和Y-Y′线得到的示意性截面图。
图9A和图9B是示出了本发明第四实施例的半导体器件的制造工序的截面图,也是与图1A~图1C所示的半导体器件中的X-X′线和Y-Y′线相对应的示意性截面图。
图10A是本发明第五实施例的半导体器件的平面图;图10B和图10C分别是沿图10A中的X-X′线和Y-Y′线得到的示意性截面图。
图11A和图11B是示出了本发明第五实施例的半导体器件的制造工序的截面图,也是与图10A~图10C所示的半导体器件中的X-X′线和Y-Y′线相对应的示意性截面图。
图12是第六实施例的电子装置的示意性框图。
具体实施方式
下面参照附图,说明本发明的固体摄像器件、该固体摄像器件的制造方法、设计方法以及电子装置的优选实施例。
顺便提及地,将会按照下面的顺序进行说明。
1.第一实施例(半导体器件的基本构造及制造方法)
2.第二实施例(其中将电子电路部与第二半导体芯片形成得彼此相邻的构造)
3.第三实施例(其中按照沿着第二半导体芯片的外缘的形状而形成有坝体的构造)
4.第四实施例(使用树脂膜作为底部填充树脂层的制造方法)
5.第五实施例(其中坝体由树脂形成的构造)
6.第六实施例(应用于电子装置)
第一实施例
半导体器件的构造
图1A是本实施例的半导体器件的平面图。图1B和图1C分别是沿图1A中的X-X′线和Y-Y′线得到的示意性截面图。
至少在第一半导体芯片10的一个表面上形成有电子电路部。
作为上述电子电路部,例如形成有固体摄像部11。
在固体摄像部11中,例如,各个像素的光电二极管被形成为彼此分开,并且以矩阵形式排列有多个包含光电二极管的像素,由此形成光接收面。例如,视需要,在光接收面上形成有绝缘膜、滤色器和片上透镜等。
另外,作为电子电路部,例如形成有焊盘电极12。
焊盘电极12例如由铝形成。焊盘电极12埋置在第一半导体芯片10的顶层附近。焊盘电极12的一部分通过焊盘开口部12a而在顶面侧露出。
另外,作为电子电路部,可以包含有例如比较器和DA转换器等其他的周边电路部。
例如,与固体摄像部11、焊盘电极12等相连接的内部布线13被形成得埋置在第一半导体芯片10内。
在第一半导体芯片10的与该第一半导体芯片10的形成有电子电路部的那个表面相同的表面上,形成有作为第一连接部的凸块底层膜20。
另一方面,在第二半导体芯片30上形成有布线31等,并且在第二半导体芯片30的一个表面上形成有作为第二连接部的凸块底层膜32。
第二半导体芯片30安装在第一半导体芯片10上,第一半导体芯片10与第二半导体芯片30利用凸块24在凸块底层膜20及凸块底层膜32处彼此连接起来。
在此情况下,在第二半导体芯片30的外缘的至少一部分上形成有用于填充第一半导体芯片10与第二半导体芯片30间的间隔的坝体25,上述外缘的至少一部分位于形成有电子电路部的区域侧。
另外,在本实施例中,在第一半导体芯片10侧还形成有凸块底层膜22,并且在第二半导体芯片30侧还形成有凸块底层膜34。上述坝体25被形成得将凸块底层膜22与凸块底层膜34相互连接起来。坝体25由与形成凸块24用的导电层相同的层形成。在第一半导体芯片10上的如下区域中形成有凸块23:这些区域是在被形成得要对第一半导体芯片10与第二半导体芯片30间的间隔进行填充的区域以外的区域。坝体25与凸块23一起形成了环形。
用底部填充树脂层26填充第一半导体芯片10与第二半导体芯片30间的间隔,坝体25防止底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出。
在本实施例的半导体器件中,底部填充树脂层26在第二半导体芯片30的未形成有坝体25的外周部处形成了倒角26a。
然而,上述坝体25防止了底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出。
例如,为了防止来自上述倒角的反应气体造成污染,确保上述倒角与电子电路部之间的距离在200μm以上是很重要的。
在本实施例中,能够确保底部填充树脂层26的倒角与诸如固体摄像部、焊盘电极等电子电路部之间的距离在200μm以上。
因此,能够防止在树脂硬化反应时从底部填充树脂层26的倒角散发出的反应气体对电子电路部造成污染。
在上述实施例中,已经示出了其中将固体摄像部和焊盘电极作为电子电路部的构造。然而,本实施例还适用于这样的情况:该情况中,存在固体摄像部和焊盘电极中的一者或者存在期望免受其他反应气体的污染的电子电路部。
如上所述,在本实施例中,当电子电路部被设置在分别与第二半导体芯片的相对两边相邻的各个部分中时,在上述两边上都形成有坝体。当电子电路部被设置在另外的一边或者多边处时,在该一边或者该多边上形成有坝体就足够了。
形成坝体25用的材料可由与形成在第一半导体芯片或第二半导体芯片上的凸块相同的层来形成,或者可以是不同的层。例如,可以使用诸如Cu、An或Ti等金属,或者可以使用诸如Sn、SnAg、SnAgCu、SnCu或AuSn等焊料。
因此,能够使第二半导体芯片与诸如焊盘电极或固体摄像部等电子电路部彼此接近,由此可使半导体器件小型化。
半导体器件制造方法
下面参照图2A至图2C、图3A至图3C、图4A至图4C、图5A至图5C以及图6A至图6C来说明本实施例的半导体器件制造方法。
图2A是本实施例中的第一半导体芯片的平面图。图2B和图2C分别是沿图2A中的X-X′线和Y-Y′线得到的示意性截面图。
至少在第一半导体芯片10的一个表面上形成电子电路部。作为上述电子电路部,形成了例如固体摄像部11。
在固体摄像部11中,例如,以彼此分开的方式形成各像素的光电二极管,并且以矩阵形式将多个包含有光电二极管的像素排列起来,由此形成光接收面。例如,视需要,在光接收面上形成绝缘膜、滤色器和片上透镜等。
另外,作为电子电路部,形成了例如焊盘电极12。
焊盘电极12例如由铝形成。将焊盘电极12形成得埋置在第一半导体芯片10的顶层附近。形成焊盘开口部12a以使得焊盘电极12的一部分露出。
另外,作为电子电路部,可以包含有例如比较器和DA转换器等其他的周边电路部。
另外,例如,以埋置在第一半导体芯片10内的方式形成与固体摄像部11、焊盘电极12等相连接的内部布线13。
在第一半导体芯片10的与该第一半导体芯片10的形成有电子电路部的那个表面相同的表面上,形成作为第一连接部的凸块底层膜20。
另外,在第二半导体芯片的安装区域(包含形成坝体用的区域)的外周部处,形成环形的凸块底层膜22。
在上述凸块底层膜20和凸块底层膜22上分别形成由焊料等制成的凸块21和凸块23。
凸块23以环形形成在上述的第二半导体芯片安装区域的外周部处。
图3A是本实施例中的第二半导体芯片的平面图。图3B和图3C分别是沿图3A中的X-X′线和Y-Y′线得到的示意性截面图。
在第二半导体芯片30上形成布线31等,并且在第二半导体芯片30的一个表面上形成作为第二连接部的凸块底层膜32。
另外,在第二半导体芯片的外缘两边上形成线型形状的凸块底层膜34,上述第二半导体芯片的外缘两边是形成坝体用的区域。
在上述凸块底层膜32和凸块底层膜34上分别形成由焊料等制成的凸块33和凸块35。
凸块35以线型形状形成在上述第二半导体芯片的外缘两边上。
图4A是示出了本实施例的半导体器件的制造工序的平面图。图4B和图4C分别是沿图4A中的X-X′线和Y-Y′线得到的示意性截面图。
根据情况适当地利用套筒(collet)40等,使上述第一半导体芯片10的凸块21和凸块23与第二半导体芯片30的凸块33和凸块35对准,然后将第二半导体芯片30安装在第一半导体芯片10上。
图5A是示出了本实施例的半导体器件的制造工序的平面图。图5B和图5C分别是沿图5A中的X-X′线和Y-Y′线得到的示意性截面图。
根据情况适当地利用焊头(bonding head)41等,在焊料熔点以下通过按压接触而在表面氧化物膜中形成破坏点,然后在加热到焊料熔化温度以后,通过在X方向和Y方向上的振动操作使焊料相互连接,从而将凸块21和凸块33合并起来成为凸块24。
与此同时,在形成坝体用的区域中,凸块23和凸块35合并起来成为凸块25。
如上所述,在本实施例中,当电子电路部设置在分别与第二半导体芯片的相对两边相邻的各个部分中时,在上述两边上均形成坝体。当电子电路部设置在另外的一边或者多边处时,在该一边或者多边上形成坝体。
另外,甚至在将由焊料制成的凸块连接起来之前就涂敷了焊剂也是没有问题的。顺便提及地,形成坝体用的凸块23及凸块35每一者可以与第一半导体芯片10的凸块21及第二半导体芯片30的凸块33同时形成,也可以单独形成。
图6A是示出了本实施例的半导体器件的制造工序的平面图。图6B和图6C分别是沿图6A中的X-X′线和Y-Y′线得到的示意性截面图。
将底部填充树脂层26形成得使其填充在第一半导体芯片10与第二半导体芯片30间的间隔中,坝体25防止底部填充树脂层26从第二半导体芯片30的外缘向诸如固体摄像部11、焊盘电极12等电子电路部这侧突出。
例如,使用给料器26d,将液态形式的树脂注入到第一半导体芯片10与第二半导体芯片30间的间隔中,该树脂将会形成底部填充树脂层。
在填充上述树脂时,例如最好形成有树脂注入口和空气出口,从而确保空气能够从第一半导体芯片10与第二半导体芯片30间的间隔中逸出的通道。
如上所述,在本实施例中,电子电路部设置在分别与第二半导体芯片的相对两边相邻的各个部分中。将除了上述两边以外的另外两边中的一者作为树脂注入口,而另一者作为空气出口。
如上所述在第一半导体芯片10与第二半导体芯片30间的间隔中用树脂形成底部填充树脂层26以后,进行热硬化处理。
在上述热硬化处理中,从底部填充树脂层26的倒角会散发出反应气体。
在本实施例的半导体器件制造方法中,上述坝体25防止了底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出。
在底部填充树脂层26的倒角与诸如固体摄像部、焊盘电极等电子电路部之间能够确保200μm以上的距离。
因此,能够防止在树脂硬化反应时从底部填充树脂层26的倒角散发出的反应气体对电子电路部造成污染。
因此,在本实施例的半导体器件制造方法中,能够使第二半导体芯片与例如焊盘电极或固体摄像部等电子电路部彼此接近,从而能够使半导体器件小型化。
第二实施例
半导体器件的构造
图7A是本实施例的半导体器件的平面图。图7B和图7C分别是沿图7A中的X-X′线和Y-Y′线得到的示意性截面图。
在层叠的第二半导体芯片的设有坝体25(以防止底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出)的外周区域中,没有形成底部填充树脂层26的倒角。
本实施例具有这样的布局:诸如焊盘电极、固体摄像部等电子电路部与第二半导体芯片在形成有坝体25的区域中彼此相邻。此种情况下的“相邻”是指电子电路部与第二半导体芯片间的距离为零或接近于零。
除了上述不同以外,第二实施例的构造与第一实施例的构造相类似。
虽然在未形成有上述坝体25的区域中形成了倒角,但是在面朝着电子电路部的所有各边上均形成有坝体。因此,甚至在其中倒角与电子电路部彼此最为接近的部分中,也能够确保倒角与电子电路部之间具有200μm以上的足够距离。
因此,能够防止在树脂硬化反应时从底部填充树脂层26的倒角散发出的反应气体对电子电路部造成污染。
于是,能够使第二半导体芯片与例如焊盘电极、固体摄像部等电子电路部彼此接近,从而能够使半导体器件小型化。
第三实施例
半导体器件的构造
图8A是本实施例的半导体器件的平面图。图8B和图8C分别是沿图8A中的X-X′线和Y-Y′线得到的示意性截面图。
坝体是按照沿着第二半导体芯片的外缘的形状而形成。具体地,在本实施例中,在第一半导体芯片10侧的环形凸块23中形成有凹状部27,该凸块23在如下部分中形成坝体:该部分中,固体摄像部11被布置得与第二半导体芯片30的区域靠近。
当诸如焊盘电极12、固体摄像部11等电子电路部存在于第二半导体芯片30附近且电子电路部的长度比第二半导体芯片30的侧壁的长度短时,仅在靠近电子电路部的部分中形成坝体就足够了。
除了上述不同以外,第三实施例的构造与第一实施例的构造相类似。
在本实施例的半导体器件中,底部填充树脂层26在第二半导体芯片30的未形成有坝体25的外周部处形成了倒角26a。
然而,上述坝体25防止底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出。
在本实施例中,关于底部填充树脂层26的倒角与诸如固体摄像部、焊盘电极等电子电路部之间的距离,能够确保200μm以上的足够距离。
因此,能够防止在树脂硬化反应时从底部填充树脂层26的倒角散发出的反应气体对电子电路部造成污染。
于是,能够使第二半导体芯片与诸如焊盘电极、固体摄像部等电子电路部彼此接近,从而能够使半导体器件小型化。
如上所述,即使当坝体形成区域仅位于电子电路部附近时,也能够获得前述的效果。
第四实施例
半导体器件制造方法
图9A和图9B是示出了本实施例的半导体器的件制造工序的截面图,也是与图1A~图1C所示的半导体器件中的X-X′线和Y-Y′线相对应的示意性截面图。
当形成底部填充树脂层时,可以在第二半导体芯片30上形成膜状的底部填充树脂层26f,并且作为底部填充树脂层的树脂的填充过程可以在与第一半导体芯片10进行凸块连接的同时予以执行。
或者,可以在第一半导体芯片10上形成膜状的底部填充树脂层26f,并且作为底部填充树脂层的树脂的填充过程可以在与第二半导体芯片30进行凸块连接的同时予以执行。
如图9A和图9B所示,对膜状的底部填充树脂层26f进行按压从而使其填充在第一半导体芯片10与第二半导体芯片30间的间隔中,而多余部分被排出到该间隔的外部。因此,预先设置有作为树脂排放口的部分以便上述多余部分能够排出是很重要的。
如上所述,在本实施例中,电子电路部设置在与第二半导体芯片的相对两边相邻的各个部分中。将除了上述两边以外的另外两边的区域作为树脂排放口。
除了上述不同以外,第四实施例的构造与第一实施例的构造相类似。
在本实施例的半导体器件制造方法中,上述坝体25防止底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出。
能够确保底部填充树脂层26的倒角与诸如固体摄像部、焊盘电极等电子电路部之间具有200μm以上的距离。
因此,能够防止在树脂硬化反应时从底部填充树脂层26的倒角散发出的反应气体对电子电路部造成污染。
于是,在本实施例的半导体器件制造方法中,能够使第二半导体芯片与诸如焊盘电极、固体摄像部等电子电路部彼此接近,从而能够使半导体器件小型化。
第五实施例
半导体器件的构造
图10A是本实施例的半导体器件的平面图。图10B和图10C分别是沿图10A中的X-X′线和Y-Y′线得到的示意性截面图。
用于防止底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出的坝体可以是树脂材料。该树脂材料的具体示例是光敏硬化树脂或者热硬化树脂,例如环氧树脂或丙烯酸树脂等。
具体地,在本实施例中,在第一半导体芯片10侧形成有替代凸块底层膜22及凸块23用的树脂层23r。
在第二半导体芯片30侧形成有替代凸块底层膜34及凸块35用的树脂层35r。
另外,第二半导体芯片30的位于电子电路部侧的外周部上,通过使上述树脂层23r和树脂层35r彼此粘接从而形成由树脂制成的坝体25r。
除了上述不同以外,第五实施例的构造与第一实施例的构造相类似。
在本实施例的半导体器件中,底部填充树脂层26在第二半导体芯片30的未形成有坝体25r的外周部处具有倒角26a。
然而,上述坝体25r防止底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出。
在本实施例中,能够确保底部填充树脂层26的倒角与诸如固体摄像部、焊盘电极等电子电路部之间具有200μm以上的足够距离。
因此,能够防止在树脂硬化反应时从底部填充树脂层26的倒角散发出的反应气体对电子电路部造成污染。
于是,能够使第二半导体芯片与诸如焊盘电极、固体摄像部等电子电路部彼此接近,从而能够使半导体器件小型化。
半导体器件制造方法
图11A和图11B是示出了本实施例的半导体器件的制造工序的截面图,也是与图10A~图10C所示的半导体器件中的X-X′线和Y-Y′线相对应的示意性截面图。
在本实施例中,在第一半导体芯片10侧图形化地形成树脂层23r来替代凸块底层膜22和凸块23。
另外,在第二半导体芯片30侧图形化地形成树脂层35r来替代凸块底层膜34和凸块35。
可以通过如下方式来实现图形化地形成上述树脂层的方法:通过膜层叠法或旋转涂敷法等将树脂材料形成为膜,然后进行光刻工序等。
例如,可以使用诸如环氧树脂、丙烯酸树脂等光敏硬化树脂或者热硬化树脂作为树脂层23r和树脂层35r。
接着,在第二半导体芯片30的位于电子电路部侧的外周部处,通过使树脂层23r和树脂层35r相互粘接从而形成由树脂制成的坝体25r。
为了使树脂层23r与第一半导体芯片10之间、树脂层35r与第二半导体芯片30之间以及树脂层23r与树脂层35r之间粘合,在凸块连接时进行加热,或者进行单独硬化。
除了上述不同以外,第五实施例的构造与第一实施例的构造相类似。
在本实施例的半导体器件制造方法中,上述坝体25r防止底部填充树脂层26从第二半导体芯片30的外缘向电子电路部侧突出。
能够确保底部填充树脂层26的倒角与诸如固体摄像部、焊盘电极等电子电路部之间具有200μm以上的距离。
因此,能够防止在树脂硬化反应时从底部填充树脂层26的倒角散发出的反应气体对电子电路部造成污染。
于是,在本实施例的半导体器件制造方法中,能够使第二半导体芯片与诸如焊盘电极或固体摄像部等电子电路部彼此接近,从而能够使半导体器件小型化。
第六实施例
应用于电子装置
图12是本实施例的电子装置的示意性框图。本实施例的电子装置是能够拍摄静态图像或能够拍摄动态图像的视频电子装置的示例。
本实施例的电子装置包括有图像传感器(具有固体摄像元件部的半导体器件)50、光学系统51和信号处理电路53等。
在本实施例中,将前述各实施例任一者的包含固体摄像元件部的半导体器件合并进来作为上述图像传感器50。
光学系统51把来自被摄物体的图像光(入射光)在图像传感器50的摄像面上形成图像。因此,在一定的周期内在图像传感器50中累积相应的信号电荷。所累积起来的信号电荷作为输出信号Vout而被取出。
快门装置对图像传感器50的光照周期和图像传感器50的遮光周期进行控制。
图像处理部提供用于对图像传感器50的传输操作及快门装置的快门操作进行控制的驱动信号。根据从图像处理部提供的驱动信号(时序信号)进行图像传感器50的信号传输。信号处理电路53对图像传感器50的输出信号Vout进行各种信号处理,随后将结果作为视频信号输出。将经过信号处理后得到的视频信号存储在诸如存储器等存储媒介中,或者输出至监视器。
另外,本发明不限于应用于被设置在半导体器件中的对入射可见光量的分布进行感测并将该分布摄取为图像的固体摄像元件部。
本发明能够应用于如下的固体摄像部:将红外线、X射线或粒子等的入射量的分布摄取为图像的固体摄像部,广义上来说,一般是例如用于感测诸如压力或电容等其他物理量的分布并将该分布摄取为图像的指纹检测传感器等固体摄像部。
另外,本发明能够应用于例如数码照相电子装置、摄像电子装置以及诸如手机等具有摄像功能的电子装置。
可以使用上述图像传感器50来作为具有固体摄像元件部的半导体器件,该半导体器件是用于摄像电子装置和数码照相电子装置以及诸如手机等移动装置的电子装置模块等。
本发明不限于上述说明。
例如,虽然已经把焊盘电极和固体摄像部作为电子电路部进行了说明,但本发明的实施例也适用于其他的电子电路部。
本发明的实施例适用于作为固体摄像部的诸如互补型金属氧化物半导体(Complementary Metal Oxide Semiconductor,CMOS)图像传感器和电荷耦合器件(Charge Coupled Device,CCD)图像传感器等各种传感器。
另外,在不背离本发明的精神的情况下,能够进行各种改变。
本领域的技术人员应当理解,依据设计要求和其他因素,可以在本发明所附的权利要求或其等同物的范围内进行各种修改、组合、次组合及改变。

Claims (16)

1.一种半导体器件,其包括:
第一半导体芯片,所述第一半导体芯片设有电子电路部和第一连接部,所述电子电路部至少形成在所述第一半导体芯片的一个表面上,所述第一连接部形成在与形成有所述电子电路部的所述表面相同的表面上;
第二半导体芯片,所述第二半导体芯片设有第二连接部,所述第二连接部形成在所述第二半导体芯片的一个表面上,所述第二半导体芯片安装在所述第一半导体芯片上,且所述第一连接部与所述第二连接部通过凸块彼此连接;
坝体,所述坝体用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔,且形成在所述第二半导体芯片的外缘的至少一部分上,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述电子电路部的区域侧;以及
底部填充树脂层,所述底部填充树脂层填充在所述第一半导体芯片与所述第二半导体芯片间的间隔中,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。
2.如权利要求1所述的半导体器件,其中,所述坝体由与形成所述凸块用的导电层相同的层形成。
3.如权利要求1所述的半导体器件,其中,所述坝体由树脂形成。
4.如权利要求1所述的半导体器件,其中,所述电子电路部是焊盘电极。
5.如权利要求1所述的半导体器件,其中,所述电子电路部是固体摄像部。
6.如权利要求1所述的半导体器件,其中,所述电子电路部与所述第二半导体芯片彼此相邻地形成。
7.如权利要求1至6任一项所述的半导体器件,其中,所述坝体按照沿着所述第二半导体芯片的所述外缘的形状而形成。
8.一种半导体器件制造方法,所述方法包括如下步骤:
至少在第一半导体芯片的一个表面上形成电子电路部,并且在与形成有所述电子电路部的所述表面相同的表面上形成第一连接部;
在第二半导体芯片的一个表面上形成第二连接部;
将所述第二半导体芯片安装在所述第一半导体芯片上,且使所述第一连接部与所述第二连接部通过凸块彼此连接;
在所述第二半导体芯片的外缘的至少一部分上形成用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔的坝体,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述电子电路部的区域侧;以及
形成底部填充树脂层,所述底部填充树脂层填充在所述第一半导体芯片与所述第二半导体芯片间的所述间隔中,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述电子电路部侧突出。
9.如权利要求8所述的半导体器件制造方法,其中,在形成所述坝体的步骤中,所述坝体由与形成所述凸块用的导电层相同的层形成。
10.如权利要求8所述的半导体器件制造方法,其中,在形成所述坝体的步骤中,所述坝体由树脂形成。
11.如权利要求8所述的半导体器件制造方法,其中,在至少在所述第一半导体芯片的一个表面上形成所述电子电路部的步骤中,形成焊盘电极作为所述电子电路部。
12.如权利要求8所述的半导体器件制造方法,其中,在至少在所述第一半导体芯片的一个表面上形成所述电子电路部的步骤中,形成固体摄像部作为所述电子电路部。
13.如权利要求8所述的半导体器件制造方法,其中,在安装所述第二半导体芯片的步骤中,将所述第二半导体芯片安装成与所述电子电路部相邻。
14.如权利要求8所述的半导体器件制造方法,其中,在形成所述坝体的步骤中,所述坝体按照沿着所述第二半导体芯片的所述外缘的形状而形成。
15.如权利要求8至14任一项所述的半导体器件制造方法,其中,在形成所述底部填充树脂层的步骤中,通过在所述第二半导体芯片的形成有所述第二连接部的表面侧层叠树脂膜,并将所述第二半导体芯片安装到所述第一半导体芯片上,来形成所述底部填充树脂层。
16.一种电子装置,其包括:
固体摄像器件;
光学系统,所述光学系统用于将入射光引导至所述固体摄像器件的摄像部;以及
信号处理电路,所述信号处理电路用于对所述固体摄像器件的输出信号进行处理,
其中,所述固体摄像器件包括:
第一半导体芯片,所述第一半导体芯片设有固体摄像部和第一连接部,所述固体摄像部至少形成在所述第一半导体芯片的一个表面上,所述第一连接部形成在与形成有所述固体摄像部的所述表面相同的表面上;
第二半导体芯片,所述第二半导体芯片设有第二连接部,所述第二连接部形成在所述第二半导体芯片的一个表面上,所述第二半导体芯片安装在所述第一半导体芯片上,且所述第一连接部与所述第二连接部通过凸块彼此连接;
坝体,所述坝体用于填充所述第一半导体芯片与所述第二半导体芯片间的间隔,且形成在所述第二半导体芯片的外缘的至少一部分上,所述第二半导体芯片的所述外缘的所述至少一部分位于形成有所述固体摄像部的区域侧;以及
底部填充树脂层,所述底部填充树脂层填充在所述第一半导体芯片与所述第二半导体芯片间的所述间隔中,所述坝体防止所述底部填充树脂层从所述第二半导体芯片的所述外缘向所述固体摄像部侧突出。
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104299945A (zh) * 2013-07-19 2015-01-21 索尼公司 固态成像设备及其制造方法
CN104505393A (zh) * 2014-09-16 2015-04-08 华天科技(昆山)电子有限公司 背照式影像传感器三维堆叠封装结构及封装工艺
CN105858589A (zh) * 2015-02-10 2016-08-17 英特尔公司 具有倒棱角的微电子管芯
CN106796941A (zh) * 2014-09-11 2017-05-31 索尼半导体解决方案公司 固体摄像器件、摄像装置、电子设备和半导体装置
CN111630645A (zh) * 2018-01-25 2020-09-04 浜松光子学株式会社 半导体装置、及半导体装置的制造方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014064837A1 (ja) * 2012-10-26 2014-05-01 オリンパス株式会社 固体撮像装置、撮像装置および信号読み出し方法
JP2016027586A (ja) * 2012-11-29 2016-02-18 パナソニック株式会社 光学装置および光学装置の製造方法
WO2014083750A1 (ja) 2012-11-30 2014-06-05 パナソニック株式会社 光学装置及びその製造方法
JP5799973B2 (ja) * 2013-04-15 2015-10-28 株式会社村田製作所 セラミック多層配線基板およびこれを備えるモジュール
US9368458B2 (en) 2013-07-10 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Die-on-interposer assembly with dam structure and method of manufacturing the same
WO2015056430A1 (ja) * 2013-10-16 2015-04-23 パナソニック株式会社 半導体装置
US10020236B2 (en) * 2014-03-14 2018-07-10 Taiwan Semiconductar Manufacturing Campany Dam for three-dimensional integrated circuit
JP6432737B2 (ja) 2015-03-04 2018-12-05 セイコーエプソン株式会社 Memsデバイス、ヘッド及び液体噴射装置
JP6295983B2 (ja) 2015-03-05 2018-03-20 ソニー株式会社 半導体装置およびその製造方法、並びに電子機器
JP6693068B2 (ja) * 2015-03-12 2020-05-13 ソニー株式会社 固体撮像装置および製造方法、並びに電子機器
CN107025481B (zh) * 2016-02-02 2021-08-20 上海伯乐电子有限公司 柔性印制电路板及应用其的智能卡模块和智能卡
US11676929B2 (en) 2016-10-21 2023-06-13 Sony Semiconductor Solutions Corporation Electronic substrate and electronic apparatus
JP6946316B2 (ja) * 2016-10-21 2021-10-06 ソニーセミコンダクタソリューションズ株式会社 電子基板、および電子装置
JP7353121B2 (ja) * 2019-10-08 2023-09-29 キヤノン株式会社 半導体装置および機器
US11862550B2 (en) 2021-09-30 2024-01-02 Advanced Semiconductor Engineering, Inc. Electronic package structure and method of manufacturing the same

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004228106A (ja) * 2003-01-20 2004-08-12 Nec Kansai Ltd 半導体装置
JP2006216670A (ja) * 2005-02-02 2006-08-17 Kyocera Chemical Corp 光学的電子装置
US20070007667A1 (en) * 2004-04-12 2007-01-11 Deok-Hoon Kim Electronic package having a sealing structure on predetermined area, and the method thereof
CN100444392C (zh) * 2003-06-18 2008-12-17 三星电子株式会社 固态成像方法及装置
CN100502024C (zh) * 2004-07-30 2009-06-17 索尼株式会社 半导体模块、摄像机及摄像机的制造方法
TW200941677A (en) * 2008-03-27 2009-10-01 Phoenix Prec Technology Corp Package substrate and fabrication method thereof

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2522039B2 (ja) * 1989-04-12 1996-08-07 日本電気株式会社 フィルムキャリヤ型半導体装置
JPH06204442A (ja) 1993-01-07 1994-07-22 Matsushita Electron Corp 固体撮像装置およびその製造方法
JP3367272B2 (ja) * 1994-05-16 2003-01-14 株式会社日立製作所 リードフレーム及び半導体装置
KR100343432B1 (ko) 2000-07-24 2002-07-11 한신혁 반도체 패키지 및 그 패키지 방법
JP3544970B2 (ja) * 2002-09-30 2004-07-21 沖電気工業株式会社 Cofテープキャリア、半導体素子、半導体装置
JP2005116628A (ja) * 2003-10-03 2005-04-28 Matsushita Electric Ind Co Ltd 固体撮像装置およびその製造方法
JP4415717B2 (ja) 2004-03-23 2010-02-17 ソニー株式会社 半導体装置及びその製造方法
WO2007069606A1 (ja) * 2005-12-14 2007-06-21 Shinko Electric Industries Co., Ltd. チップ内蔵基板およびチップ内蔵基板の製造方法
JP2008103571A (ja) * 2006-10-19 2008-05-01 Toshiba Corp 半導体装置及びその製造方法
JP5331303B2 (ja) 2006-11-09 2013-10-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2008124161A (ja) * 2006-11-10 2008-05-29 Misuzu Kogyo:Kk 電子装置収納パッケージ、および電子装置収納パッケージの製造方法
JP4435187B2 (ja) 2007-02-05 2010-03-17 株式会社東芝 積層型半導体装置
JP4441545B2 (ja) 2007-03-30 2010-03-31 Okiセミコンダクタ株式会社 半導体装置
KR20100108109A (ko) * 2009-03-27 2010-10-06 삼성전자주식회사 이미지 센서 및 그 제조 방법
US8227288B2 (en) * 2009-03-30 2012-07-24 Taiwan Semiconductor Manufacturing Company, Ltd. Image sensor and method of fabricating same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004228106A (ja) * 2003-01-20 2004-08-12 Nec Kansai Ltd 半導体装置
CN100444392C (zh) * 2003-06-18 2008-12-17 三星电子株式会社 固态成像方法及装置
US20070007667A1 (en) * 2004-04-12 2007-01-11 Deok-Hoon Kim Electronic package having a sealing structure on predetermined area, and the method thereof
CN100502024C (zh) * 2004-07-30 2009-06-17 索尼株式会社 半导体模块、摄像机及摄像机的制造方法
JP2006216670A (ja) * 2005-02-02 2006-08-17 Kyocera Chemical Corp 光学的電子装置
TW200941677A (en) * 2008-03-27 2009-10-01 Phoenix Prec Technology Corp Package substrate and fabrication method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104299945A (zh) * 2013-07-19 2015-01-21 索尼公司 固态成像设备及其制造方法
CN106796941A (zh) * 2014-09-11 2017-05-31 索尼半导体解决方案公司 固体摄像器件、摄像装置、电子设备和半导体装置
CN106796941B (zh) * 2014-09-11 2020-08-18 索尼半导体解决方案公司 固体摄像器件、摄像装置、电子设备和半导体装置
CN104505393A (zh) * 2014-09-16 2015-04-08 华天科技(昆山)电子有限公司 背照式影像传感器三维堆叠封装结构及封装工艺
CN105858589A (zh) * 2015-02-10 2016-08-17 英特尔公司 具有倒棱角的微电子管芯
CN111630645A (zh) * 2018-01-25 2020-09-04 浜松光子学株式会社 半导体装置、及半导体装置的制造方法
CN111630645B (zh) * 2018-01-25 2023-10-17 浜松光子学株式会社 半导体装置、及半导体装置的制造方法

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