CN101989557B - 半导体装置的制造方法以及半导体装置 - Google Patents
半导体装置的制造方法以及半导体装置 Download PDFInfo
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- CN101989557B CN101989557B CN2010102435438A CN201010243543A CN101989557B CN 101989557 B CN101989557 B CN 101989557B CN 2010102435438 A CN2010102435438 A CN 2010102435438A CN 201010243543 A CN201010243543 A CN 201010243543A CN 101989557 B CN101989557 B CN 101989557B
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Abstract
Description
Claims (16)
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JP178179/2009 | 2009-07-30 | ||
JP143085/2010 | 2010-06-23 | ||
JP2010143085A JP5355504B2 (ja) | 2009-07-30 | 2010-06-23 | 半導体装置の製造方法および半導体装置 |
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CN101989557A CN101989557A (zh) | 2011-03-23 |
CN101989557B true CN101989557B (zh) | 2012-10-10 |
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Cited By (2)
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CN105575823A (zh) * | 2015-12-24 | 2016-05-11 | 南通富士通微电子股份有限公司 | 半导体器件扇出封装结构的制作方法 |
CN105789066A (zh) * | 2016-05-09 | 2016-07-20 | 南通富士通微电子股份有限公司 | 一种半导体封装结构的制造方法 |
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US8759118B2 (en) | 2011-11-16 | 2014-06-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plating process and structure |
US8569886B2 (en) * | 2011-11-22 | 2013-10-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus of under bump metallization in packaging semiconductor devices |
US8536573B2 (en) * | 2011-12-02 | 2013-09-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plating process and structure |
JP5908578B2 (ja) * | 2012-03-14 | 2016-04-26 | パナソニック株式会社 | 半導体装置 |
JP5852937B2 (ja) * | 2012-07-26 | 2016-02-03 | 株式会社ソシオネクスト | 半導体装置及びその製造方法 |
JP6160360B2 (ja) * | 2013-08-19 | 2017-07-12 | 富士通セミコンダクター株式会社 | 電子デバイス及びその製造方法 |
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TWI593069B (zh) * | 2014-10-07 | 2017-07-21 | 精材科技股份有限公司 | 晶片封裝體及其製造方法 |
US10153175B2 (en) * | 2015-02-13 | 2018-12-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal oxide layered structure and methods of forming the same |
JP2016225466A (ja) | 2015-05-29 | 2016-12-28 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
JP2017045900A (ja) * | 2015-08-27 | 2017-03-02 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
KR20170068095A (ko) | 2015-12-09 | 2017-06-19 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
US20180130768A1 (en) * | 2016-11-09 | 2018-05-10 | Unisem (M) Berhad | Substrate Based Fan-Out Wafer Level Packaging |
US20180130720A1 (en) * | 2016-11-09 | 2018-05-10 | Unisem (M) Berhad | Substrate Based Fan-Out Wafer Level Packaging |
US20190259731A1 (en) * | 2016-11-09 | 2019-08-22 | Unisem (M) Berhad | Substrate based fan-out wafer level packaging |
JP2018116974A (ja) * | 2017-01-16 | 2018-07-26 | ラピスセミコンダクタ株式会社 | 半導体装置及び半導体装置の製造方法 |
US10211052B1 (en) * | 2017-09-22 | 2019-02-19 | Lam Research Corporation | Systems and methods for fabrication of a redistribution layer to avoid etching of the layer |
TWI744498B (zh) * | 2018-03-05 | 2021-11-01 | 矽品精密工業股份有限公司 | 基板結構及其製法 |
US10903151B2 (en) * | 2018-05-23 | 2021-01-26 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
JP7154913B2 (ja) * | 2018-09-25 | 2022-10-18 | 株式会社東芝 | 半導体装置及びその製造方法 |
US10522488B1 (en) * | 2018-10-31 | 2019-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Patterning polymer layer to reduce stress |
CN112289692B (zh) * | 2019-07-24 | 2024-06-04 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的形成方法 |
TWI766283B (zh) * | 2020-05-22 | 2022-06-01 | 南茂科技股份有限公司 | 半導體元件 |
CN115117012A (zh) * | 2022-05-09 | 2022-09-27 | 上海沛塬电子有限公司 | 一种表面设置有金属凸点结构的载板的制作方法及其应用 |
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- 2010-06-23 JP JP2010143085A patent/JP5355504B2/ja not_active Expired - Fee Related
- 2010-07-29 US US12/845,937 patent/US8314491B2/en active Active
- 2010-07-30 CN CN2010102435438A patent/CN101989557B/zh active Active
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CN105575823A (zh) * | 2015-12-24 | 2016-05-11 | 南通富士通微电子股份有限公司 | 半导体器件扇出封装结构的制作方法 |
CN105789066A (zh) * | 2016-05-09 | 2016-07-20 | 南通富士通微电子股份有限公司 | 一种半导体封装结构的制造方法 |
Also Published As
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JP5355504B2 (ja) | 2013-11-27 |
US8314491B2 (en) | 2012-11-20 |
JP2011049530A (ja) | 2011-03-10 |
CN101989557A (zh) | 2011-03-23 |
US20110024901A1 (en) | 2011-02-03 |
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