CN102148201B - 半导体元件、封装结构、及半导体元件的形成方法 - Google Patents

半导体元件、封装结构、及半导体元件的形成方法 Download PDF

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CN102148201B
CN102148201B CN2011100311740A CN201110031174A CN102148201B CN 102148201 B CN102148201 B CN 102148201B CN 2011100311740 A CN2011100311740 A CN 2011100311740A CN 201110031174 A CN201110031174 A CN 201110031174A CN 102148201 B CN102148201 B CN 102148201B
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solder
projection
cap rock
metal cap
layer
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CN102148201A (zh
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萧义理
余振华
郑心圃
董志航
魏程昶
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本发明实施例提供了一种半导体元件、封装结构、及半导体元件的形成方法，本发明实施例的半导体元件中提供的焊料凸块，位于焊盘区上并电性连接至焊盘区。此外，形成金属盖层于至少部分的焊料凸块上。金属盖层的熔点高于焊料凸块的熔点。本发明实施例中，金属盖层可作为硬停元件，使封装完成后的凸块结构维持一致的高度，可减少甚至避免短路或桥接等问题。

Description

半导体元件、封装结构、及半导体元件的形成方法
技术领域
本发明涉及半导体元件，尤其涉及半导体元件中的凸块结构的工艺。
背景技术
现代的集成电路是由水平排列，且数以百万计的有源元件如晶体管和/或无源元件如电容组成。这些元件在初期工艺中彼此绝缘，但在后续工艺中以内连线连接元件以形成功能电路。典型的内连线结构包含水平内连线如金属线路，与垂直内连线如接孔和接点。现代集成电路的效能与密度取决于内连线。在内连线结构顶部，每一芯片表面上各自形成有露出的焊盘。经由焊盘，芯片可电性连接至封装基板或另一裸片。焊盘可用以打线接合或倒装芯片接合。在一般的凸块工艺中，内连线结构形成于金属化层上，接着再形成凸块下冶金层(UBM)与焊球。倒装芯片封装采用凸块作为芯片的输入/输出焊盘与基板(或封装的导线架)之间的电性接点。结构上来说，凸块除了凸块本身以外，还含有所谓的UBM位于凸块与输入/输出焊盘之间。位UBM一般含有黏着层、阻挡层、与湿润层依序位于输入/输出焊盘上。凸块依其材料组成可分为焊料凸块、金凸块、铜柱凸块、或混合金属凸块。
一般来说，用于焊料合金的材料为所谓的锡铅共熔焊料，其中铅占38重量％。近来半导体产业开始转用无铅封装与无铅元件的连接技术。上述趋势导致形成集成电路与封装的连接结构的焊料凸块与焊球无铅。与含铅焊料或焊球相比较，无铅焊料对环保、劳工、与消费者来说较安全。然而无铅焊料凸块的品质与可靠度并非永远符合需求。对更小的脚距与更大的集成密度来说，在工艺与倒装芯片封装中采用无铅焊料产生短路的风险更高。
发明内容
为了克服现有技术中存在的缺陷，本发明一实施例提供一种半导体元件，包括半导体基板；焊盘区位于半导体基板上；焊料凸块位于焊盘区上并电性连接至焊盘区；以及金属盖层位于至少部分焊料凸块上；其中金属盖层的熔点高于焊料凸块的熔点。
本发明另一实施例提供一种封装结构，包括半导体基板；封装基板；以及凸块结构位于半导体基板与封装基板之间，且凸块结构电性连接半导体基板与封装基板；其中凸块结构包括焊料凸块与金属盖层，金属盖层覆盖至少部分焊料凸块，且金属盖层的熔点高于焊料凸块的熔点。
本发明又一实施例提供一种半导体元件的形成方法，包括形成焊料层于半导体基板上；进行再流动热工艺于焊料层上；以及形成金属盖层于至少部分焊料层上；其中金属盖层的熔点高于焊料层的熔点。
本发明实施例中，金属盖层可作为硬停元件，使封装完成后的凸块结构维持一致的高度，可减少甚至避免短路或桥接等问题。
附图说明
图1A-图1G是本发明一实施例中，部分半导体元件在凸块工艺中的结构剖视图；
图2A-图2C是本发明一实施例中，部分半导体元件在凸块工艺中的结构剖视图；
图3A-图3D是本发明一实施例中，部分半导体元件在凸块工艺中的结构剖视图；以及
图4A-图4E是本发明一实施例中，部分导体元件在凸块工艺中的结构剖视图。
【主要附图标记说明】
10～半导体基板；12～焊盘区；14～保护层；16～凸块下冶金层；18～掩模层；19～开口；20～金属化层；22～焊料层；22a～焊料柱；22b、22c、22d、22e～焊料凸块；22e1～底部的凸块；22s1、22su～焊料柱较上方的侧壁表面；22s1t～焊料柱的侧壁顶部表面；22sL、22s2～焊料柱较上方的侧壁表面；22sm～焊料柱中间部分的侧壁表面；22t～焊料柱顶部表面；24～金属盖层；26、28a、28b、30、32～凸块结构；100～基板；102～连接结构；104～接触焊盘；106～焊料层；108a、108b、108c、108d～接点焊料结构；200、300、400、500～封装结构。
具体实施方式
下述说明的半导体元件中的凸块工艺，可应用于倒装芯片封装、晶片等级的芯片尺寸封装(WLCSP)、三维集成电路(3D-IC)堆叠、和/或任何先进的封装技术领域。实施例是关于半导体元件所用的焊料凸块及其形成方法。在下述说明中，多种特例会先置前以利本领域技术人员对本发明有全面性的了解。然而本领域技术人员应理解，实际上的操作并不需完全符合这些特例。在某些例子中，不会详细地描述本领域熟知的结构与工艺，以避免不必要地模糊公开内容。在下述说明中，“一实施例”指的是特定特征、结构、或至少一实施例中包含的实施例所连结的结构。因此，不同段落中的“一实施例”指的不一定是同一实施例。此外，一或多个实施例中的特定特征、结构、或特点可由任何合适形式组合。可以理解的是，下述附图并非依比例绘示，仅用以方便说明而已。此外在一或多个实施例中，上述特定特征或结构可采用合适的形式组合。可以理解的是，下述附图并未以比例绘示，仅用以示意说明。
图1A-图1G是本发明一实施例中，部分半导体元件在凸块工艺中的结构剖视图。
如图1A所示，提供半导体基板10以利后续凸块工艺形成其中，且集成电路也可形成其中和/或其上。半导体基板10的组成可包含半导体材料，比如但不限定于基体硅、半导体晶片、绝缘层上硅(SOI)基板、或硅锗基板。半导体基板10也可含有III族、IV族、或V族元素。半导体基板10可包含多个绝缘结构(未示出)如浅沟槽绝缘(STI)结构或局部氧化硅(LOCOS)结构。绝缘结构可用以隔离多个微电子单元(未示出)。形成于半导体基板10中的多个微电子单元含有晶体管如金属氧化物半导体场效晶体管(MOSFET)、互补式金属氧化物半导体(CMOS)晶体管、双极结连接晶体管(BJT)、高电压晶体管、高频晶体管、p沟道和/或n沟道场效晶体管(PFET/NFET)，电阻，二极管，电容，电感，熔丝，或其他合适单元。形成多种微电子单元的多种工艺含有沉积、蚀刻、注入、光刻、回火、或其他合适工艺。微电子单元可经由内连线形成集成电路元件如逻辑元件、输入/输出元件、系统单芯片(SoC)元件、上述的组合、或其他合适种类的元件。
半导体基板10还可含有层间介电层与金属化结构于集成电路上。位于金属化结构中的层间介电层含有低介电常数的介电材料、未掺杂的硅酸盐玻璃(USG)、氮化硅、氮氧化硅、或其他常用材料。低介电常数的介电材料的介电常数(k值)可小于约3.9，或小于约2.8。金属化结构中的金属线的组成可为铜或铜合金。本领域普通技术人员应了解金属化层的形成方法，在此不赘述。
如图1A所示，在半导体基板10上形成焊盘区12与保护层14。焊盘区12形成于层间介电层上的金属化层。焊盘区12是部分的导电线路，且可根据需要进行平坦化工艺于焊盘区12露出的表面上。适用于焊盘区12的材料可为但不限定于铜、铝、铜合金、或其他现有的导电材料。焊盘区12的组成也可为银、金、镍、钨、上述的合金、和/或上述的多层结构。在一实施例中，焊盘区12为焊盘区，可在接合工艺中使个别芯片的集成电路连线至外部结构。形成于半导体基板10上的保护层14位于焊盘区12上。借由光刻与蚀刻工艺，可图案化保护层14以形成开口露出部分的焊盘区12。在一实施例中，保护层14的组成为非有机材料如USG、氮化硅、氮氧化硅、氧化硅、或上述的组合上。在另一实施例中，保护层14的组成为有机材料如环氧树脂、聚酰亚胺、双苯并环丁烷(BCB)、聚苯并恶唑(PBO)、或其他较软的有机介电材料。
图1A也显示凸块下冶金层16形成于保护层14上并电性连接至焊盘区12。凸块下冶金层16形成于保护层14上，并露出部分焊盘区12。在一实施例中，凸块下冶金层16含有扩散阻挡层和/或籽晶层。扩散阻挡层又称作胶层，覆盖保护层14的开口的侧壁及底部。扩散阻挡层的组成可为钛，也可为其他材料如氮化钛、钽、氮化钽、或类似物。扩散阻挡层的形成方法可为物理气相沉积法(PVD)或溅镀法。籽晶层可为形成于扩散阻挡层上的铜籽晶层，其形成方法可为PVD或溅镀。籽晶层的组成可为铜合金，除了铜以外还含有银、铬、镍、锡、金、或上述的组合。在一实施例中，凸块下冶金层16为铜/钛层。扩散阻挡层的厚度可介于约
Figure BSA00000429252100041
至
Figure BSA00000429252100042
之间，而籽晶层的厚度可介于约
Figure BSA00000429252100043
至
Figure BSA00000429252100044
之间，不过上述层状结构的厚度可大于或小于上述范围。在后述公开中的尺寸范围仅用以举例，可随着更小尺寸的集成电路调整。
图1A也显示掩模层18形成于凸块下冶金层16上，并可图案化掩模层18以形成开口19。举例来说，图案化掩模层18的方法可为曝光、显影、及蚀刻。开口19可露出部分凸块下冶金层16以利形成凸块。掩模层18可为干膜或光致抗蚀剂膜。在一实施例中，掩模层18为干膜，其组成可为有机材料如Ajinimoto增层膜(ABF)。在另一实施例中，掩模层18为光致抗蚀剂。掩模层18的厚度可大于约5μm，或介于约10μm至约120μm之间。
如图1B图所示，在掩模层18的开口19中形成焊料层22，使焊料层22位于凸块下冶金层16上。焊料层22的组成为锡、锡银、锡铅、锡银铜(铜的重量％小于0.3％)、锡银锌、锡锌、锡铋铟、锡铟、锡金、锡铅、锡铜、锡锌铟、锡银锑、或类似物。在一实施例中，焊料层22为无铅焊料层。在某些实施例中，在形成焊料层22之前，可视情况先沉积金属化层20于开口19中。金属化层20的厚度小于10μm。在某些实施例中，金属化层20的厚度介于约1μm至10μm之间，比如4μm至8μm之间，不过金属化层20的厚度可大于或小于上述范围。金属化层20的形成方法可为电镀法。在一实施例中，金属化层20的组成可为铜层、铜合金层、镍层、镍合金层、或上述的组合。在某些实施例中，金属化层20含有金、银、钯、铟、镍钯金、镍金、或其他类似材料或合金。
接着如图1C图所示，移除掩模层18。若掩模层18的组成为干膜，其移除方法需采用碱性溶液。若掩模层18的组成为光致抗蚀剂，其移除方法为湿式剥除法，其采用的溶剂可为丙酮、N-甲基吡咯烷酮(NMP)、二甲基亚砜(DMSO)、2-(氨基乙氧基)乙醇、或类似物。上述移除步骤将露出未被焊料层22覆盖的凸块下冶金层16，并使焊料层22形成焊料柱22a。在一实施例中，焊料柱22a的厚度大于40μm。在其他实施例中，焊料柱22a的厚度介于约40μm至70μm之间，但焊料柱的厚度也可大于或小于上述范围。接着如图1D所示，移除露出的凸块下冶金层16并露出其下方的保护层14，且移除方法可为蚀刻如湿蚀刻、干蚀刻、或类似方法。
如图1E所示，于焊料柱22a上进行再流动热工艺，形成球状的焊料凸块22b。在热循环中，可形成金属间化合物(IMC)层于焊料凸块22b与金属化层20之间。形成IMC层可消耗金属化层20。
如图1F所示，形成金属盖层24于至少部分露出的焊料凸块22b上。在一实施例中，金属盖层24形成于焊料凸块22b的所有表面上。在其他实施例中，金属盖层24延伸至覆盖金属化层20与凸块下冶金层16的表面上。金属盖层24为金属材料层，其溶点高于焊料层22的熔点。在某些实施例中，金属盖层24的组成为铜、镍、金、银、钯、铟、镍钯金、镍金、其他类似材料、或合金。在某些实施例中，金属盖层24还包含其他用于半导体封装的导电材料如铟、铂、钴、钒、或上述的合金。在一实施例中，金属盖层24的厚度介于约0.02μm至5μm之间，但金属盖层24的厚度也可大于或小于上述范围。金属盖层24可为单层或多层结构。在一实施例中，金属盖层24的沉积方法可为无电或浸润金属沉积工艺，比如无电镍无电钯与浸金结构(无电镍/无电钯/浸润金的堆叠结构，ENEPIG)、无电镍无电钯结构(无电镍/无电钯的堆叠结构，ENEP)、无电镍层(EN)、无电镍与浸金结构(无电镍/浸润金的堆叠结构，ENIG)、或上述的组合。
上述步骤形成的凸块结构26具有凸块下冶金层16、视情况形成的金属化层20、焊料凸块22b、与金属盖层24。此实施例的凸块结构26可具有不同尺寸的直径，且可包含所谓的微凸块。举例来说，凸块结构26的直径可介于65μm至80μm之间。凸块结构26之间的脚距可小于150μm，比如介于130μm至140μm之间，甚至更小的尺寸。在微凸块的应用中，凸块之间的脚距可介于20μm至50μm之间，且凸块直径可介于10μm至25μm之间。凸块结构26被金属盖层24覆盖的部分较硬，其熔点也高于焊料凸块22b的熔点。在实质上推挤基板时，金属盖层24可让焊料凸块22b作为弹簧或充气的气球，以避免破坏凸块结构26。某方面来说，金属盖层24可作为硬停元件(hard stop)。封装完成后，凸块结构26可维持一致的高度，可减少甚至避免短路或桥接等问题。
如图1G所示，是应用凸块结构26的封装结构的示意图。在形成凸块结构26后切割半导体基板10，并将其嵌置于封装基板或另一裸片上的焊盘上的铜柱或焊球。经上述步骤后，可将图1F的结构连接至另一基板100。基板100可为封装基板、板子如印刷电路板(PCB)、或其他合适基板。连接结构102接触基板100的方式可为多种导电接点，比如位于接触焊盘104和/或导电线上的焊料层106。焊料层106可为共熔焊料如含有锡、铅、银、铜、镍、铋、或上述的组合的合金。举例来说，耦合工艺含有采用助焊剂、放置芯片、熔融的焊料接点的再流动热工艺、与清除助焊剂残余物。经上述耦合步骤，即形成接点焊料结构108a于半导体基板10与基板100之间。半导体基板10、接点焊料结构108a、与基板100可称作封装结构200，或称之为倒装芯片封装。在某些实施例的封装结构的热循环步骤中，金属盖层24可与焊料凸块22b和/或焊料层106反应，在接点焊料结构108a中形成金属间化合物(IMC)。此外，在热循环步骤后，金属盖层24中的金属元素会扩散至焊料凸块22b和/或焊料层106。金属间化合物(IMC)会消耗部分金属盖层24。可以发现的是，在焊料凸块22b上采用金属盖层24有助于完成的封装结构具有更一致的高度，进而改善半导体元件的可靠度。
图2A-图2C是本发明一实施例中，部分半导体元件在凸块工艺中的结构剖视图。在下述说明中，将省略与图1A-图1G重叠的部分。
如图2A所示，在图1D中蚀刻凸块下冶金层的工艺后，接着形成金属盖层24。如此一来，在进行焊料再流动的热工艺之前，已先形成金属盖层24于焊料柱22a上。在一实施例中，以无电或浸润法沉积金属盖层24于焊料柱22a的整个表面上。在某些实施例中，金属盖层24延伸至覆盖部分的金属化层20与凸块下冶金层16。这将使凸块结构28a含有凸块下冶金层16、视情况形成的金属化层20、焊料柱22a、与金属盖层24。在实质上推挤基板时，金属盖层24可让焊料柱22a作为弹簧或充气的气球。金属盖层24可作为硬停元件，使封装完成后的凸块结构28a维持一致的高度，可减少甚至避免短路或桥接等问题。
在另一实施例中，凸块结构28a接着进行焊料再流动的热工艺。如图2B所示，热工艺可再流动焊料柱22a，使其形成具有圆润边角的焊料凸块22c。在一实施例的剖视图中，焊料凸块22c具有圆润边角。此外在热循环的步骤后，金属盖层24中的金属元素可能扩散至焊料凸块22c。这将形成另一焊料凸块28b，其含有凸块下冶金层16、视情况形成的金属化层20、具有圆润边角的焊料凸块22c、与金属盖层24。在实质上推挤基板时，金属盖层24可让焊料凸块22c作为弹簧或充气的气球。金属盖层24可作为硬停元件，使封装完成后的凸块结构28b维持一致的高度，可减少甚至避免短路或桥接等问题。
如图2C所示，是应用凸块结构28b的封装结构的示意图。在形成凸块结构28a或28b后切割半导体基板10，并经由连接结构102将其嵌置于另一基板100。连接结构102可为位于接触焊盘104和/或导电线上的焊料层106。经由耦合步骤，可形成接点焊料结构108b于半导体基板10与基板100之间。半导体基板10、接点焊料结构108b、与基板100可称作封装结构300。在形成凸块结构28a于半导体基板10上的情况下，耦合工艺的热能可使焊料柱22a再流动，以形成具有圆润边角的焊料凸块22c，使焊料结构28a转变为封装结构300中的焊料结构28b。此外在热循环后，金属盖层24的金属元素可能会扩散至焊料凸块22c和/或焊料层106中。可以发现的是，凸块结构28a与28b的金属盖层24有助于完成的封装结构具有一致的高度，进而改善半导体元件的可靠度。
图3A-图3D是本发明一实施例中，部分半导体元件在凸块工艺中的结构剖视图。在下述说明中，将省略与图1A-图1G重叠的部分。
如图3A所示，移除掩模层形成图1C所示的结构后，形成金属盖层24。如此一来，在蚀刻凸块下冶金层16的步骤前，已先形成金属盖层24于焊料柱22a与部分露出的凸块下冶金层16上。在一实施例中，形成金属盖层24于焊料柱22a的整个表面上的方法可为电镀法、无电电镀法、或化学气相沉积法(CVD)。
接着如图3B所示，进行蚀刻工艺如湿蚀刻、干蚀刻、或类似方法移除焊料柱22a以外的凸块下冶金层16，直到露出保护层14。上述蚀刻工艺将移除焊料柱22a以外的金属盖层24与凸块下冶金层16，也移除焊料柱22a表面上的部分金属盖层24。在一实施例中，位于焊料柱22a顶部上的部分金属盖层24被移除，以露出焊料柱22a的顶部表面22t。在某些实施例中，邻接焊料柱22a较上方的侧壁表面的部分金属盖层24被移除，以露出焊料柱22a较上方的侧壁表面22su。此时金属盖层24保留于焊料柱22a较下方的侧壁表面22sL上。
如图3C图所示，进行热工艺使焊料柱22a再流动，以形成圆润表面的焊料凸块22d。在热循环步骤后，金属盖层24中的金属元素会扩散至焊料凸块22d，可形成金属间化合物(IMC)于焊料凸块22d与金属盖层24之间。这将使凸块结构30含有凸块下冶金层16、视情况形成的金属化层20、焊料柱22d、与金属盖层24。金属盖层24保留于焊料凸块22d较下方的侧壁表面22sL上。在实质上推挤基板时，金属盖层24可让焊料凸块22d作为弹簧或充气的气球。金属盖层24可作为硬停元件，使封装完成后的凸块结构30维持一致的高度，可减少甚至避免短路或桥接等问题。
如图3D所示，是应用凸块结构30的封装结构的示意图。在形成凸块结构30后切割半导体基板10，并经由连接结构102将其嵌置于另一基板100。连接结构102可为位于接触焊盘104和/或导电线上的焊料层106。经由耦合步骤，可形成接点焊料结构108c于半导体基板10与基板100之间。半导体基板10、接点焊料结构108c、与另一基板100可称作封装结构400。可以发现的是，凸块结构30的金属盖层24有助于完成的封装结构具有一致的高度，进而改善半导体元件的可靠度。
图4A-图4E是本发明一实施例中，部分导体元件在凸块工艺中的结构剖视图。在下述说明中，将省略与图1A-图1G重叠的部分。
如图4A所示，在形成焊料层22于掩模层18的开口19后，移除部分掩模层18以露出部分的焊料柱22a并保留部分掩模层18于焊料柱22a靠近底部的部分。在一实施例中，上述步骤露出焊料柱22a的顶部表面22t及较上方的侧壁表面22s1。举例来说，此步骤可露出超过50％的侧壁表面，比如露出约70％至80％之间的侧壁表面。
接着如图4B图所示，形成金属盖层24于焊料柱22a露出的表面上，其形成方法可为电镀法或无电电镀法。之后再移除残留的掩模层18。如此一来，金属盖层24可形成于焊料柱22a露出的表面如顶部表面22t及较上方的侧壁表面22s1上。在完全移除掩模层18后，将露出凸块下冶金层16与焊料柱22a较下方的侧壁表面22s2。
接着如图4C所示，进行蚀刻工艺如湿蚀刻、干蚀刻、或类似方法移除焊料柱22a以外的凸块下冶金层16，直到露出保护层14。上述蚀刻工艺也移除焊料柱22a表面上的部分金属盖层24。在一实施例中，位于焊料柱22a顶部上的部分金属盖层24被移除，以露出焊料柱22a的顶部表面22t。在某些实施例中，位于焊料柱22a较上方的侧壁上的部分金属盖层24被移除，以露出焊料柱22a的侧壁顶部表面22s1t，使金属盖层24保留于焊料柱22a的中间部分的侧壁表面22sm上。
如图4D所示，进行热工艺使焊料柱22a再流动，以形成卵状的焊料凸块22e。由于金属盖层24的熔点高于焊料，底部的凸块22e1将会水平延展出金属盖层24。底部的凸块22e1具有多种好处如下：具有额外的应力缓冲结构、增加焊料凸块与其下材料层之间的黏着力、以及提供机械应力缓冲。在热循环步骤中，金属盖层24中的金属元素会扩散至焊料凸块22e，可形成金属间化合物(IMC)于焊料凸块22e与金属盖层24之间。
上述步骤形成的凸块结构32含有凸块下冶金层16、视情况形成的金属化层20、焊料柱22e、与金属盖层24。在实质上推挤基板时，金属盖层24可让焊料凸块22e作为弹簧或充气的气球。金属盖层24可作为硬停元件，使封装完成后的凸块结构30维持一致的高度，可减少甚至避免短路或桥接等问题。
如图4E所示，是应用凸块结构32的封装结构的示意图。在形成凸块结构32后切割半导体基板10，并经由连接结构102将其嵌置于另一基板100。连接结构102可为位于接触焊盘104和/或导电线上的焊料层106。经由耦合步骤，可形成接点焊料结构108d于半导体基板10与基板100之间。半导体基板10、接点焊料结构108d、与另一基板100可称作封装结构500。可以发现的是，凸块结构32的金属盖层24有助于完成的封装结构具有一致的高度，进而改善半导体元件的可靠度。
虽然本发明已以数个较佳实施例公开如上，然其并非用以限定本发明，任何熟悉本领域普通知识的技术人员，在不脱离本发明的精神和范围内，当可作任意的更动与润饰，因此本发明的保护范围当以所附的权利要求所界定的范围为准。

Claims (8)

1.一种半导体元件，包括：
一半导体基板；
一焊盘区位于该半导体基板上；
一焊料凸块位于该焊盘区上并电性连接至该焊盘区；以及
一金属盖层位于至少部分该焊料凸块上；
其中该金属盖层的熔点高于该焊料凸块的熔点，
其中该金属盖层至少形成于该焊料凸块中间的侧壁表面上，且该焊料凸块的底部于水平方向延展出该金属盖层。
2.如权利要求1所述的半导体元件，其中该金属盖层包括镍、钯、金或铜中至少之一。
3.如权利要求1所述的半导体元件，其中该金属盖层包括无铅焊料。
4.一种封装结构，包括：
一半导体基板；
一封装基板；以及
一凸块结构位于该半导体基板与该封装基板之间，且该凸块结构电性连接该半导体基板与该封装基板；
其中该凸块结构包括一焊料凸块与一金属盖层，该金属盖层覆盖至少部分该焊料凸块，且该金属盖层的熔点高于该焊料凸块的熔点，
其中该金属盖层至少形成于该焊料凸块中间的侧壁表面上，且该焊料凸块的底部于水平方向延展出该金属盖层。
5.如权利要求4所述的封装结构，其中该金属盖层包括镍、钯、金或铜中至少之一。
6.如权利要求4所述的封装结构，其中该金属盖层包括无铅材料。
7.一种半导体元件的形成方法，包括：
形成一焊料层于一半导体基板上；
进行一再流动热工艺于该焊料层上；以及
形成一金属盖层于至少部分该焊料层上；
其中该金属盖层的熔点高于该焊料层的熔点，
其中该金属盖层至少形成于该焊料层中间的侧壁表面上，且该焊料层的底部于水平方向延展出该金属盖层。
8.如权利要求7的所述的半导体元件的形成方法，其中形成该金属盖层的步骤在该再流动热工艺之后或之前。
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US20110186989A1 (en) 2011-08-04
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US9960134B2 (en) 2018-05-01
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